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usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

PATCH In review Denis Carikli 7 participants 28 messages Mar 7, 2014 – Mar 10, 2014

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#0 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

---
 drivers/usb/chipidea/usbmisc_imx.c |   59 ++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)
drivers/usb/chipidea/usbmisc_imx.c +59 -0
index cd061ab..d956ad0 100644
@@ -21,6 +21,26 @@
 #define MX25_USB_PHY_CTRL_OFFSET	0x08
 #define MX25_BM_EXTERNAL_VBUS_DIVIDER	BIT(23)
 
+#define MXC_EHCI_INTERFACE_SINGLE_UNI	(2 << 0)
+#define MXC_EHCI_INTERFACE_DIFF_UNI	(0 << 0)
+#define MXC_EHCI_INTERFACE_MASK		(0xf)
+
+#define MX25_OTG_SIC_SHIFT		29
+#define MX25_OTG_SIC_MASK		(0x3 << MX25_OTG_SIC_SHIFT)
+#define MX25_OTG_PM_BIT			BIT(24)
+#define MX25_OTG_PP_BIT			BIT(11)
+#define MX25_OTG_OCPOL_BIT		(1 << 3)
+
+#define MX25_H1_SIC_SHIFT		21
+#define MX25_H1_SIC_MASK		(0x3 << MX25_H1_SIC_SHIFT)
+#define MX25_H1_PP_BIT			BIT(18)
+#define MX25_H1_PM_BIT			BIT(16)
+#define MX25_H1_IPPUE_UP_BIT		BIT(7)
+#define MX25_H1_IPPUE_DOWN_BIT		BIT(6)
+#define MX25_H1_TLL_BIT			BIT(5)
+#define MX25_H1_USBTE_BIT		BIT(4)
+#define MX25_H1_OCPOL_BIT		(1 << 2)
+
 #define MX27_H1_PM_BIT			BIT(8)
 #define MX27_H2_PM_BIT			BIT(16)
 #define MX27_OTG_PM_BIT			BIT(24)
@@ -50,6 +70,40 @@ struct imx_usbmisc {
 
 static struct imx_usbmisc *usbmisc;
 
+static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
+{
+	void __iomem *reg = NULL;
+	unsigned long flags;
+	u32 val = 0;
+
+	if (data->index > 1)
+		return -EINVAL;
+
+	spin_lock_irqsave(&usbmisc->lock, flags);
+	switch (data->index) {
+	case 0:
+		val = readl(usbmisc->base);
+		val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
+		val |= (MXC_EHCI_INTERFACE_DIFF_UNI & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
+		val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
+		writel(val, usbmisc->base);
+		break;
+	case 1:
+		val = readl(usbmisc->base);
+		val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT |  MX25_H1_IPPUE_UP_BIT);
+		val |= (MXC_EHCI_INTERFACE_SINGLE_UNI & MXC_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
+		val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
+			MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT);
+
+		writel(val, usbmisc->base);
+
+		break;
+	}
+	spin_unlock_irqrestore(&usbmisc->lock, flags);
+
+	return 0;
+}
+
 static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
 {
 	void __iomem *reg;
@@ -159,6 +213,7 @@ static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
 }
 
 static const struct usbmisc_ops imx25_usbmisc_ops = {
+	.init = usbmisc_imx25_init,
 	.post = usbmisc_imx25_post,
 };
 
@@ -200,6 +255,10 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = {
 		.data = &imx25_usbmisc_ops,
 	},
 	{
+		.compatible = "fsl,imx35-usbmisc",
+		.data = &imx25_usbmisc_ops,
+	},
+	{
 		.compatible = "fsl,imx27-usbmisc",
 		.data = &imx27_usbmisc_ops,
 	},
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 2/9 ARM: dts: i.MX51: Add a second usbphy.

---
 arch/arm/boot/dts/imx51.dtsi |    8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx51.dtsi +8 -0
index e508e6f..917b6ed 100644
@@ -100,6 +100,13 @@
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
 		};
+
+		usbphy1: usbphy at 1 {
+			compatible = "usb-nop-xceiv";
+			reg = <1>;
+			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
+			clock-names = "main_clk";
+		};
 	};
 
 	soc {
@@ -239,6 +246,7 @@
 				interrupts = <14>;
 				clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 				fsl,usbmisc = <&usbmisc 1>;
+				fsl,usbphy = <&usbphy1>;
 				status = "disabled";
 			};
 
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH 2/9 ARM: dts: i.MX51: Add a second usbphy.

Quoted 10 lines · Denis Carikli
---
 arch/arm/boot/dts/imx51.dtsi |    8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx51.dtsi +0 -0
index e508e6f..917b6ed 100644

arch/arm/boot/dts/imx51.dtsi line 109

Quoted 10 lines
arch/arm/boot/dts/imx51.dtsi +7 -0
@@ -100,6 +100,13 @@
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
 		};
+
+		usbphy1: usbphy at 1 {
+			compatible = "usb-nop-xceiv";
+			reg = <1>;
+			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
+			clock-names = "main_clk";
+		};

Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy clock for otg controller.

Quoted 16 lines
arch/arm/boot/dts/imx51.dtsi +1 -0
 	};
 
 	soc {
@@ -239,6 +246,7 @@
 				interrupts = <14>;
 				clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 				fsl,usbmisc = <&usbmisc 1>;
+				fsl,usbphy = <&usbphy1>;
 				status = "disabled";
 			};
 
Signature · 1 line
1.7.9.5
Signature · 2 lines
Best Regards,
Peter Chen
#3 lore raw

Re: [PATCH 2/9] ARM: dts: i.MX51: Add a second usbphy.

???????????, 10 ????? 2014, 8:52 +08:00 ?? Peter Chen <[email protected]>:

Quoted 16 lines · Denis Carikli
Quoted 15 lines
---
 arch/arm/boot/dts/imx51.dtsi |    8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx51.dtsi +2 -0
index e508e6f..917b6ed 100644
@@ -100,6 +100,13 @@
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
 		};
+
+		usbphy1: usbphy at 1 {
Quoted 8 lines

arch/arm/boot/dts/imx51.dtsi line 109

Quoted 5 lines
arch/arm/boot/dts/imx51.dtsi +5 -0
+			compatible = "usb-nop-xceiv";
+			reg = <1>;
+			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
+			clock-names = "main_clk";
+		};

Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy clock for otg controller.

As far as I know, for i.MX51 this is as it should be.

However, I doubt the usefulness of forcing "fsl,usbphy = <&usbphy1>" below.

Quoted 8 lines

arch/arm/boot/dts/imx51.dtsi line 251

Quoted 8 lines
arch/arm/boot/dts/imx51.dtsi +1 -0
 	soc {
@@ -239,6 +246,7 @@
 				interrupts = <14>;
 				clocks = <&clks IMX5_CLK_USBOH3_GATE>;
 				fsl,usbmisc = <&usbmisc 1>;
+				fsl,usbphy = <&usbphy1>;
 				status = "disabled";
 			};

---

#4 lore raw

PATCH 2/9 ARM: dts: i.MX51: Add a second usbphy.

Quoted 21 lines
Quoted 12 lines
Quoted 12 lines
(quoted diff) +0 -0

b/arch/arm/boot/dts/imx51.dtsi index e508e6f..917b6ed 100644

arch/arm/boot/dts/imx51.dtsi +2 -0
@@ -100,6 +100,13 @@
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
 		};
+
+		usbphy1: usbphy at 1 {
Quoted 8 lines

arch/arm/boot/dts/imx51.dtsi line 109

Quoted 5 lines
arch/arm/boot/dts/imx51.dtsi +5 -0
+			compatible = "usb-nop-xceiv";
+			reg = <1>;
+			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
+			clock-names = "main_clk";
+		};

Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy clock for otg controller.

Quoted 2 lines

As far as I know, for i.MX51 this is as it should be.

Are you sure? From clock file, they are different ccm clock gate.

Quoted 3 lines

However, I doubt the usefulness of forcing "fsl,usbphy = <&usbphy1>" below.

Yes, for ulpi phy, it should use ulpi phy driver (drivers/usb/phy/phy-ulpi.c), not generic phy driver.

Peter

#5 lore raw

Re: [PATCH 2/9] ARM: dts: i.MX51: Add a second usbphy.

???????????, 10 ????? 2014, 5:50 UTC ?? Peter Chen <[email protected]>:

Quoted 21 lines
Quoted 21 lines
Quoted 20 lines
Quoted 7 lines
(quoted diff) +0 -0

b/arch/arm/boot/dts/imx51.dtsi index e508e6f..917b6ed 100644

arch/arm/boot/dts/imx51.dtsi line 109

Quoted 10 lines
arch/arm/boot/dts/imx51.dtsi +7 -0
@@ -100,6 +100,13 @@
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
 		};
+
+		usbphy1: usbphy at 1 {
+			compatible = "usb-nop-xceiv";
+			reg = <1>;
+			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
+			clock-names = "main_clk";
+		};

Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy clock for otg controller.

Quoted 4 lines
Quoted 2 lines

As far as I know, for i.MX51 this is as it should be.

Are you sure? From clock file, they are different ccm clock gate.

clk-imx51-imx53.c ? I think you confuse with i.MX50/53.

---

#6 lore raw

PATCH 2/9 ARM: dts: i.MX51: Add a second usbphy.

Quoted 22 lines
Quoted 22 lines
Quoted 22 lines
Quoted 21 lines
Quoted 8 lines
(quoted diff) +0 -0

b/arch/arm/boot/dts/imx51.dtsi index e508e6f..917b6ed 100644

arch/arm/boot/dts/imx51.dtsi line 109

Quoted 10 lines
arch/arm/boot/dts/imx51.dtsi +7 -0
@@ -100,6 +100,13 @@
 			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 			clock-names = "main_clk";
 		};
+
+		usbphy1: usbphy at 1 {
+			compatible = "usb-nop-xceiv";
+			reg = <1>;
+			clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
+			clock-names = "main_clk";
+		};

Is this the ulpi phy for host1 controller? Why the clock is the same with utmi phy clock for otg controller.

Quoted 7 lines
Quoted 4 lines
Quoted 2 lines

As far as I know, for i.MX51 this is as it should be.

Are you sure? From clock file, they are different ccm clock gate.

clk-imx51-imx53.c ? I think you confuse with i.MX50/53.

Yes

341         clk[IMX5_CLK_USB_PHY1_GATE]     = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10);
342         clk[IMX5_CLK_USB_PHY2_GATE]     = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12);
#7 lore raw

PATCH 3/9 ARM: dts: mbimxsd51 baseboard: Add USB host support

In reply to Denis Carikli
---
 .../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts  |   47 ++++++++++++++++++++
 1 file changed, 47 insertions(+)
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +47 -0
index 5cec4f3..4d970b3 100644
@@ -151,6 +151,29 @@
 				MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
 			>;
 		};
+
+		pinctrl_usbh1: usbh1grp {
+			fsl,pins = <
+				MX51_PAD_USBH1_CLK__USBH1_CLK     0x1e5
+				MX51_PAD_USBH1_DIR__USBH1_DIR     0x1e5
+				MX51_PAD_USBH1_NXT__USBH1_NXT     0x1e5
+				MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
+				MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
+				MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
+				MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
+				MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
+				MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
+				MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
+				MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
+				MX51_PAD_USBH1_STP__USBH1_STP     0x1e5
+			>;
+		};
+
+		pinctrl_usbh1_vbus: usbh1-vbusgrp {
+			fsl,pins = <
+				MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
+			>;
+		};
 	};
 };
 
@@ -173,3 +196,27 @@
 	fsl,uart-has-rtscts;
 	status = "okay";
 };
+
+&usbh1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbh1>;
+	phy_type = "ulpi";
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usbotg {
+	phy_type = "utmi_wide";
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usbphy0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbh1_vbus>;
+	reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
+};
+
+&usbphy1 {
+	clock-frequency = <19200000>;
+};
Signature · 1 line
1.7.9.5
#8 lore raw

PATCH 4/9 ARM: dts: imx25.dtsi: Fix USB support.

In reply to Denis Carikli

From: Fabio Estevam <[email protected]>

This patch was adapted from the thread named
"USB Host support for mx25" on linux-usb at vger.kernel.org

---
 arch/arm/boot/dts/imx25.dtsi |    9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)
arch/arm/boot/dts/imx25.dtsi +4 -5
index 77bb743..ab5c282 100644
@@ -483,13 +483,11 @@
 			};
 
 			usbphy1: usbphy at 1 {
-				compatible = "nop-usbphy";
-				status = "disabled";
+				compatible = "usb-nop-xceiv";
 			};
 
 			usbphy2: usbphy at 2 {
-				compatible = "nop-usbphy";
-				status = "disabled";
+				compatible = "usb-nop-xceiv";
 			};
 
 			usbotg: usb at 53ff4000 {
@@ -499,6 +497,7 @@
 				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 0>;
+				fsl,usbphy = <&usbphy1>;
 				status = "disabled";
 			};
 
@@ -509,6 +508,7 @@
 				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 1>;
+				fsl,usbphy = <&usbphy2>;
 				status = "disabled";
 			};
 
@@ -518,7 +518,6 @@
 				clocks = <&clks 9>, <&clks 70>, <&clks 8>;
 				clock-names = "ipg", "ahb", "per";
 				reg = <0x53ff4600 0x00f>;
-				status = "disabled";
 			};
 
 			dryice at 53ffc000 {
Signature · 1 line
1.7.9.5
reviewer
#9 lore raw

PATCH 4/9 ARM: dts: imx25.dtsi: Fix USB support.

Hi Denis,

Quoted 4 lines · Denis Carikli

From: Fabio Estevam <[email protected]>

This patch was adapted from the thread named
"USB Host support for mx25" on linux-usb at vger.kernel.org

Good job, thanks for working on this series!

I will test it next week.

Thanks,

Fabio Estevam

#10 lore raw

PATCH 5/9 ARM: dts: mbimxsd25 baseboard: Add USB host support

In reply to Denis Carikli
---
 .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts  |   13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts +13 -0
index 62fb3da..58c606f 100644
@@ -172,3 +172,16 @@
 	fsl,uart-has-rtscts;
 	status = "okay";
 };
+
+&usbhost1 {
+	phy_type = "serial";
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usbotg {
+	phy_type = "utmi";
+	dr_mode = "host";
+	external-vbus-divider;
+	status = "okay";
+};
Signature · 1 line
1.7.9.5
#11 lore raw

PATCH 6/9 ARM: dts: i.MX35: Add USB support.

In reply to Denis Carikli
---
 arch/arm/boot/dts/imx35.dtsi |   11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/imx35.dtsi +11 -0
index e59ccb4..1c15b56 100644
@@ -292,6 +292,15 @@
 				status = "disabled";
 			};
 
+			usbphy0: usbphy at 0 {
+				compatible = "usb-nop-xceiv";
+			};
+
+			usbphy1: usbphy at 1 {
+				compatible = "usb-nop-xceiv";
+			};
+
+
 			usbotg: usb at 53ff4000 {
 				compatible = "fsl,imx35-usb", "fsl,imx27-usb";
 				reg = <0x53ff4000 0x0200>;
@@ -299,6 +308,7 @@
 				clocks = <&clks 9>, <&clks 73>, <&clks 28>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 0>;
+				fsl,usbphy = <&usbphy0>;
 				status = "disabled";
 			};
 
@@ -309,6 +319,7 @@
 				clocks = <&clks 9>, <&clks 73>, <&clks 28>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 1>;
+				fsl,usbphy = <&usbphy1>;
 				status = "disabled";
 			};
 
Signature · 1 line
1.7.9.5
#12 lore raw

PATCH 6/9 ARM: dts: i.MX35: Add USB support.

Quoted 46 lines · Denis Carikli
---
 arch/arm/boot/dts/imx35.dtsi |   11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/imx35.dtsi +11 -0
index e59ccb4..1c15b56 100644
@@ -292,6 +292,15 @@
 				status = "disabled";
 			};
 
+			usbphy0: usbphy at 0 {
+				compatible = "usb-nop-xceiv";
+			};
+
+			usbphy1: usbphy at 1 {
+				compatible = "usb-nop-xceiv";
+			};
+
+
 			usbotg: usb at 53ff4000 {
 				compatible = "fsl,imx35-usb", "fsl,imx27-usb";
 				reg = <0x53ff4000 0x0200>;
@@ -299,6 +308,7 @@
 				clocks = <&clks 9>, <&clks 73>, <&clks 28>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 0>;
+				fsl,usbphy = <&usbphy0>;
 				status = "disabled";
 			};
 
@@ -309,6 +319,7 @@
 				clocks = <&clks 9>, <&clks 73>, <&clks 28>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 1>;
+				fsl,usbphy = <&usbphy1>;
 				status = "disabled";
 			};
 
Signature · 1 line
1.7.9.5

Have you any other patches which are still not in mainline? At ci_hdrc_imx.c, we only get one clk, but for imx soc before than imx6, it needs three clks at our dts?

Signature · 2 lines
Best Regards,
Peter Chen
#13 lore raw

PATCH 6/9 ARM: dts: i.MX35: Add USB support.

In reply to Denis Carikli
Quoted 12 lines · Denis Carikli
---
 arch/arm/boot/dts/imx35.dtsi |   11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/imx35.dtsi +0 -0
index e59ccb4..1c15b56 100644
@@ -292,6 +292,15 @@
 				status = "disabled";
 			};

arch/arm/boot/dts/imx35.dtsi line 303

Quoted 10 lines
arch/arm/boot/dts/imx35.dtsi +9 -0
 
+			usbphy0: usbphy at 0 {
+				compatible = "usb-nop-xceiv";
+			};
+
+			usbphy1: usbphy at 1 {
+				compatible = "usb-nop-xceiv";
+			};
+
+

Can we put these (also imx25.dtsi) in the same way that imx51.dtsi organizes it?

Shawn

Quoted 22 lines
arch/arm/boot/dts/imx35.dtsi +2 -0
 			usbotg: usb at 53ff4000 {
 				compatible = "fsl,imx35-usb", "fsl,imx27-usb";
 				reg = <0x53ff4000 0x0200>;
@@ -299,6 +308,7 @@
 				clocks = <&clks 9>, <&clks 73>, <&clks 28>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 0>;
+				fsl,usbphy = <&usbphy0>;
 				status = "disabled";
 			};
 
@@ -309,6 +319,7 @@
 				clocks = <&clks 9>, <&clks 73>, <&clks 28>;
 				clock-names = "ipg", "ahb", "per";
 				fsl,usbmisc = <&usbmisc 1>;
+				fsl,usbphy = <&usbphy1>;
 				status = "disabled";
 			};
 
Signature · 1 line
1.7.9.5
#14 lore raw

PATCH 7/9 ARM: dts: mbimxsd35 baseboard: Add USB host support.

In reply to Denis Carikli
---
 .../boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts  |   12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts +12 -0
index 71197b9..d27f02e 100644
@@ -150,3 +150,15 @@
 	fsl,uart-has-rtscts;
 	status = "okay";
 };
+
+&usbhost1 {
+	phy_type = "serial";
+	status = "okay";
+};
+
+&usbotg {
+	phy_type = "utmi";
+	dr_mode = "host";
+	external-vbus-divider;
+	status = "okay";
+};
Signature · 1 line
1.7.9.5
#15 lore raw

PATCH 8/9 ARM: imx_v6_v7_defconfig: Enable drivers for i.MX51 USB Host support.

In reply to Denis Carikli
---
 arch/arm/configs/imx_v6_v7_defconfig |    2 ++
 1 file changed, 2 insertions(+)
arch/arm/configs/imx_v6_v7_defconfig +2 -0
index 09e9743..772f14f 100644
@@ -209,8 +209,10 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_OTG_FSM=y
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_USB_MXS_PHY=y
+CONFIG_USB_ULPI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_ETH=m
 CONFIG_USB_MASS_STORAGE=m
Signature · 1 line
1.7.9.5
#16 lore raw

PATCH 8/9 ARM: imx_v6_v7_defconfig: Enable drivers for i.MX51 USB Host support.

Quoted 10 lines · Denis Carikli
---
 arch/arm/configs/imx_v6_v7_defconfig |    2 ++
 1 file changed, 2 insertions(+)
arch/arm/configs/imx_v6_v7_defconfig +0 -0
index 09e9743..772f14f 100644

arch/arm/configs/imx_v6_v7_defconfig CONFIG_USB_STORAGE=y · line 212

Quoted 4 lines
arch/arm/configs/imx_v6_v7_defconfig +1 -0
@@ -209,8 +209,10 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_OTG_FSM=y

Why it is needed?

Quoted 11 lines
arch/arm/configs/imx_v6_v7_defconfig +1 -0
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_USB_MXS_PHY=y
+CONFIG_USB_ULPI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_ETH=m
 CONFIG_USB_MASS_STORAGE=m
Signature · 1 line
1.7.9.5
Signature · 2 lines
Best Regards,
Peter Chen
#17 lore raw

PATCH 9/9 ARM: imx_v4_v5_defconfig: Enable drivers for i.MX25/i.MX35 USB Host support.

In reply to Denis Carikli
---
 arch/arm/configs/imx_v4_v5_defconfig |    8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/configs/imx_v4_v5_defconfig +8 -0
index f1aeb7d..f7c4fbf 100644
@@ -47,6 +47,7 @@ CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_FPE_NWFPE=y
 CONFIG_FPE_NWFPE_XP=y
 CONFIG_PM_DEBUG=y
+CONFIG_PM_RUNTIME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -80,6 +81,7 @@ CONFIG_MTD_UBI=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_ATA=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_PATA_IMX=y
 CONFIG_NETDEVICES=y
 CONFIG_CS89x0=y
@@ -153,6 +155,12 @@ CONFIG_USB_HID=m
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_NOP_USB_XCEIV=y
 CONFIG_MMC=y
 CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_MMC_SDHCI=y
Signature · 1 line
1.7.9.5
#18 lore raw

PATCH 9/9 ARM: imx_v4_v5_defconfig: Enable drivers for i.MX25/i.MX35 USB Host support.

Quoted 10 lines · Denis Carikli
---
 arch/arm/configs/imx_v4_v5_defconfig |    8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/configs/imx_v4_v5_defconfig +0 -0
index f1aeb7d..f7c4fbf 100644

arch/arm/configs/imx_v4_v5_defconfig CONFIG_ZBOOT_ROM_BSS=0x0 · line 50

Quoted 4 lines
arch/arm/configs/imx_v4_v5_defconfig +1 -0
@@ -47,6 +47,7 @@ CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_FPE_NWFPE=y
 CONFIG_FPE_NWFPE_XP=y
 CONFIG_PM_DEBUG=y
+CONFIG_PM_RUNTIME=y

Why it is needed?

Quoted 12 lines
arch/arm/configs/imx_v4_v5_defconfig +1 -0
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -80,6 +81,7 @@ CONFIG_MTD_UBI=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_ATA=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_PATA_IMX=y
 CONFIG_NETDEVICES=y
 CONFIG_CS89x0=y

arch/arm/configs/imx_v4_v5_defconfig CONFIG_USB_HID=m · line 162

Quoted 8 lines
arch/arm/configs/imx_v4_v5_defconfig +5 -0
@@ -153,6 +155,12 @@ CONFIG_USB_HID=m
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_MXC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_OTG_FSM=y

Why it is needed?

Quoted 7 lines
arch/arm/configs/imx_v4_v5_defconfig +1 -0
+CONFIG_NOP_USB_XCEIV=y
 CONFIG_MMC=y
 CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_MMC_SDHCI=y
Signature · 1 line
1.7.9.5
Signature · 2 lines
Best Regards,
Peter Chen
#19 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

In reply to Denis Carikli

Hello.

Quoted 12 lines · Denis Carikli
---
  drivers/usb/chipidea/usbmisc_imx.c |   59 ++++++++++++++++++++++++++++++++++++
  1 file changed, 59 insertions(+)
drivers/usb/chipidea/usbmisc_imx.c +0 -0
index cd061ab..d956ad0 100644
@@ -21,6 +21,26 @@
  #define MX25_USB_PHY_CTRL_OFFSET	0x08
  #define MX25_BM_EXTERNAL_VBUS_DIVIDER	BIT(23)

drivers/usb/chipidea/usbmisc_imx.c line 32

Quoted 10 lines
drivers/usb/chipidea/usbmisc_imx.c +9 -0
 
+#define MXC_EHCI_INTERFACE_SINGLE_UNI	(2 << 0)
+#define MXC_EHCI_INTERFACE_DIFF_UNI	(0 << 0)
+#define MXC_EHCI_INTERFACE_MASK		(0xf)
+
+#define MX25_OTG_SIC_SHIFT		29
+#define MX25_OTG_SIC_MASK		(0x3 << MX25_OTG_SIC_SHIFT)
+#define MX25_OTG_PM_BIT			BIT(24)
+#define MX25_OTG_PP_BIT			BIT(11)
+#define MX25_OTG_OCPOL_BIT		(1 << 3)

Hm, why not BIT(3). Though frankly speaking, I don't think (x << n) macros
go together well with BIT() ones.

drivers/usb/chipidea/usbmisc_imx.c line 42

Quoted 10 lines
drivers/usb/chipidea/usbmisc_imx.c +10 -0
+
+#define MX25_H1_SIC_SHIFT		21
+#define MX25_H1_SIC_MASK		(0x3 << MX25_H1_SIC_SHIFT)
+#define MX25_H1_PP_BIT			BIT(18)
+#define MX25_H1_PM_BIT			BIT(16)
+#define MX25_H1_IPPUE_UP_BIT		BIT(7)
+#define MX25_H1_IPPUE_DOWN_BIT		BIT(6)
+#define MX25_H1_TLL_BIT			BIT(5)
+#define MX25_H1_USBTE_BIT		BIT(4)
+#define MX25_H1_OCPOL_BIT		(1 << 2)
    BIT(2)?

WBR, Sergei

#20 lore raw
In reply to Denis Carikli

???????, 7 ????? 2014, 18:04 +01:00 ?? Denis Carikli <[email protected]>:

Quoted 9 lines
---
 drivers/usb/chipidea/usbmisc_imx.c |   59 ++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)
drivers/usb/chipidea/usbmisc_imx.c +0 -0
index cd061ab..d956ad0 100644

...

drivers/usb/chipidea/usbmisc_imx.c struct imx_usbmisc { · line 89

Quoted 5 lines
drivers/usb/chipidea/usbmisc_imx.c +5 -0
+		val = readl(usbmisc->base);
+		val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
+		val |= (MXC_EHCI_INTERFACE_DIFF_UNI & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
+		val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
+		writel(val, usbmisc->base);

At the moment, we only enable/disable interface and manage overcurrent option in the usbmisc driver.
Is it worth it to handle type of interface here?

---

#21 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

Quoted 11 lines · Alexander Shiyan

???????, 7 ????? 2014, 18:04 +01:00 ?? Denis Carikli <[email protected]>:

Quoted 9 lines
---
 drivers/usb/chipidea/usbmisc_imx.c |   59 ++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)
drivers/usb/chipidea/usbmisc_imx.c +0 -0
index cd061ab..d956ad0 100644

...

Quoted 10 lines

drivers/usb/chipidea/usbmisc_imx.c struct imx_usbmisc { · line 89

Quoted 5 lines
drivers/usb/chipidea/usbmisc_imx.c +5 -0
+		val = readl(usbmisc->base);
+		val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
+		val |= (MXC_EHCI_INTERFACE_DIFF_UNI & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
+		val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
+		writel(val, usbmisc->base);

At the moment, we only enable/disable interface and manage overcurrent option in the usbmisc driver.
Is it worth it to handle type of interface here?

All usb related things which are not included at chipidea core can be in usbmisc driver.

Signature · 2 lines
Best Regards,
Peter Chen
reviewer
#22 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

In reply to Denis Carikli

Hi Denis,

drivers/usb/chipidea/usbmisc_imx.c struct imx_usbmisc { · line 75

Quoted 3 lines · Denis Carikli
drivers/usb/chipidea/usbmisc_imx.c +3 -0
+static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
+{
+       void __iomem *reg = NULL;

This variable is not used and causes a warning. Please remove it.

After applying this patch things go further when I boot with a USB thumb connected to the USB Host1 port:

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
usbcore: registered new interface driver usb-storage 53ff4400.usb supply vbus not found, using dummy regulator ci_hdrc ci_hdrc.0: EHCI Host Controller
ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1 ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
....

usb 1-1: new full-speed USB device number 2 using ci_hdrc

(Not sure why it says full-speed device. When I connect the same device to a PC it says high-speed)

usb 1-1: not running at top speed; connect to a high speed hub usb-storage 1-1:1.0: USB Mass Storage device detected usb-storage 1-1:1.0: Quirks match for vid 0457 pid 0151: 80 scsi0 : usb-storage 1-1:1.0
scsi 0:0:0:0: Direct-Access Ut163 USB2FlashStorage 0.00 PQ: 0 ANSI: 2
sd 0:0:0:0: [sda] 248000 512-byte logical blocks: (126 MB/121 MiB) sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Asking for cache data failed
sd 0:0:0:0: [sda] Assuming drive cache: write through
sd 0:0:0:0: [sda] Asking for cache data failed
sd 0:0:0:0: [sda] Assuming drive cache: write through
sda: sda1
sd 0:0:0:0: [sda] Asking for cache data failed
sd 0:0:0:0: [sda] Assuming drive cache: write through
sd 0:0:0:0: [sda] Attached SCSI removable disk
fec 50038000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx Sending DHCP requests ., OK
IP-Config: Got DHCP answer from 192.168.0.1, my address is 192.168.0.8
IP-Config: Complete:

     device=eth0, hwaddr=00:04:00:00:00:00, ipaddr=192.168.0.8, mask=255.255.251
     host=192.168.0.8, domain=, nis-domain=(none)
     bootserver=192.168.0.1, rootserver=192.168.0.2, rootpath=
     nameserver0=192.168.0.1

ALSA device list:
No soundcards found.
VFS: Mounted root (nfs filesystem) readonly on device 0:13.
devtmpfs: mounted
Freeing unused kernel memory: 276K (c0697000 - c06dc000) starting pid 536, tty '': '/etc/rc.d/rcS'
Mounting /proc and /sys
Starting the hotplug events dispatcher udevd Synthesizing initial hotplug events
imx-sdma 53fd4000.sdma: firmware not found

(Then system hangs here).

If I boot without the USB thumb connected, then I reach the prompt, however after inserting the USB pen drive into USBH1 there is no detection.

Any ideas?

Thanks,

Fabio Estevam

#23 lore raw

???????????, 9 ????? 2014, 22:21 -03:00 ?? Fabio Estevam <[email protected]>:

Quoted 12 lines

Hi Denis,

drivers/usb/chipidea/usbmisc_imx.c struct imx_usbmisc { · line 75

Quoted 3 lines · Denis Carikli
drivers/usb/chipidea/usbmisc_imx.c +3 -0
+static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
+{
+       void __iomem *reg = NULL;

This variable is not used and causes a warning. Please remove it.

After applying this patch things go further when I boot with a USB thumb connected to the USB Host1 port:

...

Quoted 2 lines

(Not sure why it says full-speed device. When I connect the same device to a PC it says high-speed)

...

Quoted 7 lines

(Then system hangs here).

If I boot without the USB thumb connected, then I reach the prompt, however after inserting the USB pen drive into USBH1 there is no detection.

Any ideas?

Fabio, start with to make work USB port on your board in the bootloader. Then with the previous driver (ehci-mxc).
Most likely problem is a wrong (or missing) clock.
As I mentioned earlier, DTS has incorrect clock nodes.

---

reviewer
#24 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

Hi Alexander,

Quoted 4 lines · Alexander Shiyan

Fabio, start with to make work USB port on your board in the bootloader. Then with the previous driver (ehci-mxc).
Most likely problem is a wrong (or missing) clock.
As I mentioned earlier, DTS has incorrect clock nodes.

Yes, you are right, thanks.

If I change the usb host clocks as:

-                               clocks = <&clks 9>, <&clks 70>, <&clks 8>;
-                               clock-names = "ipg", "ahb", "per";
+                               clocks = <&clks 70>;

Then USB host1 works fine on my mx25pdk board.

Denis,

Could you please resend 4/9 by changing the clocks nodes in the OTG and Host1 ports as shown above?

Thanks,

Fabio Estevam

reviewer
#25 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

Hi Denis,

Quoted 4 lines · Fabio Estevam

Denis,

Could you please resend 4/9 by changing the clocks nodes in the OTG and Host1 ports as shown above?

Thinking more about it, it would be better to send the USB clock change as a separate patch.

I can submit the dts changes to the linux-arm-kernel list later today.

Regards,

Fabio Estevam

#26 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

In reply to Fabio Estevam

Hi Fabio,

Le Sun, 9 Mar 2014 22:21:59 -0300,
Fabio Estevam <[email protected]> a ?crit :

Quoted 21 lines · Denis Carikli

drivers/usb/chipidea/usbmisc_imx.c struct imx_usbmisc { · line 75

Quoted 4 lines
drivers/usb/chipidea/usbmisc_imx.c +3 -0
+static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
+{
+       void __iomem *reg = NULL;

This variable is not used and causes a warning. Please remove it.

After applying this patch things go further when I boot with a USB thumb connected to the USB Host1 port:

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
usbcore: registered new interface driver usb-storage 53ff4400.usb supply vbus not found, using dummy regulator ci_hdrc ci_hdrc.0: EHCI Host Controller
ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1 ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
....

Quoted 5 lines

usb 1-1: new full-speed USB device number 2 using ci_hdrc

(Not sure why it says full-speed device. When I connect the same device to a PC it says high-speed)

because i.MX25 and i.MX35 only have a full speed phy on the host port.

Eric

reviewer
#27 lore raw

PATCH 1/9 usb: chipidea: usbmisc: Add USB Host support for i.MX25/i.MX35 CPUs

Hi Eric,

Quoted 6 lines · Eric B?nard

Hi Fabio,

Quoted 3 lines

(Not sure why it says full-speed device. When I connect the same device to a PC it says high-speed)

because i.MX25 and i.MX35 only have a full speed phy on the host port.

This makes sense, thanks.