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reset: add socfpga reset-controller

PATCH Superseded Steffen Trumtrar 4 participants 12 messages Apr 4, 2014 – Apr 9, 2014

Subsystems (2)
Device tree bindings Reset controller framework

v1 of 3 Superseded Latest is v3 →

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Steffen Trumtrar

author
#0 lore raw

cover reset: add socfpga reset-controller

Hi!

This series converts the current rst-mgr entry in the socfpga.dtsi to a driver that registers with the reset-controller framework.

1/3 adds the driver,
2/3 updates the binding to reflect this
3/3 updates the socfpga.dtsi and adds the DT-header file

Regards,
Steffen

Steffen Trumtrar (3):
reset: add driver for socfpga
Documentation: dt: socfpga: add reset-cells property
ARM: socfpga: dts: add reset-controller

 .../bindings/arm/altera/socfpga-reset.txt          |   2 +
 arch/arm/boot/dts/socfpga.dtsi                     |   8 +-
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-socfpga.c                      | 149 +++++++++++++++++++++
 include/dt-bindings/reset/altr,rst-mgr.h           |  90 +++++++++++++
 5 files changed, 249 insertions(+), 1 deletion(-)
 create mode 100644 drivers/reset/reset-socfpga.c
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr.h
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH 1/3 reset: add driver for socfpga

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in one module block.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-socfpga.c | 149 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)
 create mode 100644 drivers/reset/reset-socfpga.c
drivers/reset/Makefile +1 -0
index cc29832..ab64077 100644
@@ -1,2 +1,3 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
+obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
drivers/reset/reset-socfpga.c new file +149 -0

149 lines not on this page · raw message

Signature · 1 line
1.9.1
maintainer
#2 lore raw

PATCH 1/3 reset: add driver for socfpga

Hi Steffen,

a few minor issues below:

Am Freitag, den 04.04.2014, 18:31 +0200 schrieb Steffen Trumtrar:

Quoted 42 lines

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in one module block.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-socfpga.c | 149 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)
 create mode 100644 drivers/reset/reset-socfpga.c
drivers/reset/Makefile +1 -0
index cc29832..ab64077 100644
@@ -1,2 +1,3 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
+obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
drivers/reset/reset-socfpga.c new file +17 -0
new file mode 100644
index 0000000..b21e4e4
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2014 Steffen Trumtrar <[email protected]>
+ *
+ * based on
+ * Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/err.h>

drivers/reset/reset-socfpga.c line 27

Quoted 10 lines
drivers/reset/reset-socfpga.c new file +10 -0
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+#define NR_BANKS		4
+#define MAX_BANK_WIDTH		32

Since you are using BITS_PER_LONG for bank and offset calculation, why not just drop MAX_BANK_WIDTH and use BITS_PER_LONG directly? (Or use MAX_BANK_WIDTH everywhere.)

Quoted 59 lines
drivers/reset/reset-socfpga.c new file +59 -0
+#define OFFSET_MODRST		0x10
+
+struct socfpga_reset_data {
+	spinlock_t			lock;
+	void __iomem			*membase;
+	struct reset_controller_dev	rcdev;
+};
+
+static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
+	writel(reg | BIT(offset), data->membase + OFFSET_MODRST +
+				 (bank * NR_BANKS));
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
+				  unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
+	writel(reg & ~BIT(offset), data->membase + OFFSET_MODRST +
+				  (bank * NR_BANKS));
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static struct reset_control_ops socfpga_reset_ops = {
+	.assert		= socfpga_reset_assert,
+	.deassert	= socfpga_reset_deassert,
+};
+
+static int socfpga_reset_probe(struct platform_device *pdev)
+{

drivers/reset/reset-socfpga.c line 96

Quoted 10 lines
drivers/reset/reset-socfpga.c new file +10 -0
+	struct socfpga_reset_data *data;
+	struct resource *res;
+	int ret;
+
+	/*
+	 * The binding was mainlined without the required property.
+	 * Do not continue, when we encounter an old DT.
+	 */
+	if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) {
+		dev_err(&pdev->dev, "dt missing #reset-cells property\n");

Maybe also print pdev->dev.of_node->full_name here?

drivers/reset/reset-socfpga.c line 108

Quoted 12 lines
drivers/reset/reset-socfpga.c new file +12 -0
+		return -EINVAL;
+	}
+
+	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	data->membase = devm_ioremap_resource(&pdev->dev, res);
+	if (!data->membase) {
+		ret = -ENOMEM;
+		return ret;

This should be:

	if (IS_ERR(data->membase))
		return PTR_ERR(data->membase);

drivers/reset/reset-socfpga.c line 114

Quoted 6 lines
drivers/reset/reset-socfpga.c new file +6 -0
+	}
+
+	spin_lock_init(&data->lock);
+
+	data->rcdev.owner = THIS_MODULE;
+	data->rcdev.nr_resets = NR_BANKS * MAX_BANK_WIDTH;

See above.

Quoted 25 lines
drivers/reset/reset-socfpga.c new file +25 -0
+	data->rcdev.ops = &socfpga_reset_ops;
+	data->rcdev.of_node = pdev->dev.of_node;
+	reset_controller_register(&data->rcdev);
+
+	return 0;
+}
+
+static int socfpga_reset_remove(struct platform_device *pdev)
+{
+	struct socfpga_reset_data *data = platform_get_drvdata(pdev);
+
+	reset_controller_unregister(&data->rcdev);
+
+	return 0;
+}
+
+static const struct of_device_id socfpga_reset_dt_ids[] = {
+	{ .compatible = "altr,rst-mgr", },
+	{ /* sentinel */ },
+};
+
+static struct platform_driver socfpga_reset_driver = {
+	.probe	= socfpga_reset_probe,
+	.remove	= socfpga_reset_remove,
+	.driver = {

drivers/reset/reset-socfpga.c line 149

Quoted 10 lines
drivers/reset/reset-socfpga.c new file +10 -0
+		.name		= "socfpga-reset",
+		.owner		= THIS_MODULE,
+		.of_match_table	= socfpga_reset_dt_ids,
+	},
+};
+module_platform_driver(socfpga_reset_driver);
+
+MODULE_AUTHOR("Steffen Trumtrar <[email protected]");
+MODULE_DESCRIPTION("Socfpga Reset Controller Driver");
+MODULE_LICENSE("GPL");

regards
Philipp

author
#3 lore raw

PATCH 1/3 reset: add driver for socfpga

Hi!

Quoted 53 lines · Philipp Zabel

Hi Steffen,

a few minor issues below:

Am Freitag, den 04.04.2014, 18:31 +0200 schrieb Steffen Trumtrar:

Quoted 48 lines

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in one module block.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-socfpga.c | 149 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)
 create mode 100644 drivers/reset/reset-socfpga.c
drivers/reset/Makefile +1 -0
index cc29832..ab64077 100644
@@ -1,2 +1,3 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
+obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
drivers/reset/reset-socfpga.c new file +23 -0
new file mode 100644
index 0000000..b21e4e4
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2014 Steffen Trumtrar <[email protected]>
+ *
+ * based on
+ * Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/spinlock.h>
Quoted 9 lines

drivers/reset/reset-socfpga.c line 27

Quoted 4 lines
drivers/reset/reset-socfpga.c new file +4 -0
+#include <linux/types.h>
+
+#define NR_BANKS		4
+#define MAX_BANK_WIDTH		32

Since you are using BITS_PER_LONG for bank and offset calculation, why not just drop MAX_BANK_WIDTH and use BITS_PER_LONG directly? (Or use MAX_BANK_WIDTH everywhere.)

Hm, yeah. I will change that to BITS_PER_LONG everywhere.

Quoted 63 lines
Quoted 63 lines
drivers/reset/reset-socfpga.c new file +63 -0
+#define OFFSET_MODRST		0x10
+
+struct socfpga_reset_data {
+	spinlock_t			lock;
+	void __iomem			*membase;
+	struct reset_controller_dev	rcdev;
+};
+
+static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
+	writel(reg | BIT(offset), data->membase + OFFSET_MODRST +
+				 (bank * NR_BANKS));
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
+				  unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
+	writel(reg & ~BIT(offset), data->membase + OFFSET_MODRST +
+				  (bank * NR_BANKS));
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static struct reset_control_ops socfpga_reset_ops = {
+	.assert		= socfpga_reset_assert,
+	.deassert	= socfpga_reset_deassert,
+};
+
+static int socfpga_reset_probe(struct platform_device *pdev)
+{
+	struct socfpga_reset_data *data;
+	struct resource *res;
+	int ret;
+
Quoted 9 lines

drivers/reset/reset-socfpga.c line 96

Quoted 6 lines
drivers/reset/reset-socfpga.c new file +6 -0
+	/*
+	 * The binding was mainlined without the required property.
+	 * Do not continue, when we encounter an old DT.
+	 */
+	if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) {
+		dev_err(&pdev->dev, "dt missing #reset-cells property\n");

Maybe also print pdev->dev.of_node->full_name here?

Okay.

Quoted 14 lines

drivers/reset/reset-socfpga.c line 108

Quoted 12 lines
drivers/reset/reset-socfpga.c new file +12 -0
+		return -EINVAL;
+	}
+
+	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	data->membase = devm_ioremap_resource(&pdev->dev, res);
+	if (!data->membase) {
+		ret = -ENOMEM;
+		return ret;

This should be:

Quoted 3 lines
	if (IS_ERR(data->membase))
		return PTR_ERR(data->membase);

Ah, of course. Somehow didn't think about that here.

Quoted 36 lines

drivers/reset/reset-socfpga.c line 114

Quoted 6 lines
drivers/reset/reset-socfpga.c new file +6 -0
+	}
+
+	spin_lock_init(&data->lock);
+
+	data->rcdev.owner = THIS_MODULE;
+	data->rcdev.nr_resets = NR_BANKS * MAX_BANK_WIDTH;

See above.

Quoted 27 lines
drivers/reset/reset-socfpga.c new file +27 -0
+	data->rcdev.ops = &socfpga_reset_ops;
+	data->rcdev.of_node = pdev->dev.of_node;
+	reset_controller_register(&data->rcdev);
+
+	return 0;
+}
+
+static int socfpga_reset_remove(struct platform_device *pdev)
+{
+	struct socfpga_reset_data *data = platform_get_drvdata(pdev);
+
+	reset_controller_unregister(&data->rcdev);
+
+	return 0;
+}
+
+static const struct of_device_id socfpga_reset_dt_ids[] = {
+	{ .compatible = "altr,rst-mgr", },
+	{ /* sentinel */ },
+};
+
+static struct platform_driver socfpga_reset_driver = {
+	.probe	= socfpga_reset_probe,
+	.remove	= socfpga_reset_remove,
+	.driver = {
+		.name		= "socfpga-reset",
+		.owner		= THIS_MODULE,
Quoted 9 lines

drivers/reset/reset-socfpga.c line 149

Quoted 8 lines
drivers/reset/reset-socfpga.c new file +8 -0
+		.of_match_table	= socfpga_reset_dt_ids,
+	},
+};
+module_platform_driver(socfpga_reset_driver);
+
+MODULE_AUTHOR("Steffen Trumtrar <[email protected]");
+MODULE_DESCRIPTION("Socfpga Reset Controller Driver");
+MODULE_LICENSE("GPL");

Thanks,
Steffen

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
author
#4 lore raw

PATCH 2/3 Documentation: dt: socfpga: add reset-cells property

In reply to Steffen Trumtrar

To be able to use the reset-controller framework, the property
#reset-cells
is mandatory.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt +2 -0
index ecdb57d..32c1c8b 100644
@@ -3,9 +3,11 @@ Altera SOCFPGA Reset Manager
 Required properties:
 - compatible : "altr,rst-mgr"
 - reg : Should contain 1 register ranges(address and length)
+- #reset-cells: 1
 
 Example:
 	 rstmgr at ffd05000 {
+		#reset-cells = <1>;
 		compatible = "altr,rst-mgr";
 		reg = <0xffd05000 0x1000>;
 	};
Signature · 1 line
1.9.1
author
#5 lore raw

PATCH 3/3 ARM: socfpga: dts: add reset-controller

In reply to Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++
 2 files changed, 97 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr.h
arch/arm/boot/dts/socfpga.dtsi +7 -1
index 1f71e96..027d2c6 100644
@@ -16,6 +16,7 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/reset/altr,rst-mgr.h>
 
 / {
 	#address-cells = <1>;

@@ -456,6 +457,8 @@
 			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
 			clocks = <&emac0_clk>;
 			clock-names = "stmmaceth";
+			resets = <&rst EMAC0_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 

@@ -467,6 +470,8 @@
 			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
 			clocks = <&emac1_clk>;
 			clock-names = "stmmaceth";
+			resets = <&rst EMAC1_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 

@@ -584,7 +589,8 @@
 			reg-io-width = <4>;
 		};
 
-		rstmgr at ffd05000 {
+		rst: rstmgr at ffd05000 {
+			#reset-cells = <1>;
 			compatible = "altr,rst-mgr";
 			reg = <0xffd05000 0x1000>;
 		};
include/dt-bindings/reset/altr,rst-mgr.h new file +90 -0

90 lines not on this page · raw message

Signature · 1 line
1.9.1
#6 lore raw

PATCH 3/3 ARM: socfpga: dts: add reset-controller

Quoted 7 lines · Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++

Does this file belong under dt-bindings/reset/ or
dt-bindings/reset-controller/?

Dinh

author
#7 lore raw

PATCH 3/3 ARM: socfpga: dts: add reset-controller

Quoted 4 lines · Dinh Nguyen
Quoted 3 lines · Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

Quoted 8 lines
Quoted 4 lines
Signed-off-by Steffen Trumtrar <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++

Does this file belong under dt-bindings/reset/ or
dt-bindings/reset-controller/?

ATM there is no such directory, or is there ?
So, reset seems appropriate I think.

But this reminds me, that I wanted to move the binding documentation from Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt -> Documentation/devicetree/bindings/reset/socfpga-reset.txt

I will have to add a patch for that to the series in v2.

Thanks,
Steffen

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#8 lore raw

PATCH 3/3 ARM: socfpga: dts: add reset-controller

Quoted 9 lines · Steffen Trumtrar
Quoted 8 lines · Dinh Nguyen
Quoted 7 lines · Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++
Quoted 5 lines
Quoted 3 lines

Does this file belong under dt-bindings/reset/ or
dt-bindings/reset-controller/?

ATM there is no such directory, or is there ?
So, reset seems appropriate I think.

commit [6b7f06 ARM: STi: STiH415: Add reset controller support.] Seems more appropriate for this to go into reset-controller.

Dinh

Quoted 10 lines

But this reminds me, that I wanted to move the binding documentation from Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt -> Documentation/devicetree/bindings/reset/socfpga-reset.txt

I will have to add a patch for that to the series in v2.

Thanks,
Steffen

author
#9 lore raw

PATCH 3/3 ARM: socfpga: dts: add reset-controller

Quoted 10 lines · Dinh Nguyen
Quoted 9 lines · Steffen Trumtrar
Quoted 8 lines · Dinh Nguyen
Quoted 7 lines · Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines

Does this file belong under dt-bindings/reset/ or
dt-bindings/reset-controller/?

ATM there is no such directory, or is there ?
So, reset seems appropriate I think.

commit [6b7f06 ARM: STi: STiH415: Add reset controller support.] Seems more appropriate for this to go into reset-controller.

Okay, the current mainline master now has include/dt-bindings/reset and include/dt-bindings/reset-controller.

I think one of those directories shouldn't be there, but be merged in the other instead. But which one? Where shall I put my precious code?

Regards,
Steffen

Signature · 4 lines
Pengutronix e.K.                           | Steffen Trumtrar            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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maintainer
#10 lore raw

PATCH 3/3 ARM: socfpga: dts: add reset-controller

Am Mittwoch, den 09.04.2014, 10:37 +0200 schrieb Steffen Trumtrar:

Quoted 21 lines
Quoted 10 lines · Dinh Nguyen
Quoted 9 lines · Steffen Trumtrar
Quoted 8 lines · Dinh Nguyen
Quoted 7 lines · Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines

Does this file belong under dt-bindings/reset/ or
dt-bindings/reset-controller/?

ATM there is no such directory, or is there ?
So, reset seems appropriate I think.

commit [6b7f06 ARM: STi: STiH415: Add reset controller support.] Seems more appropriate for this to go into reset-controller.

Quoted 5 lines

Okay, the current mainline master now has include/dt-bindings/reset and include/dt-bindings/reset-controller.

I think one of those directories shouldn't be there, but be merged in the other instead. But which one? Where shall I put my precious code?

My vote would be for dt-bindings/reset/, since that's shorter and 2ec941304df9e1cd5e2f2404303a5fab0929969a came before 6b7f06cc805bb4755e69cd916b3f565947e0a77a.

Maybe something also should be done about dt-bindings/clk/ and dt-bindings/clock/.

regards
Philipp

author
#11 lore raw

PATCH 3/3 ARM: socfpga: dts: add reset-controller

Quoted 25 lines · Philipp Zabel

Am Mittwoch, den 09.04.2014, 10:37 +0200 schrieb Steffen Trumtrar:

Quoted 24 lines
Quoted 10 lines · Dinh Nguyen
Quoted 9 lines · Steffen Trumtrar
Quoted 8 lines · Dinh Nguyen
Quoted 7 lines · Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

Signed-off-by Steffen Trumtrar <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines

Does this file belong under dt-bindings/reset/ or
dt-bindings/reset-controller/?

ATM there is no such directory, or is there ?
So, reset seems appropriate I think.

commit [6b7f06 ARM: STi: STiH415: Add reset controller support.] Seems more appropriate for this to go into reset-controller.

Okay, the current mainline master now has include/dt-bindings/reset and include/dt-bindings/reset-controller.

Quoted 7 lines
Quoted 2 lines

I think one of those directories shouldn't be there, but be merged in the other instead. But which one? Where shall I put my precious code?

My vote would be for dt-bindings/reset/, since that's shorter and 2ec941304df9e1cd5e2f2404303a5fab0929969a came before 6b7f06cc805bb4755e69cd916b3f565947e0a77a.

Agreed.

Regards,
Steffen

Signature · 4 lines
Pengutronix e.K.                           | Steffen Trumtrar            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |