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rtc: Add APM X-Gene SoC RTC driver

PATCH New Loc Ho 2 participants 7 messages Apr 10, 2014 – Apr 11, 2014

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Loc Ho

author
#0 lore raw

v4 cover rtc: Add APM X-Gene SoC RTC driver

This patch adds support for the APM X-Gene SoC RTC driver.

v4
* Clean up un-needed read RTC_CCVR register in function xgene_rtc_set_alarm
* Update suspend/resume functions to setup clock and IRQ accordingly

v3
* Remove #clock-cell from binding documentation

v2
* Change function xgene_rtc_read_time to return rtc_valid_tm(tm) instead 0

v1
* Initial version

--
Loc Ho (3):
Documentation: Add documentation for the APM X-Gene SoC RTC DTS
binding
rtc: Add APM X-Gene SoC RTC driver
arm64: Add APM X-Gene SoC RTC DTS entry

 .../devicetree/bindings/rtc/xgene-rtc.txt          |   27 ++
 arch/arm64/boot/dts/apm-storm.dtsi                 |   21 ++
 drivers/rtc/Kconfig                                |    9 +
 drivers/rtc/Makefile                               |    1 +
 drivers/rtc/rtc-xgene.c                            |  301 ++++++++++++++++++++
 5 files changed, 359 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/rtc/xgene-rtc.txt
 create mode 100644 drivers/rtc/rtc-xgene.c
author
#1 lore raw

PATCH v4 1/3 Documentation: Add documentation for the APM X-Gene SoC RTC DTS binding

This patch adds documentation for the APM X-Gene SoC RTC DTS binding.

---
 .../devicetree/bindings/rtc/xgene-rtc.txt          |   27 ++++++++++++++++++++
 1 files changed, 27 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/rtc/xgene-rtc.txt
Documentation/devicetree/bindings/rtc/xgene-rtc.txt new file +27 -0
new file mode 100644
index 0000000..2e9c503
@@ -0,0 +1,27 @@
+* APM X-Gene Real Time Clock
+
+RTC controller for the APM X-Gene Real Time Clock
+
+Required properties:
+- compatible : Should be "apm,xgene-rtc"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: IRQ line for the RTC.
+- clocks: Reference to the clock entry.
+
+Example:
+
+rtcclk: rtcclk {
+	compatible = "fixed-clock";
+	#clock-cells = <1>;
+	clock-frequency = <100000000>;
+	clock-output-names = "rtcclk";
+};
+
+rtc: rtc at 10510000 {
+	compatible = "apm,xgene-rtc";
+	reg = <0x0 0x10510000 0x0 0x400>;
+	interrupts = <0x0 0x46 0x4>;
+	#clock-cells = <1>;
+	clocks = <&rtcclk 0>;
+};
Signature · 1 line
1.5.5
author
#2 lore raw

PATCH v4 2/3 rtc: Add APM X-Gene SoC RTC driver

This patch adds support for the APM X-Gene SoC RTC driver.

---
 drivers/rtc/Kconfig     |    9 ++
 drivers/rtc/Makefile    |    1 +
 drivers/rtc/rtc-xgene.c |  301 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 311 insertions(+), 0 deletions(-)
 create mode 100644 drivers/rtc/rtc-xgene.c
drivers/rtc/Kconfig +9 -0
index db933de..4e3a683 100644
@@ -1315,6 +1315,15 @@ config RTC_DRV_MOXART
 	   This driver can also be built as a module. If so, the module
 	   will be called rtc-moxart
 
+config RTC_DRV_XGENE
+	tristate "APM X-Gene RTC"
+	help
+	  If you say yes here you get support for the APM X-Gene SoC real time
+	  clock.
+
+	  This driver can also be built as a module, if so, the module
+	  will be called "rtc-xgene".
+
 comment "HID Sensor RTC drivers"
 
 config RTC_DRV_HID_SENSOR_TIME
drivers/rtc/Makefile +1 -0
index b427bf7..ceccd46 100644
@@ -134,5 +134,6 @@ obj-$(CONFIG_RTC_DRV_VT8500)	+= rtc-vt8500.o
 obj-$(CONFIG_RTC_DRV_WM831X)	+= rtc-wm831x.o
 obj-$(CONFIG_RTC_DRV_WM8350)	+= rtc-wm8350.o
 obj-$(CONFIG_RTC_DRV_X1205)	+= rtc-x1205.o
+obj-$(CONFIG_RTC_DRV_XGENE)	+= rtc-xgene.o
 obj-$(CONFIG_RTC_DRV_SIRFSOC)	+= rtc-sirfsoc.o
 obj-$(CONFIG_RTC_DRV_MOXART)	+= rtc-moxart.o
drivers/rtc/rtc-xgene.c new file +301 -0

301 lines not on this page · raw message

Signature · 1 line
1.5.5
author
#3 lore raw

PATCH v4 3/3 arm64: Add APM X-Gene SoC RTC DTS entry

This patch adds APM X-Gene SoC RTC DTS entry

---
 arch/arm64/boot/dts/apm-storm.dtsi |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+), 0 deletions(-)
arch/arm64/boot/dts/apm-storm.dtsi +21 -0
index 93f4b2d..4917f3b 100644
@@ -257,6 +257,19 @@
 				enable-offset = <0x0>;
 				enable-mask = <0x39>;
 			};
+
+			rtcclk: rtcclk at 17000000 {
+				compatible = "apm,xgene-device-clock";
+				#clock-cells = <1>;
+				clocks = <&socplldiv2 0>;
+				reg = <0x0 0x17000000 0x0 0x2000>;
+				reg-names = "csr-reg";
+				csr-offset = <0xc>;
+				csr-mask = <0x2>;
+				enable-offset = <0x10>;
+				enable-mask = <0x2>;
+				clock-output-names = "rtcclk";
+			};
 		};
 
 		serial0: serial at 1c020000 {
@@ -339,5 +352,13 @@
 			phys = <&phy3 0>;
 			phy-names = "sata-phy";
 		};
+
+		rtc: rtc at 10510000 {
+			compatible = "apm,xgene-rtc";
+			reg = <0x0 0x10510000 0x0 0x400>;
+			interrupts = <0x0 0x46 0x4>;
+			#clock-cells = <1>;
+			clocks = <&rtcclk 0>;
+		};
 	};
 };
Signature · 1 line
1.5.5
#4 lore raw

PATCH v4 2/3 rtc: Add APM X-Gene SoC RTC driver

In reply to Loc Ho

drivers/rtc/rtc-xgene.c line 240

Quoted 9 lines · Loc Ho
drivers/rtc/rtc-xgene.c new file +9 -0
+	if (device_may_wakeup(&pdev->dev)) {
+		if (!enable_irq_wake(irq))
+			pdata->irq_wake = 1;
+	} else {
+		pdata->irq_enabled = xgene_rtc_alarm_irq_enabled(dev);
+		xgene_rtc_alarm_irq_enable(dev, 0);
+		clk_disable(pdata->clk);
+	}
+	clk_unprepare(pdata->clk);

This will unconditionally unprepare the clock even if it wasn't disabled which looks like a bug - I would have expected the disable to be a clk_disable_unprepare() instead? Similarly for the resume path.

Otherwise this looks good to me.
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author
#5 lore raw

PATCH v4 2/3 rtc: Add APM X-Gene SoC RTC driver

Hi,

Quoted 11 lines

drivers/rtc/rtc-xgene.c line 240

Quoted 10 lines
drivers/rtc/rtc-xgene.c new file +9 -0
+     if (device_may_wakeup(&pdev->dev)) {
+             if (!enable_irq_wake(irq))
+                     pdata->irq_wake = 1;
+     } else {
+             pdata->irq_enabled = xgene_rtc_alarm_irq_enabled(dev);
+             xgene_rtc_alarm_irq_enable(dev, 0);
+             clk_disable(pdata->clk);
+     }
+     clk_unprepare(pdata->clk);
Quoted 4 lines

This will unconditionally unprepare the clock even if it wasn't disabled which looks like a bug - I would have expected the disable to be a clk_disable_unprepare() instead? Similarly for the resume path.

I was modeled after driver rtc-coh901331.c. It seems like all I need here is to call clk_disable_unprepare() instead clk_disable for suspend. For resume, call clk_prepare_disable() instead clk_enable(). No need to split them up. Am I correct?

Given that Andrew Morton applied v2, should I post an patch against v2 going forward?

-Loc

#6 lore raw

PATCH v4 2/3 rtc: Add APM X-Gene SoC RTC driver

Quoted 4 lines · Loc Ho

I was modeled after driver rtc-coh901331.c. It seems like all I need here is to call clk_disable_unprepare() instead clk_disable for suspend. For resume, call clk_prepare_disable() instead clk_enable(). No need to split them up. Am I correct?

Yes, the only reason the two operations are split is to support enabling and disabling in interrupt context but you're not doing that.

Quoted 2 lines

Given that Andrew Morton applied v2, should I post an patch against v2 going forward?

Yes, once something has been applied you should only be sending
incremental patches.
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