ARM: dts: imx51-babbage: Use separate pingroup for gpio-keys
Subsystems (2)
PATCH 1/10 ARM: dts: imx51-babbage: Use separate pingroup for gpio-keys
This patch moves GPIOs definitions for "gpio-keys" into a separate pingroup.
--- arch/arm/boot/dts/imx51-babbage.dts | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx51-babbage.dts +8 -1
@@ -82,6 +82,8 @@ gpio-keys { compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; power { label = "Power Button";
@@ -333,7 +335,6 @@ MX51_PAD_GPIO1_1__SD1_WP 0x20d5 MX51_PAD_GPIO1_5__GPIO1_5 0x100 MX51_PAD_GPIO1_6__GPIO1_6 0x100 - MX51_PAD_EIM_A27__GPIO2_21 0x5 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
@@ -402,6 +403,12 @@ >; }; + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX51_PAD_EIM_A27__GPIO2_21 0x5 + >; + }; + pinctrl_gpio_leds: gpioledsgrp { fsl,pins = < MX51_PAD_EIM_D22__GPIO2_6 0x80000000
Signature · 1 line
1.8.3.2
PATCH 2/10 ARM: dts: imx51-babbage: Use separate pingroup for fixed-clock
This patch moves GPIOs definitions for "fixed-clock" into a separate pingroup.
--- arch/arm/boot/dts/imx51-babbage.dts | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx51-babbage.dts +8 -1
@@ -125,6 +125,8 @@ clk_26M: codec_clock { compatible = "fixed-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clkcodec>; reg=<0>; #clock-cells = <0>; clock-frequency = <26000000>;
@@ -337,7 +339,6 @@ MX51_PAD_GPIO1_6__GPIO1_6 0x100 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 >; };
@@ -350,6 +351,12 @@ >; }; + pinctrl_clkcodec: clkcodecgrp { + fsl,pins = < + MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 + >; + }; + pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
Signature · 1 line
1.8.3.2
PATCH 2/10 ARM: dts: imx51-babbage: Use separate pingroup for fixed-clock
Quoted 13 lines · Alexander Shiyan
This patch moves GPIOs definitions for "fixed-clock" into a separate pingroup.
Signed-off-by Alexander Shiyan <[email protected]>--- arch/arm/boot/dts/imx51-babbage.dts | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)arch/arm/boot/dts/imx51-babbage.dts +0
-0
arch/arm/boot/dts/imx51-babbage.dts line 129
Quoted 5 lines
arch/arm/boot/dts/imx51-babbage.dts +2
-0@@ -125,6 +125,8 @@ clk_26M: codec_clock { compatible = "fixed-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clkcodec>;
Are you sure that pinctrl-* settings work for a fixed-clock? My impression is that it only works for the device that Linux creates struct device and probes for.
Shawn
Quoted 29 lines
arch/arm/boot/dts/imx51-babbage.dts +6
-1reg=<0>; #clock-cells = <0>; clock-frequency = <26000000>;@@ -337,7 +339,6 @@ MX51_PAD_GPIO1_6__GPIO1_6 0x100 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 >; };@@ -350,6 +351,12 @@ >; }; + pinctrl_clkcodec: clkcodecgrp { + fsl,pins = < + MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 + >; + }; + pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185Signature · 1 line
1.8.3.2
Re: [PATCH 02/10] ARM: dts: imx51-babbage: Use separate pingroup for fixed-clock
Sun, 13 Apr 2014 16:18:07 +0800 ?? Shawn Guo <[email protected]>:
Quoted 15 lines · Alexander Shiyan
Quoted 14 lines
This patch moves GPIOs definitions for "fixed-clock" into a separate pingroup.
Signed-off-by Alexander Shiyan <[email protected]>--- arch/arm/boot/dts/imx51-babbage.dts | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)arch/arm/boot/dts/imx51-babbage.dts +0
-0@@ -125,6 +125,8 @@
Quoted 8 lines
arch/arm/boot/dts/imx51-babbage.dts line 129
Quoted 4 lines
arch/arm/boot/dts/imx51-babbage.dts +2
-0clk_26M: codec_clock { compatible = "fixed-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clkcodec>;Are you sure that pinctrl-* settings work for a fixed-clock? My impression is that it only works for the device that Linux creates struct device and probes for.
Hmm, you are right.
In this case, it would be logical to move the pinctrl definition for this GPIO to the codec node.
---
PATCH 3/10 ARM: dts: imx51-babbage: Use separate pingroup for regulator-fixed
In reply to Alexander ShiyanThis patch moves GPIOs definitions for "regulator-fixed" into a separate pingroup. Additionally, this patch fixes GPIO active level definition.
--- arch/arm/boot/dts/imx51-babbage.dts | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)
arch/arm/boot/dts/imx51-babbage.dts +9 -2
@@ -141,11 +141,13 @@ reg_usb_vbus: regulator at 0 { compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbreg>; reg = <0>; regulator-name = "usb_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpio2 5 0>; + gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; enable-active-high; }; };
@@ -536,7 +538,12 @@ MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x80000000 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x80000000 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x80000000 - MX51_PAD_EIM_D21__GPIO2_5 0x80000000 + >; + }; + + pinctrl_usbreg: usbreggrp { + fsl,pins = < + MX51_PAD_EIM_D21__GPIO2_5 0x85 >; }; };
Signature · 1 line
1.8.3.2
PATCH 4/10 ARM: dts: imx51-babbage: Move "hog" pins into corresponded pin groups
In reply to Alexander ShiyanMove "hog" pins into corresponded pin groups for eSDHC1, eSDHC2 and eCSPI1.
--- arch/arm/boot/dts/imx51-babbage.dts | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-)
arch/arm/boot/dts/imx51-babbage.dts +6 -14
@@ -329,21 +329,7 @@ }; &iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - imx51-babbage { - pinctrl_hog: hoggrp { - fsl,pins = < - MX51_PAD_GPIO1_0__SD1_CD 0x20d5 - MX51_PAD_GPIO1_1__SD1_WP 0x20d5 - MX51_PAD_GPIO1_5__GPIO1_5 0x100 - MX51_PAD_GPIO1_6__GPIO1_6 0x100 - MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 - MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 - >; - }; - pinctrl_audmux: audmuxgrp { fsl,pins = < MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
@@ -364,6 +350,8 @@ MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 + MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */ + MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 /* CS1 */ >; };
@@ -375,6 +363,8 @@ MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 + MX51_PAD_GPIO1_0__SD1_CD 0x20d5 + MX51_PAD_GPIO1_1__SD1_WP 0x20d5 >; };
@@ -386,6 +376,8 @@ MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 + MX51_PAD_GPIO1_5__GPIO1_5 0x100 /* WP */ + MX51_PAD_GPIO1_6__GPIO1_6 0x100 /* CD */ >; };
Signature · 1 line
1.8.3.2
PATCH 5/10 ARM: dts: imx51-babbage: Add missing pingroup for PMIC
In reply to Alexander ShiyanThis patch adds missing pin definition for PMIC IRQ GPIO.
--- arch/arm/boot/dts/imx51-babbage.dts | 8 ++++++++ 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx51-babbage.dts +8 -0
@@ -201,6 +201,8 @@ #address-cells = <1>; #size-cells = <0>; compatible = "fsl,mc13892"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; spi-max-frequency = <6000000>; spi-cs-high; reg = <0>;
@@ -492,6 +494,12 @@ >; }; + pinctrl_pmic: pmicgrp { + fsl,pins = < + MX51_PAD_GPIO1_8__GPIO1_8 0xe5 /* IRQ */ + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
Signature · 1 line
1.8.3.2
PATCH 6/10 ARM: dts: imx51-babbage: Use predefined constants for keys definition
In reply to Alexander Shiyan--- arch/arm/boot/dts/imx51-babbage.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/imx51-babbage.dts +1 -1
@@ -88,7 +88,7 @@ power { label = "Power Button"; gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; - linux,code = <116>; /* KEY_POWER */ + linux,code = <KEY_POWER>; gpio-key,wakeup; }; };
Signature · 1 line
1.8.3.2
PATCH 7/10 ARM: dts: imx51-babbage: Add USB OTG regulator node
In reply to Alexander ShiyanThis patch adds a regulator node and pinctrl group for USB OTG.
--- arch/arm/boot/dts/imx51-babbage.dts | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-)
arch/arm/boot/dts/imx51-babbage.dts +24 -5
@@ -139,17 +139,29 @@ #address-cells = <1>; #size-cells = <0>; - reg_usb_vbus: regulator at 0 { + reg_usbh1_vbus: regulator at 0 { compatible = "regulator-fixed"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbreg>; + pinctrl-0 = <&pinctrl_usbh1reg>; reg = <0>; - regulator-name = "usb_vbus"; + regulator-name = "usbh1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + reg_usbotg_vbus: regulator at 1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotgreg>; + reg = <1>; + regulator-name = "usbotg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; usbphy {
@@ -541,11 +553,17 @@ >; }; - pinctrl_usbreg: usbreggrp { + pinctrl_usbh1reg: usbh1reggrp { fsl,pins = < MX51_PAD_EIM_D21__GPIO2_5 0x85 >; }; + + pinctrl_usbotgreg: usbotgreggrp { + fsl,pins = < + MX51_PAD_GPIO1_7__GPIO1_7 0x85 + >; + }; }; };
@@ -618,7 +636,7 @@ &usbh1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbh1>; - vbus-supply = <®_usb_vbus>; + vbus-supply = <®_usbh1_vbus>; fsl,usbphy = <&usbh1phy>; phy_type = "ulpi"; status = "okay";
@@ -628,5 +646,6 @@ dr_mode = "otg"; disable-over-current; phy_type = "utmi_wide"; + vbus-supply = <®_usbotg_vbus>; status = "okay"; };
Signature · 1 line
1.8.3.2
PATCH 8/10 ARM: dts: imx51-babbage: Sort nodes by name
In reply to Alexander ShiyanThis patch sorts nodes by name and moves "iomux" configuration at the end of file.
--- arch/arm/boot/dts/imx51-babbage.dts | 274 ++++++++++++++++++------------------ 1 file changed, 137 insertions(+), 137 deletions(-)
arch/arm/boot/dts/imx51-babbage.dts +137 -137
@@ -21,6 +21,22 @@ reg = <0x90000000 0x20000000>; }; + clocks { + ckih1 { + clock-frequency = <22579200>; + }; + + clk_26M: codec_clock { + compatible = "fixed-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clkcodec>; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <26000000>; + gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; + }; + }; + display0: display at di0 { compatible = "fsl,imx-parallel-display"; interface-pix-fmt = "rgb24";
@@ -104,36 +120,6 @@ }; }; - sound { - compatible = "fsl,imx51-babbage-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "imx51-babbage-sgtl5000"; - ssi-controller = <&ssi2>; - audio-codec = <&sgtl5000>; - audio-routing = - "MIC_IN", "Mic Jack", - "Mic Jack", "Mic Bias", - "Headphone Jack", "HP_OUT"; - mux-int-port = <2>; - mux-ext-port = <3>; - }; - - clocks { - ckih1 { - clock-frequency = <22579200>; - }; - - clk_26M: codec_clock { - compatible = "fixed-clock"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_clkcodec>; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <26000000>; - gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; - }; - }; - regulators { compatible = "simple-bus"; #address-cells = <1>;
@@ -164,6 +150,20 @@ }; }; + sound { + compatible = "fsl,imx51-babbage-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx51-babbage-sgtl5000"; + ssi-controller = <&ssi2>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <2>; + mux-ext-port = <3>; + }; + usbphy { #address-cells = <1>; #size-cells = <0>;
@@ -178,29 +178,6 @@ }; }; -&esdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_esdhc1>; - fsl,cd-controller; - fsl,wp-controller; - status = "okay"; -}; - -&esdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_esdhc2>; - cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; - wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - fsl,uart-has-rtscts; - status = "okay"; -}; - &ecspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>;
@@ -329,6 +306,51 @@ }; }; +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + fsl,cd-controller; + fsl,wp-controller; + status = "okay"; +}; + +&esdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc2>; + cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "mii"; + phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + phy-reset-duration = <1>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + sgtl5000: codec at 0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clk_26M>; + VDDA-supply = <&vdig_reg>; + VDDIO-supply = <&vvideo_reg>; + }; +}; + &ipu_di0_disp0 { remote-endpoint = <&display0_in>; };
@@ -337,11 +359,72 @@ remote-endpoint = <&display1_in>; }; +&kpp { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_kpp>; + linux,keymap = < + MATRIX_KEY(0, 0, KEY_UP) + MATRIX_KEY(0, 1, KEY_DOWN) + MATRIX_KEY(0, 2, KEY_VOLUMEDOWN) + MATRIX_KEY(0, 3, KEY_HOME) + MATRIX_KEY(1, 0, KEY_RIGHT) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_ENTER) + MATRIX_KEY(1, 3, KEY_VOLUMEUP) + MATRIX_KEY(2, 0, KEY_F6) + MATRIX_KEY(2, 1, KEY_F8) + MATRIX_KEY(2, 2, KEY_F9) + MATRIX_KEY(2, 3, KEY_F10) + MATRIX_KEY(3, 0, KEY_F1) + MATRIX_KEY(3, 1, KEY_F2) + MATRIX_KEY(3, 2, KEY_F3) + MATRIX_KEY(3, 3, KEY_POWER) + >; + status = "okay"; +}; + &ssi2 { fsl,mode = "i2s-slave"; status = "okay"; }; +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + fsl,uart-has-rtscts; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + fsl,uart-has-rtscts; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + vbus-supply = <®_usbh1_vbus>; + fsl,usbphy = <&usbh1phy>; + phy_type = "ulpi"; + status = "okay"; +}; + +&usbotg { + dr_mode = "otg"; + disable-over-current; + phy_type = "utmi_wide"; + vbus-supply = <®_usbotg_vbus>; + status = "okay"; +}; + &iomuxc { imx51-babbage { pinctrl_audmux: audmuxgrp {
@@ -414,7 +497,7 @@ MX51_PAD_NANDF_CS6__FEC_TDATA3 0x80000000 MX51_PAD_NANDF_CS7__FEC_TX_EN 0x80000000 MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x80000000 - MX51_PAD_EIM_A20__GPIO2_14 0x85 /* Reset */ + MX51_PAD_EIM_A20__GPIO2_14 0x85 /* Reset */ >; };
@@ -566,86 +649,3 @@ }; }; }; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - fsl,uart-has-rtscts; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - - sgtl5000: codec at 0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&clk_26M>; - VDDA-supply = <&vdig_reg>; - VDDIO-supply = <&vvideo_reg>; - }; -}; - -&audmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux>; - status = "okay"; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec>; - phy-mode = "mii"; - phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; - phy-reset-duration = <1>; - status = "okay"; -}; - -&kpp { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_kpp>; - linux,keymap = < - MATRIX_KEY(0, 0, KEY_UP) - MATRIX_KEY(0, 1, KEY_DOWN) - MATRIX_KEY(0, 2, KEY_VOLUMEDOWN) - MATRIX_KEY(0, 3, KEY_HOME) - MATRIX_KEY(1, 0, KEY_RIGHT) - MATRIX_KEY(1, 1, KEY_LEFT) - MATRIX_KEY(1, 2, KEY_ENTER) - MATRIX_KEY(1, 3, KEY_VOLUMEUP) - MATRIX_KEY(2, 0, KEY_F6) - MATRIX_KEY(2, 1, KEY_F8) - MATRIX_KEY(2, 2, KEY_F9) - MATRIX_KEY(2, 3, KEY_F10) - MATRIX_KEY(3, 0, KEY_F1) - MATRIX_KEY(3, 1, KEY_F2) - MATRIX_KEY(3, 2, KEY_F3) - MATRIX_KEY(3, 3, KEY_POWER) - >; - status = "okay"; -}; - -&usbh1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1>; - vbus-supply = <®_usbh1_vbus>; - fsl,usbphy = <&usbh1phy>; - phy_type = "ulpi"; - status = "okay"; -}; - -&usbotg { - dr_mode = "otg"; - disable-over-current; - phy_type = "utmi_wide"; - vbus-supply = <®_usbotg_vbus>; - status = "okay"; -};
Signature · 1 line
1.8.3.2
PATCH 9/10 ARM: dts: imx51-babbage: Add "clock-frequency" property for I2C2
In reply to Alexander ShiyanThis patch adds missing "clock-frequency" property for I2C2. Value was be taken from old non-DT board file.
--- arch/arm/boot/dts/imx51-babbage.dts | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/imx51-babbage.dts +1 -0
@@ -340,6 +340,7 @@ &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; status = "okay"; sgtl5000: codec at 0a {
Signature · 1 line
1.8.3.2
PATCH 9/10 ARM: dts: imx51-babbage: Add "clock-frequency" property for I2C2
Quoted 13 lines · Alexander Shiyan
This patch adds missing "clock-frequency" property for I2C2. Value was be taken from old non-DT board file.
Signed-off-by Alexander Shiyan <[email protected]>--- arch/arm/boot/dts/imx51-babbage.dts | 1 + 1 file changed, 1 insertion(+)arch/arm/boot/dts/imx51-babbage.dts +0
-0
arch/arm/boot/dts/imx51-babbage.dts line 343
Quoted 4 lines
arch/arm/boot/dts/imx51-babbage.dts +1
-0@@ -340,6 +340,7 @@ &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>;
This is unnecessary. Documentation/devicetree/bindings/i2c/i2c-imx.txt:
Optional properties:
- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz. The absence of the propoerty indicates the default frequency 100 kHz.
Shawn
Quoted 8 lines
arch/arm/boot/dts/imx51-babbage.dts +0
-0status = "okay"; sgtl5000: codec at 0a {Signature · 1 line
1.8.3.2
PATCH 10/10 ARM: dts: imx51-babbage: Add devicetree node for I2C1
In reply to Alexander ShiyanThis patch adds devicetree node and pinctrl group for I2C1.
--- arch/arm/boot/dts/imx51-babbage.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
arch/arm/boot/dts/imx51-babbage.dts +14 -0
@@ -337,6 +337,13 @@ status = "okay"; }; +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <100000>; + status = "okay"; +}; + &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>;
@@ -514,6 +521,13 @@ >; }; + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX51_PAD_EIM_D19__I2C1_SCL 0x400001ed + MX51_PAD_EIM_D16__I2C1_SDA 0x400001ed + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
Signature · 1 line
1.8.3.2