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ARM: dts: imx27-phytec-phycore-som: Move PMIC IRQ GPIO into a separate pin group

PATCH New Fabio Estevam 2 participants 2 messages Apr 16, 2014 – Apr 17, 2014

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Device tree bindings Arm i.MX and Layerscape
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Fabio Estevam

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PATCH 1/1 ARM: dts: imx27-phytec-phycore-som: Move PMIC IRQ GPIO into a separate pin group

From: Fabio Estevam <[email protected]>

The hardware is better described if we place the PMIC IRQ GPIO into its own pingroup.

Signed-off-by Fabio Estevam <[email protected]>
---
 arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi +8 -1
index d7ed63c..9b3c759 100644
@@ -69,6 +69,8 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "fsl,mc13783";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pmic>;
 		reg = <0>;
 		spi-cs-high;
 		spi-max-frequency = <20000000>;

@@ -204,7 +206,6 @@
 				MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
 				MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
 				MX27_PAD_CSPI1_SS0__GPIO4_28	0x0 /* SPI1 CS0 */
-				MX27_PAD_USB_PWR__GPIO2_23	0x0 /* PMIC IRQ */
 			>;
 		};
 

@@ -251,6 +252,12 @@
 			>;
 		};
 
+		pinctrl_pmic: pmicgrp {
+			fsl,pins = <
+				MX27_PAD_USB_PWR__GPIO2_23	0x0 /* PMIC IRQ */
+			>;
+		};
+
 		pinctrl_ssi1: ssi1grp {
 			fsl,pins = <
 				MX27_PAD_SSI1_FS__SSI1_FS 0x0
Signature · 1 line
1.8.3.2
Applied
#1 lore raw

PATCH 1/1 ARM: dts: imx27-phytec-phycore-som: Move PMIC IRQ GPIO into a separate pin group

Quoted 6 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

The hardware is better described if we place the PMIC IRQ GPIO into its own pingroup.

Signed-off-by Fabio Estevam <[email protected]>

Applied, thanks.