pinctrl: msm: Add more MSM8X74 pin definitions
PATCH v2 1/1 pinctrl: msm: Add more MSM8X74 pin definitions
This patch adds pin definitiones for the MSM8x74 TLMM. New definitions include:
BLSP devices (I2C, UART, UART flow control, SPI, and UIM), mi2s, gp clk, pdm, gcc clk, cci_timer, cci_i2c, cam_clk, hsic, tsif, sdc3, sdc4, and other assorted pins.
--- .../bindings/pinctrl/qcom,msm8974-pinctrl.txt | 22 +- drivers/pinctrl/pinctrl-msm8x74.c | 675 ++++++++++++++++---- 2 files changed, 557 insertions(+), 140 deletions(-)
Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt +21 -1
@@ -50,7 +50,27 @@ Valid values for pins are: Supports bias and drive-strength Valid values for function are: - blsp_i2c2, blsp_i2c6, blsp_i2c11, blsp_spi1, blsp_uart2, blsp_uart8, slimbus + cci_i2c0, cci_i2c1, uim1, uim2, uim_batt_alarm, + blsp_uim1, blsp_uart1, blsp_uart1_flow, blsp_i2c1, blsp_spi1, + blsp_uim2, blsp_uart2, blsp_uart2_flow, blsp_i2c2, blsp_spi2, + blsp_uim3, blsp_uart3, blsp_uart3_flow, blsp_i2c3, blsp_spi3, + blsp_uim4, blsp_uart4, blsp_uart4_flow, blsp_i2c4, blsp_spi4, + blsp_uim5, blsp_uart5, blsp_uart5_flow, blsp_i2c5, blsp_spi5, + blsp_uim6, blsp_uart6, blsp_uart6_flow, blsp_i2c6, blsp_spi6, + blsp_uim7, blsp_uart7, blsp_uart7_flow, blsp_i2c7, blsp_spi7, + blsp_uim8, blsp_uart8, blsp_uart8_flow, blsp_i2c8, blsp_spi8, + blsp_uim9, blsp_uart9, blsp_uart9_flow, blsp_i2c9, blsp_spi9, + blsp_uim10, blsp_uart10, blsp_uart10_flow, blsp_i2c10, blsp_spi10, + blsp_uim11, blsp_uart11, blsp_uart11_flow, blsp_i2c11, blsp_spi11, + blsp_uim12, blsp_uart12, blsp_uart12_flow, blsp_i2c12, blsp_spi12, + blsp_spi1_cs1, blsp_spi2_cs2, blsp_spi_cs3, blsp_spi2_cs1, blsp_spi2_cs2 + blsp_spi2_cs3, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3, + sdc3, sdc4, gcc_gp_clk1, gcc_gp_clk2, gcc_gp_clk3, cci_timer0, cci_timer1, + cci_timer2, cci_timer3, cci_async_in0, cci_async_in1, cci_async_in2, + cam_mckl0, cam_mclk1, cam_mclk2, cam_mclk3, mdp_vsync, hdmi_cec, hdmi_ddc, + hdmi_hpd, edp_hpd, gp_pdm0, gp_pdm1, gp_pdm2, gp_pdm3, gp0_clk, gp1_clk, + gp_mn, tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s, spkr_mi2s, + ter_mi2s, sec_mi2s, slimbus (Note that this is not yet the complete list of functions)
drivers/pinctrl/pinctrl-msm8x74.c +536 -139
721 lines not on this page · raw message
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
Quoted 8 lines · Andy Gross
This patch adds pin definitiones for the MSM8x74 TLMM. New definitions include:
BLSP devices (I2C, UART, UART flow control, SPI, and UIM), mi2s, gp clk, pdm, gcc clk,
cci_timer,cci_i2c,cam_clk, hsic, tsif, sdc3, sdc4, and other assorted pins.Signed-off-by Andy Gross <[email protected]>
Awesome stuff, only have some minor comments.
Quoted 2 lines
drivers/pinctrl/pinctrl-msm8x74.c +2
-0+ MSM_MUX_blsp_uart1, + MSM_MUX_blsp_uart1_flow,
[...]
drivers/pinctrl/pinctrl-msm8x74.c static const unsigned int sdc2_data_pins[] = { 151 }; · line 523
Quoted 2 lines
drivers/pinctrl/pinctrl-msm8x74.c +2
-0+static const char *const blsp_uim1_groups[] = {"gpio0" ,"gpio1" }; +static const char *const blsp_uart1_flow_groups[] = {"gpio2" ,"gpio3" };
You don't need to separate uart and flow control into two different functions here. If you have gpio0-gpio3 in a group named uart1 both of the following snippets are valid:
uart1 {
pins = "gpio0", "gpio1";
function = "uart1";
};uart1 {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
function = "uart1";
};This is how I had to handle gsbis in family a, where a gsbi is pairs of pins with different configurations.
[...]
drivers/pinctrl/pinctrl-msm8x74.c static const unsigned int sdc2_data_pins[] = { 151 }; · line 676
Quoted 3 lines
drivers/pinctrl/pinctrl-msm8x74.c +3
-0+static const char *const hdmi_cec_groups[] = {"gpio31" }; +static const char *const hdmi_ddc_groups[] = {"gpio32" ,"gpio33" }; +static const char *const hdmi_hpd_groups[] = {"gpio34" };
As with the uart vs uart_flow you could group these as "hdmi", but maybe not as useful.
[...]
drivers/pinctrl/pinctrl-msm8x74.c static const unsigned int sdc2_data_pins[] = { 151 }; · line 880
Quoted 10 lines
drivers/pinctrl/pinctrl-msm8x74.c +10
-0+PINGROUP (35 ,NA , sdc3,NA ,NA ,NA ,NA ,NA ), +PINGROUP (36 ,NA , sdc3,NA ,NA ,NA ,NA ,NA ), +PINGROUP (37 ,NA , sdc3,NA ,NA ,NA ,NA ,NA ), +PINGROUP (38 ,NA , sdc3,NA ,NA ,NA ,NA ,NA ), +PINGROUP (39 ,NA , sdc3,NA ,NA ,NA ,NA ,NA ), +PINGROUP (40 ,NA , sdc3,NA ,NA ,NA ,NA ,NA ), +PINGROUP (41 ,NA , blsp_spi7, blsp_uart7, blsp_uim7,NA ,NA ,NA ), +PINGROUP (42 ,NA , blsp_spi7, blsp_uart7, blsp_uim7,NA ,NA ,NA ), +PINGROUP (43 ,NA , blsp_spi7, blsp_uart7_flow, blsp_i2c7,NA ,NA ,NA ), + PINGROUP(44, NA, blsp_spi7, blsp_uart7_flow, blsp_i2c7, NA, NA, NA),
I was expecting wcnss, bt and fm as function 1 for pins 35-44. Adding those and I think we have everything we use in our devices.
[...]
Quoted 1 line
+
PINGROUP(72, NA, spkr_mi2s, NA, NA, NA, NA, NA),
spkr_mi2s is function 1 for pin 72.
Regards,
Bjorn