ARM: dts: qcom: Update msm8974/apq8074 device trees
Subsystems (2)
PATCH v2 1/1 ARM: dts: qcom: Update msm8974/apq8074 device trees
* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-apq8074-dragonboard.dts)
* Move spi pinctrl into board file
* Cleanup cpu node to match binding spec, enable-method and compatible should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the binding spec
* Move timer node out of SoC container
Signed-off-by Kumar Gala <[email protected]>
---
v2:
* Move timer node out of SoC container
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 28 ++++++++++++++- arch/arm/boot/dts/qcom-msm8974.dtsi | 49 ++++++++++---------------- 2 files changed, 45 insertions(+), 32 deletions(-)
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +27 -1
@@ -4,7 +4,11 @@ model = "Qualcomm APQ8074 Dragonboard"; compatible = "qcom,apq8074-dragonboard", "qcom,apq8074"; - soc: soc { + soc { + serial at f991e000 { + status = "ok"; + }; + sdhci at f9824900 { bus-width = <8>; non-removable;
@@ -15,5 +19,27 @@ cd-gpios = <&msmgpio 62 0x1>; bus-width = <4>; }; + + + pinctrl at fd510000 { + spi8_default: spi8_default { + mosi { + pins = "gpio45"; + function = "blsp_spi8"; + }; + miso { + pins = "gpio46"; + function = "blsp_spi8"; + }; + cs { + pins = "gpio47"; + function = "blsp_spi8"; + }; + clk { + pins = "gpio48"; + function = "blsp_spi8"; + }; + }; + }; }; };
arch/arm/boot/dts/qcom-msm8974.dtsi +18 -31
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