PATCH v4 0/4] edac: Add APM X-Gene SoC EDAC driver
Subsystems (3)
This patch adds support for the APM X-Gene SoC EDAC driver.
v4:
* Fix PMD l1/l2 error reading address due to wrong variable type
* Fix clearing of software generated and HW errors for l1/l2
v3:
* Update binding documentation for PMD DT node and exampples
* Add binding documentation for SoC DT node
* Change MC, PMD, and L3C driver error injection to use debugfs
* Add missing IRQ for MC correctable error (code and DT)
* Use true/false where appropriate instead 1/0
* Add bit definition for L1 MMUESR register and fully decode this error
* Remove the un-necessary dev variable from xgene_edac_pmd_ctx structure
* Add check for disabled PMD (code and DT)
* Switch to edac_printk instead pr_err
* Some minor comments update
v2:
* Add EDAC entry in MAINTAINERS for APM EDAC driver
* Remove the MC scrub patch
* Remove the word 'Caches' from Kconfig
* Change all MASK defines to use BIT(x)
* Update comment or remove them
* Wrap error injection code around CONFIG_EDAC_DEBUG
* Change function name xgene_edac_mc_hw_init to xgene_edac_mc_irq_ctl
* Change all function XXX_hw_init to XXX_hw_ctl
* Fix typo 'activie'
* Move calling function edac_mc_alloc after resource retrieval
* Check for NULL on platform_get_resource return if reference directly
* Add documentation for struct xgene_edac_pmd_ctx
* Move L1 and L2 check out of function xgene_edac_pmd_check to its own functions
* Use for loop for configure each CPU of an PMD
* Replace /2 by >> 1
* Remove unnecessary comment on edac_device_add_device failure
* Make mem_err_ip static const
* Unwind EDAC register correctly if failed
---
Loc Ho (4):
MAINTAINERS: Add entry for APM X-Gene SoC EDAC driver
Documentation: Add documentation for the APM X-Gene SoC EDAC DTS
binding
edac: Add APM X-Gene SoC EDAC driver
arm64: Add APM X-Gene SoC EDAC DTS entries
.../devicetree/bindings/edac/apm-xgene-edac.txt | 81 + MAINTAINERS | 8 + arch/arm64/boot/dts/apm-storm.dtsi | 97 + drivers/edac/Kconfig | 9 +- drivers/edac/Makefile | 3 + drivers/edac/xgene_edac.c | 2049 ++++++++++++++++++++ 6 files changed, 2246 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt create mode 100644 drivers/edac/xgene_edac.c
PATCH v4 1/4 MAINTAINERS: Add entry for APM X-Gene SoC EDAC driver
This patch adds a MAINTAINERS entry for APM X-Gene SoC EDAC driver.
--- MAINTAINERS | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-)
MAINTAINERS +8 -0
@@ -3321,6 +3321,14 @@ W: bluesmoke.sourceforge.net S: Maintained F: drivers/edac/sb_edac.c +EDAC-XGENE +APPLIED MICRO (APM) X-GENE SOC EDAC +M: Loc Ho <[email protected]> +M: Feng Kan <[email protected]> +S: Supported +F: drivers/edac/xgene_edac.c +F: Documentation/devicetree/bindings/edac/apm-xgene-edac.txt + EDIROL UA-101/UA-1000 DRIVER M: Clemens Ladisch <[email protected]> L: alsa-devel at alsa-project.org (moderated for non-subscribers)
Signature · 1 line
1.5.5
PATCH v4 2/4 Documentation: Add documentation for the APM X-Gene SoC EDAC DTS binding
This patch adds documentation for the APM X-Gene SoC EDAC DTS binding.
--- .../devicetree/bindings/edac/apm-xgene-edac.txt | 81 ++++++++++++++++++++ 1 files changed, 81 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +81 -0
@@ -0,0 +1,81 @@ +* APM X-Gene EDAC nodes + +EDAC nodes are defined to describe on-chip error detection and correction. +There are four types of EDAC: + + memory controller - Memory controller + PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache + L3 - CPU L3 cache + SoC - SoC IP such as SATA, Ethernet, and etc + +The following section describes the memory controller DT node binding. + +Required properties: +- compatible : Shall be "apm,xgene-edac-mc". +- reg : First resource shall be the PCP resource. + Second resource shall be the CSW resource. + Third resource shall be the MCB-A resource. + Fourth resource shall be the MCB-B resource. + Fifth resource shall be the MCU resource. +- interrupts : Interrupt-specifier for MCU error IRQ(s). + +The following section describes the L1/L2 DT node binding. + +- compatible : Shall be "apm,xgene-edac-pmd". +- reg : First resource shall be the PCP resource. + Second resource shall be the PMD resource. + Third resource shall be the PMD efuse resource. +- interrupts : Interrupt-specifier for PMD error IRQ(s). + +The following section describes the L3 DT node binding. + +- compatible : Shall be "apm,xgene-edac-l3". +- reg : First resource shall be the PCP resource. + Second resource shall be the L3 resource. +- interrupts : Interrupt-specifier for L3 error IRQ(s). + +The following section describes the SOC DT node binding. + +- compatible : Shall be "apm,xgene-edac-soc"". +- reg : First resource shall be the PCP resource. + Second resource shall be the SOC resource. +- interrupts : nterrupt-specifier for SoC error IRQ(s). + +Example: + edacmc0: edacmc0 at 7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e800000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacl3: edacl3 at 7e600000 { + compatible = "apm,xgene-edac-l3"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e600000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd0: edacpmd0 at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c000000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacsoc: edacsoc at 7e930000 { + compatible = "apm,xgene-edac-soc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e930000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + }; +
Signature · 1 line
1.5.5
PATCH v4 3/4 edac: Add APM X-Gene SoC EDAC driver
This patch adds support for the APM X-Gene SoC EDAC driver and requires ARM64 EDAC support patch [1] to compile.
[1] http://www.spinics.net/lists/arm-kernel/msg324093.html
--- drivers/edac/Kconfig | 9 +- drivers/edac/Makefile | 3 + drivers/edac/xgene_edac.c | 2049 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 2060 insertions(+), 1 deletions(-) create mode 100644 drivers/edac/xgene_edac.c
drivers/edac/Kconfig +8 -1
@@ -10,7 +10,7 @@ config EDAC_SUPPORT menuconfig EDAC bool "EDAC (Error Detection And Correction) reporting" depends on HAS_IOMEM - depends on X86 || PPC || TILE || ARM || EDAC_SUPPORT + depends on X86 || PPC || TILE || ARM || ARM64 || EDAC_SUPPORT help EDAC is designed to report errors in the core system. These are low-level errors that are reported in the CPU or
@@ -368,4 +368,11 @@ config EDAC_OCTEON_PCI Support for error detection and correction on the Cavium Octeon family of SOCs. +config EDAC_XGENE + tristate "APM X-Gene SoC" + depends on EDAC_MM_EDAC && ARM64 + help + Support for error detection and correction on the + APM X-Gene family of SOCs. + endif # EDAC
drivers/edac/Makefile +3 -0
@@ -64,3 +64,6 @@ obj-$(CONFIG_EDAC_OCTEON_PC) += octeon_edac-pc.o obj-$(CONFIG_EDAC_OCTEON_L2C) += octeon_edac-l2c.o obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o + +obj-$(CONFIG_EDAC_XGENE) += xgene_edac.o +
drivers/edac/xgene_edac.c new file +2049 -0
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Signature · 1 line
1.5.5
PATCH v4 4/4 arm64: Add APM X-Gene SoC EDAC DTS entries
This patch adds APM X-Gene SoC EDAC DTS entries.
--- arch/arm64/boot/dts/apm-storm.dtsi | 97 ++++++++++++++++++++++++++++++++++++ 1 files changed, 97 insertions(+), 0 deletions(-)
arch/arm64/boot/dts/apm-storm.dtsi +97 -0
@@ -269,6 +269,103 @@ interrupts = <0x0 0x4c 0x4>; }; + edacmc0: edacmc0 at 7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e800000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacmc1: edacmc1 at 7e840000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e840000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacmc2: edacmc2 at 7e880000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e880000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacmc3: edacmc3 at 7e8c0000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e8c0000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd0: edacpmd0 at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c000000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd1: edacpmd1 at 7c200000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c200000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd2: edacpmd2 at 7c400000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c400000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd3: edacpmd3 at 7c600000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c600000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacl3: edacl3 at 7e600000 { + compatible = "apm,xgene-edac-l3"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e600000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacsoc: edacsoc at 7e930000 { + compatible = "apm,xgene-edac-soc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e930000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + }; + phy1: phy at 1f21a000 { compatible = "apm,xgene-phy"; reg = <0x0 0x1f21a000 0x0 0x100>;
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1.5.5