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bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag

PATCH Superseded Lubomir Rintel 2 participants 5 messages Jun 10, 2014 – Jun 14, 2014

Subsystems (3)
MMC, SD and SDIO Broadcom BCM2711/BCM2835 Arm architecture Broadcom BCM281XX/BCM11XXX/BCM216XX Arm architecture

v1 of 2 Superseded Latest is v2 →

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Lubomir Rintel

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#0 lore raw

PATCH 1/1 bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag

Seems like the controller doesn't support the flag. None of the hi-speed cards I've tried could be read, while they successfully worked with the quirk enabled.

Signed-off-by Lubomir Rintel <[email protected]>
---
 drivers/mmc/bcm2835_sdhci.c | 2 +-
 include/configs/rpi_b.h     | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)
drivers/mmc/bcm2835_sdhci.c +1 -1
index 54cfabf..82079d6 100644
@@ -179,7 +179,7 @@ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq)
 	host->name = "bcm2835_sdhci";
 	host->ioaddr = (void *)regbase;
 	host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B |
-		SDHCI_QUIRK_WAIT_SEND_CMD;
+		SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_NO_HISPD_BIT;
 	host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
 	host->ops = &bcm2835_ops;
include/configs/rpi_b.h +2 -0
index ed8b4df..1bcb798 100644
@@ -225,6 +225,8 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_INITRD_TAG
 
+#define CONFIG_SYS_GENERIC_BOARD
+
 #include <config_distro_defaults.h>
 
 /* Some things don't make sense on this HW or yet */
Signature · 1 line
1.9.3
author
#1 lore raw

PATCH v2 1/1 bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag

Seems like the controller doesn't support the flag. None of the hi-speed cards I've tried could be read, while they successfully worked with the quirk enabled.

Signed-off-by Lubomir Rintel <[email protected]>

---
Changes to v2:
- I've sent the first version with extra and irrelevant hunk. Sorry.

 drivers/mmc/bcm2835_sdhci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mmc/bcm2835_sdhci.c +1 -1
index 54cfabf..82079d6 100644
@@ -179,7 +179,7 @@ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq)
 	host->name = "bcm2835_sdhci";
 	host->ioaddr = (void *)regbase;
 	host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B |
-		SDHCI_QUIRK_WAIT_SEND_CMD;
+		SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_NO_HISPD_BIT;
 	host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
 	host->ops = &bcm2835_ops;
Signature · 1 line
1.9.3
#2 lore raw

PATCH v2 1/1 bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag

Quoted 2 lines · Lubomir Rintel

Seems like the controller doesn't support the flag. None of the hi-speed cards I've tried could be read, while they successfully worked with the quirk enabled.

Tested-by Stephen Warren <[email protected]>

(heh, I turned on my Pi for the first time in ages!)

#3 lore raw

PATCH v2 1/1 bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag

Quoted 6 lines · Stephen Warren
Quoted 2 lines · Lubomir Rintel

Seems like the controller doesn't support the flag. None of the hi-speed cards I've tried could be read, while they successfully worked with the quirk enabled.

Tested-by Stephen Warren <[email protected]>

(heh, I turned on my Pi for the first time in ages!)

Oh BTW, is a similar change required for the mainline kernel?

author
#4 lore raw

PATCH v2 1/1 bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag

Quoted 9 lines · Stephen Warren
Quoted 6 lines · Stephen Warren
Quoted 2 lines · Lubomir Rintel

Seems like the controller doesn't support the flag. None of the hi-speed cards I've tried could be read, while they successfully worked with the quirk enabled.

Tested-by Stephen Warren <[email protected]>

(heh, I turned on my Pi for the first time in ages!)

Oh BTW, is a similar change required for the mainline kernel?

No. For some reason, it works flawlessly for me.