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arm: add errata workarounds

PATCH Applied Lucas Stach 2 participants 5 messages Jun 25, 2014 – Jun 26, 2014

Subsystems (5)
Arm (32-bit) Arm sub-architectures Arm i.MX and Layerscape Tegra architecture support +1 more subsystems
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Lucas Stach

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#0 lore raw

PATCH 1/4 arm: add errata workarounds

From: Lucas Stach <[email protected]>

Header only implementation, so they can be pulled
into the individual SoC cpu init functions.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/include/asm/errata.h | 67 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 arch/arm/include/asm/errata.h
arch/arm/include/asm/errata.h new file +67 -0
new file mode 100644
index 0000000..e2ffd87
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2014 Lucas Stach, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+static inline void enable_arm_errata_716044_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c1, c0, 0\n"
+		"orr	r0, r0, #1 << 11\n"
+		"mcr	p15, 0, r0, c1, c0, 0\n"
+	);
+}
+
+static inline void enable_arm_errata_742230_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 4\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_743622_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 6\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_751472_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 11\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_761320_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 21\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_794072_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 4\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
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#1 lore raw

PATCH 2/4 arm: imx6: add cpu lowlevel init function

From: Lucas Stach <[email protected]>

Enables all relevant errata workarounds for the
i.MX6 SoC.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/mach-imx/Makefile               |  1 +
 arch/arm/mach-imx/cpu_init.c             | 27 +++++++++++++++++++++++++++
 arch/arm/mach-imx/include/mach/generic.h |  2 ++
 3 files changed, 30 insertions(+)
 create mode 100644 arch/arm/mach-imx/cpu_init.c
arch/arm/mach-imx/Makefile +1 -0
index 03e5b10..1d311a4 100644
@@ -22,3 +22,4 @@ obj-$(CONFIG_BAREBOX_UPDATE) += imx-bbu-internal.o
 obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o
 obj-$(CONFIG_BAREBOX_UPDATE_IMX6_NAND) += imx6-bbu-nand.o
 pbl-y += esdctl.o
+lwl-y += cpu_init.o
arch/arm/mach-imx/cpu_init.c new file +27 -0
new file mode 100644
index 0000000..68eacf7
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2014 Lucas Stach, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/barebox-arm-head.h>
+#include <asm/errata.h>
+
+void imx6_cpu_lowlevel_init(void)
+{
+	arm_cpu_lowlevel_init();
+
+	enable_arm_errata_742230_war();
+	enable_arm_errata_743622_war();
+	enable_arm_errata_751472_war();
+	enable_arm_errata_761320_war();
+	enable_arm_errata_794072_war();
+}
arch/arm/mach-imx/include/mach/generic.h +2 -0
index 506b1da..505a542 100644
@@ -33,6 +33,8 @@ int imx51_devices_init(void);
 int imx53_devices_init(void);
 int imx6_devices_init(void);
 
+void imx6_cpu_lowlevel_init(void);
+
 /* There's a off-by-one betweem the gpio bank number and the gpiochip */
 /* range e.g. GPIO_1_5 is gpio 5 under linux */
 #define IMX_GPIO_NR(bank, nr)		(((bank) - 1) * 32 + (nr))
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#2 lore raw

PATCH 3/4 arm: imx6: use imx6 specific cpu init function

In reply to Lucas Stach

From: Lucas Stach <[email protected]>

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c |  5 +++--
 arch/arm/boards/datamodul-edm-qmx6/lowlevel.c         |  3 ++-
 arch/arm/boards/dfi-fs700-m60/lowlevel.c              |  7 ++++---
 arch/arm/boards/embest-riotboard/lowlevel.c           |  2 +-
 arch/arm/boards/freescale-mx6-arm2/lowlevel.c         |  3 ++-
 arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c    |  5 +++--
 arch/arm/boards/freescale-mx6-sabresd/lowlevel.c      |  3 ++-
 arch/arm/boards/gk802/lowlevel.c                      |  3 ++-
 arch/arm/boards/guf-santaro/lowlevel.c                |  3 ++-
 arch/arm/boards/phytec-phycard-imx6/lowlevel.c        |  2 +-
 arch/arm/boards/phytec-phyflex-imx6/lowlevel.c        | 10 +++++-----
 arch/arm/boards/solidrun-hummingboard/lowlevel.c      |  3 ++-
 arch/arm/boards/tqma6x/lowlevel.c                     |  4 ++--
 arch/arm/boards/udoo/lowlevel.c                       |  3 ++-
 arch/arm/boards/variscite-mx6/lowlevel.c              |  2 +-
 15 files changed, 34 insertions(+), 24 deletions(-)
arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c +3 -2
index 60a84ef..5371be6 100644
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <sizes.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 

@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx6q_nitrogen6x_1g, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6q_nitrogen6x_start - get_runtime_offset();
 

@@ -22,7 +23,7 @@ ENTRY_FUNCTION(start_imx6dl_nitrogen6x_1g, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6dl_nitrogen6x_start - get_runtime_offset();
arch/arm/boards/datamodul-edm-qmx6/lowlevel.c +2 -1
index b1ce4e9..914c275 100644
@@ -21,6 +21,7 @@
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 #include <mach/imx6-mmdc.h>
+#include <mach/generic.h>
 
 static void sdram_init(void)
 {

@@ -142,7 +143,7 @@ ENTRY_FUNCTION(start_imx6_realq7, r0, r1, r2)
 	unsigned long sdram = 0x10000000;
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00940000 - 8);
arch/arm/boards/dfi-fs700-m60/lowlevel.c +4 -3
index 541e6c1..81b3530 100644
@@ -21,6 +21,7 @@
 #include <asm/barebox-arm.h>
 #include <mach/imx6-mmdc.h>
 #include <mach/imx6-regs.h>
+#include <mach/generic.h>
 
 #include <debug_ll.h>
 

@@ -106,7 +107,7 @@ ENTRY_FUNCTION(start_imx6q_dfi_fs700_m60_6q_nanya, r0, r1, r2)
 	void *fdt;
 	int i;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00940000 - 8);
 

@@ -125,7 +126,7 @@ ENTRY_FUNCTION(start_imx6q_dfi_fs700_m60_6q_micron, r0, r1, r2)
 	void *fdt;
 	int i;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00940000 - 8);
 

@@ -148,7 +149,7 @@ ENTRY_FUNCTION(start_imx6dl_dfi_fs700_m60_6s, r0, r1, r2)
 	void *fdt;
 	int i;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
arch/arm/boards/embest-riotboard/lowlevel.c +1 -1
index 64edd61..c4ef287 100644
@@ -30,7 +30,7 @@ ENTRY_FUNCTION(start_imx6s_riotboard, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	if (IS_ENABLED(CONFIG_DEBUG_LL)) {
 		writel(0x4, 0x020e016c);
arch/arm/boards/freescale-mx6-arm2/lowlevel.c +2 -1
index 53783bb..5676711 100644
@@ -2,9 +2,10 @@
 #include <sizes.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
+#include <mach/generic.h>
 
 void __naked barebox_arm_reset_vector(void)
 {
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 	barebox_arm_entry(0x10000000, SZ_2G, NULL);
 }
arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c +3 -2
index a154381..1b47965 100644
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <sizes.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 

@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx6q_sabrelite, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6q_sabrelite_start - get_runtime_offset();
 

@@ -22,7 +23,7 @@ ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6dl_sabrelite_start - get_runtime_offset();
arch/arm/boards/freescale-mx6-sabresd/lowlevel.c +2 -1
index 325de84..bf18459 100644
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <sizes.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 

@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx6q_sabresd, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6q_sabresd_start - get_runtime_offset();
arch/arm/boards/gk802/lowlevel.c +2 -1
index bfedfb6..de744a2 100644
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <sizes.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 

@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx6_gk802, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6q_gk802_start - get_runtime_offset();
 	barebox_arm_entry(0x10000000, SZ_1G, fdt);
arch/arm/boards/guf-santaro/lowlevel.c +2 -1
index daf9709..02de84c 100644
@@ -3,6 +3,7 @@
 #include <io.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
+#include <mach/generic.h>
 #include <mach/imx6-regs.h>
 #include <debug_ll.h>
 

@@ -33,7 +34,7 @@ ENTRY_FUNCTION(start_imx6q_guf_santaro, r0, r1, r2)
 	void *fdt;
 	int i;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
arch/arm/boards/phytec-phycard-imx6/lowlevel.c +1 -1
index 64312b0..b31638c 100644
@@ -59,7 +59,7 @@ static void __noreturn start_imx6q_phytec_pbaa03_common(uint32_t size)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
arch/arm/boards/phytec-phyflex-imx6/lowlevel.c +5 -5
index 6c6f660..ba6dab7 100644
@@ -61,7 +61,7 @@ ENTRY_FUNCTION(start_phytec_pbab01_1gib, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
 

@@ -77,7 +77,7 @@ ENTRY_FUNCTION(start_phytec_pbab01_2gib, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
 

@@ -95,7 +95,7 @@ ENTRY_FUNCTION(start_phytec_pbab01_4gib, r0, r1, r2)
 
 	__barebox_arm_head();
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
 

@@ -110,7 +110,7 @@ ENTRY_FUNCTION(start_phytec_pbab01dl_1gib, r0, r1, r2)
 
         __barebox_arm_head();
 
-        arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
         arm_setup_stack(0x00920000 - 8);
 

@@ -125,7 +125,7 @@ ENTRY_FUNCTION(start_phytec_pbab01s_512mb, r0, r1, r2)
 
 	__barebox_arm_head();
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
arch/arm/boards/solidrun-hummingboard/lowlevel.c +2 -1
index 8710d85..eb52838 100644
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <sizes.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 

@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx6dl_hummingboard, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6dl_hummingboard_start - get_runtime_offset();
 	barebox_arm_entry(0x10000000, SZ_512M, fdt);
arch/arm/boards/tqma6x/lowlevel.c +2 -2
index aed95e6..d2eea16 100644
@@ -45,7 +45,7 @@ ENTRY_FUNCTION(start_imx6q_mba6x, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
 

@@ -66,7 +66,7 @@ ENTRY_FUNCTION(start_imx6dl_mba6x, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
arch/arm/boards/udoo/lowlevel.c +2 -1
index 5eac7a3..3d9fc68 100644
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <sizes.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 

@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx6_udoo, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	fdt = __dtb_imx6q_udoo_start - get_runtime_offset();
arch/arm/boards/variscite-mx6/lowlevel.c +1 -1
index a2c0874..74f3a77 100644
@@ -61,7 +61,7 @@ ENTRY_FUNCTION(start_variscite_custom, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx6_cpu_lowlevel_init();
 
 	arm_setup_stack(0x00920000 - 8);
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author
#3 lore raw

PATCH 4/4 arm: tegra: enable ARM errata workarounds

In reply to Lucas Stach

From: Lucas Stach <[email protected]>

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/mach-tegra/tegra_maincomplex_init.c | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)
arch/arm/mach-tegra/tegra_maincomplex_init.c +19 -2
index 17490a4..4a362dd 100644
@@ -18,6 +18,7 @@
 #include <sizes.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
+#include <asm/errata.h>
 #include <mach/lowlevel.h>
 #include <mach/tegra20-pmc.h>
 #include <mach/tegra20-car.h>

@@ -30,6 +31,23 @@ void tegra_maincomplex_entry(void)
 
 	arm_cpu_lowlevel_init();
 
+	chiptype = tegra_get_chiptype();
+
+	/* enable ARM errata workarounds early */
+	switch (chiptype) {
+	case TEGRA20:
+		enable_arm_errata_716044_war();
+		enable_arm_errata_742230_war();
+		enable_arm_errata_751472_war();
+		break;
+	case TEGRA30:
+		enable_arm_errata_743622_war();
+		enable_arm_errata_751472_war();
+		break;
+	default:
+		break;
+	}
+
 	/* switch to PLLX */
 	writel(CRC_CCLK_BURST_POLICY_SYS_STATE_RUN <<
 	       CRC_CCLK_BURST_POLICY_SYS_STATE_SHIFT |

@@ -38,8 +56,6 @@ void tegra_maincomplex_entry(void)
 	       TEGRA_CLK_RESET_BASE + CRC_CCLK_BURST_POLICY);
 	writel(CRC_SUPER_CDIV_ENB, TEGRA_CLK_RESET_BASE + CRC_SUPER_CCLK_DIV);
 
-	chiptype = tegra_get_chiptype();
-
 	if (chiptype >= TEGRA114) {
 		asm("mrc p15, 1, %0, c9, c0, 2" : : "r" (reg));
 		reg &= ~7;

@@ -51,6 +67,7 @@ void tegra_maincomplex_entry(void)
 	case TEGRA20:
 		rambase = 0x0;
 		ramsize = tegra20_get_ramsize();
+
 		break;
 	case TEGRA30:
 	case TEGRA124:
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maintainer Applied
#4 lore raw
In reply to Lucas Stach
Quoted 6 lines · Lucas Stach

From: Lucas Stach <[email protected]>

Header only implementation, so they can be pulled
into the individual SoC cpu init functions.

Signed-off-by Lucas Stach <[email protected]>

Applied, thanks

Sascha

Quoted 87 lines
---
 arch/arm/include/asm/errata.h | 67 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 arch/arm/include/asm/errata.h
arch/arm/include/asm/errata.h new file +67 -0
new file mode 100644
index 0000000..e2ffd87
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2014 Lucas Stach, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+static inline void enable_arm_errata_716044_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c1, c0, 0\n"
+		"orr	r0, r0, #1 << 11\n"
+		"mcr	p15, 0, r0, c1, c0, 0\n"
+	);
+}
+
+static inline void enable_arm_errata_742230_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 4\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_743622_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 6\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_751472_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 11\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_761320_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 21\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
+
+static inline void enable_arm_errata_794072_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 4\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
Signature · 7 lines
1.9.3


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Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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