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85xx/b4860: Add alternate serdes protocols for B4860/B4420

PATCH New Shaveta Leekha 1 participant 1 message Nov 12, 2014 PowerPC

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Shaveta Leekha

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PATCH 1/3 85xx/b4860: Add alternate serdes protocols for B4860/B4420

Addded Alternate options with LC VCO for following protocols:
0x02 --> 0x01
0x08 --> 0x07
0x18 --> 0x17
0x1E --> 0x1D
0x49 --> 0x48
0x6F --> 0x6E
0x9A --> 0x99
0x9E --> 0x9D

Signed-off-by Shaveta Leekha <[email protected]>
Signed-off-by Poonam Aggrwal <[email protected]>i
Change-Id Iefe14012ee897095f0198453d50f31096ca020e2

Reviewed-on: http://git.am.freescale.net:8181/23352

Tested-by Review Code-CDREVIEW <[email protected]>
Reviewed-by Yusong Sun <[email protected]>
---
 arch/powerpc/cpu/mpc85xx/b4860_serdes.c |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)
arch/powerpc/cpu/mpc85xx/b4860_serdes.c +19 -0
index cf18be5..63172de 100644
@@ -18,6 +18,8 @@ struct serdes_config {
 #ifdef CONFIG_PPC_B4860
 static struct serdes_config serdes1_cfg_tbl[] = {
 	/* SerDes 1 */
+	{0x01, {AURORA, AURORA, CPRI6, CPRI5,
+		CPRI4, CPRI3, CPRI2, CPRI1} },
 	{0x02, {AURORA, AURORA, CPRI6, CPRI5,
 		CPRI4, CPRI3, CPRI2, CPRI1} },
 	{0x04, {AURORA, AURORA, CPRI6, CPRI5,

@@ -26,6 +28,8 @@ static struct serdes_config serdes1_cfg_tbl[] = {
 		CPRI4, CPRI3, CPRI2, CPRI1} },
 	{0x06, {AURORA, AURORA, CPRI6, CPRI5,
 		CPRI4, CPRI3, CPRI2, CPRI1} },
+	{0x07, {AURORA, AURORA, CPRI6, CPRI5,
+		CPRI4, CPRI3, CPRI2, CPRI1} },
 	{0x08, {AURORA, AURORA, CPRI6, CPRI5,
 		CPRI4, CPRI3, CPRI2, CPRI1} },
 	{0x09, {AURORA, AURORA, CPRI6, CPRI5,

@@ -184,12 +188,17 @@ static struct serdes_config serdes1_cfg_tbl[] = {
 		CPRI4, CPRI3, NONE, NONE} },
 	{0x0F, {NONE, NONE, CPRI6, CPRI5,
 		CPRI4, CPRI3, NONE, NONE} },
+	{0x17, {NONE, NONE,
+		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+		NONE, NONE, NONE, NONE} },
 	{0x18, {NONE, NONE,
 		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
 		NONE, NONE, NONE, NONE} },
 	{0x1B, {NONE, NONE,
 		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
 		NONE, NONE, NONE, NONE} },
+	{0x1D, {NONE, NONE, AURORA, AURORA,
+		NONE, NONE, NONE, NONE} },
 	{0x1E, {NONE, NONE, AURORA, AURORA,
 		NONE, NONE, NONE, NONE} },
 	{0x21, {NONE, NONE, AURORA, AURORA,

@@ -199,19 +208,29 @@ static struct serdes_config serdes1_cfg_tbl[] = {
 	{}
 };
 static struct serdes_config serdes2_cfg_tbl[] = {
+	{0x48, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		SGMII_FM1_DTSEC3, AURORA,
+		NONE, NONE, NONE, NONE} },
 	{0x49, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		SGMII_FM1_DTSEC3, AURORA,
 		NONE, NONE, NONE, NONE} },
 	{0x4A, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		SGMII_FM1_DTSEC3, AURORA,
 		NONE, NONE, NONE, NONE} },
+	{0x6E, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
+		AURORA, AURORA, NONE, NONE, NONE, NONE} },
 	{0x6F, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		AURORA, AURORA,	NONE, NONE, NONE, NONE} },
 	{0x70, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
 		AURORA, AURORA,	NONE, NONE, NONE, NONE} },
+	{0x99, {PCIE1, PCIE1,
+		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+		NONE, NONE, NONE, NONE} },
 	{0x9A, {PCIE1, PCIE1,
 		SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
 		NONE, NONE, NONE, NONE} },
+	{0x9D, {PCIE1, PCIE1, PCIE1, PCIE1,
+		NONE, NONE, NONE, NONE} },
 	{0x9E, {PCIE1, PCIE1, PCIE1, PCIE1,
 		NONE, NONE, NONE, NONE} },
 	{}
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