drm/tegra: dsi: Adjust D-PHY timing
PATCH v3 1/1 drm/tegra: dsi: Adjust D-PHY timing
Fix D-PHY HS Trail setting on Tegra.
It is found that HS Trail is off -12% during compliance testing
Signed-off-by David Ung <[email protected]>
--- drivers/gpu/drm/tegra/dsi.c | 6 ++++++ 1 file changed, 6 insertions(+)
drivers/gpu/drm/tegra/dsi.c +6 -0
@@ -335,6 +335,12 @@ static int tegra_dsi_set_phy_timing(struct tegra_dsi *dsi)if (err <0 )return err; +/* +* Tegra DSI progamming guide requires additional adjustments +* to HS trail for compliance. +*/ + timing->hstrail +=3 * period *8 ; + err =mipi_dphy_timing_validate (&timing, period);if (err <0 ) {dev_err (dsi->dev,"failed to validate D-PHY timing: %d\n" , err);
Signature · 1 line
1.8.1.5