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drm/i915: Forcewake Register Range changes for CHV

PATCH Superseded [email protected] 3 participants 5 messages Dec 10, 2014

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DRM drivers Intel i915
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#0 lore raw

PATCH 1/1 drm/i915: Forcewake Register Range changes for CHV

From: Deepak S <[email protected]>

According to updated BSpec, Render/Common Wells register range changed. Updating the same to match the spec and avoid extra forcewake for none forcewake range.

Signed-off-by Deepak S <[email protected]>
---
 drivers/gpu/drm/i915/intel_uncore.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)
drivers/gpu/drm/i915/intel_uncore.c +3 -6
index 46de8d7..dd36f9b 100644
@@ -647,9 +647,9 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 
 #define FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg) \
 	(REG_RANGE((reg), 0x2000, 0x4000) || \
-	 REG_RANGE((reg), 0x5000, 0x8000) || \
+	 REG_RANGE((reg), 0x5200, 0x8000) || \
 	 REG_RANGE((reg), 0x8300, 0x8500) || \
-	 REG_RANGE((reg), 0xB000, 0xC000) || \
+	 REG_RANGE((reg), 0xB000, 0xB480) || \
 	 REG_RANGE((reg), 0xE000, 0xE800))
 
 #define FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg) \

@@ -665,10 +665,7 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 	 REG_RANGE((reg), 0x8000, 0x8300) || \
 	 REG_RANGE((reg), 0x8500, 0x8600) || \
 	 REG_RANGE((reg), 0x9000, 0xB000) || \
-	 REG_RANGE((reg), 0xC000, 0xC800) || \
-	 REG_RANGE((reg), 0xF000, 0x10000) || \
-	 REG_RANGE((reg), 0x14000, 0x14400) || \
-	 REG_RANGE((reg), 0x22000, 0x24000))
+	 REG_RANGE((reg), 0xF000, 0x10000))
 
 #define FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg) \
 	REG_RANGE((reg), 0xB00,  0x2000)
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Reviewed-by on v1 1/1
#1 lore raw
Quoted 28 lines · On Thu, Dec 11, 2014 at 12:48:41PM +0530, [email protected] wrote:

From: Deepak S <[email protected]>

According to updated BSpec, Render/Common Wells register range changed. Updating the same to match the spec and avoid extra forcewake for none forcewake range.

Signed-off-by Deepak S <[email protected]>
---
 drivers/gpu/drm/i915/intel_uncore.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)
drivers/gpu/drm/i915/intel_uncore.c +2 -2
index 46de8d7..dd36f9b 100644
@@ -647,9 +647,9 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 
 #define FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg) \
 	(REG_RANGE((reg), 0x2000, 0x4000) || \
-	 REG_RANGE((reg), 0x5000, 0x8000) || \
+	 REG_RANGE((reg), 0x5200, 0x8000) || \
 	 REG_RANGE((reg), 0x8300, 0x8500) || \
-	 REG_RANGE((reg), 0xB000, 0xC000) || \
+	 REG_RANGE((reg), 0xB000, 0xB480) || \
 	 REG_RANGE((reg), 0xE000, 0xE800))
 
 #define FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg) \

drivers/gpu/drm/i915/intel_uncore.c void assert_force_wake_inactive(struct drm_i915_private *dev_priv) · line 668

Quoted 8 lines
drivers/gpu/drm/i915/intel_uncore.c +1 -4
@@ -665,10 +665,7 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 	 REG_RANGE((reg), 0x8000, 0x8300) || \
 	 REG_RANGE((reg), 0x8500, 0x8600) || \
 	 REG_RANGE((reg), 0x9000, 0xB000) || \
-	 REG_RANGE((reg), 0xC000, 0xC800) || \
-	 REG_RANGE((reg), 0xF000, 0x10000) || \
-	 REG_RANGE((reg), 0x14000, 0x14400) || \
-	 REG_RANGE((reg), 0x22000, 0x24000))
+	 REG_RANGE((reg), 0xF000, 0x10000))

Looks correct.

It looks like the media offsets could use a small adjustment as well:
- REG_RANGE((reg), 0x30000, 0x40000)
+ REG_RANGE((reg), 0x30000, 0x38000)

So with that changed

Reviewed-by Ville Syrjälä <[email protected]>

One thing I don't understand though; Why is the [0x100000,0x180000[ range marked as GWK in the spreadsheet? That's where the forcewake req/ack registers live as well as some other GTFIFO stuff etc. How can you take forcewake if the forcewake req/ack itself would need forcewake. I think this must be an error in the spreadsheet and that range should be GNW.

Quoted 5 lines
drivers/gpu/drm/i915/intel_uncore.c +0 -0
 #define FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg) \
 	REG_RANGE((reg), 0xB00,  0x2000)
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1.9.1
Signature · 6 lines
Ville Syrjälä
Intel OTC
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author
#2 lore raw
Quoted 39 lines · Ville Syrjälä
Quoted 28 lines · On Thu, Dec 11, 2014 at 12:48:41PM +0530, [email protected] wrote:

From: Deepak S <[email protected]>

According to updated BSpec, Render/Common Wells register range changed. Updating the same to match the spec and avoid extra forcewake for none forcewake range.

Signed-off-by Deepak S <[email protected]>
---
  drivers/gpu/drm/i915/intel_uncore.c | 9 +++------
  1 file changed, 3 insertions(+), 6 deletions(-)
drivers/gpu/drm/i915/intel_uncore.c +2 -2
index 46de8d7..dd36f9b 100644
@@ -647,9 +647,9 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 
  #define FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg) \
  	(REG_RANGE((reg), 0x2000, 0x4000) || \
-	 REG_RANGE((reg), 0x5000, 0x8000) || \
+	 REG_RANGE((reg), 0x5200, 0x8000) || \
  	 REG_RANGE((reg), 0x8300, 0x8500) || \
-	 REG_RANGE((reg), 0xB000, 0xC000) || \
+	 REG_RANGE((reg), 0xB000, 0xB480) || \
  	 REG_RANGE((reg), 0xE000, 0xE800))
 
  #define FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg) \

drivers/gpu/drm/i915/intel_uncore.c void assert_force_wake_inactive(struct drm_i915_private *dev_priv) · line 668

Quoted 8 lines
drivers/gpu/drm/i915/intel_uncore.c +1 -4
@@ -665,10 +665,7 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
  	 REG_RANGE((reg), 0x8000, 0x8300) || \
  	 REG_RANGE((reg), 0x8500, 0x8600) || \
  	 REG_RANGE((reg), 0x9000, 0xB000) || \
-	 REG_RANGE((reg), 0xC000, 0xC800) || \
-	 REG_RANGE((reg), 0xF000, 0x10000) || \
-	 REG_RANGE((reg), 0x14000, 0x14400) || \
-	 REG_RANGE((reg), 0x22000, 0x24000))
+	 REG_RANGE((reg), 0xF000, 0x10000))

Looks correct.

Quoted 6 lines

It looks like the media offsets could use a small adjustment as well:
- REG_RANGE((reg), 0x30000, 0x40000)
+ REG_RANGE((reg), 0x30000, 0x38000)

So with that changed

Reviewed-by Ville Syrjälä <[email protected]>

Thanks for reviewing...

Quoted 5 lines

One thing I don't understand though; Why is the [0x100000,0x180000[ range marked as GWK in the spreadsheet? That's where the forcewake req/ack registers live as well as some other GTFIFO stuff etc. How can you take forcewake if the forcewake req/ack itself would need forcewake. I think this must be an error in the spreadsheet and that range should be GNW.

I think [0x100000,0x180000] is already above the forecewake range [0x40000]. We need request for a spec update. It should be GNK

Quoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/intel_uncore.c +0 -0
  #define FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg) \
  	REG_RANGE((reg), 0xB00,  0x2000)
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author
#3 lore raw

PATCH v2 1/1 drm/i915: Forcewake Register Range changes for CHV

From: Deepak S <[email protected]>

According to updated BSpec, Render/Common/media Wells register range changed. Updating the same to match the spec and avoid extra forcewake for none forcewake range.

v2: Update media forcewake range (Ville)

Signed-off-by Deepak S <[email protected]>
Reviewed-by Ville Syrjälä <[email protected]>
---
 drivers/gpu/drm/i915/intel_uncore.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)
drivers/gpu/drm/i915/intel_uncore.c +4 -7
index 46de8d7..ffdd042 100644
@@ -647,9 +647,9 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 
 #define FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg) \
 	(REG_RANGE((reg), 0x2000, 0x4000) || \
-	 REG_RANGE((reg), 0x5000, 0x8000) || \
+	 REG_RANGE((reg), 0x5200, 0x8000) || \
 	 REG_RANGE((reg), 0x8300, 0x8500) || \
-	 REG_RANGE((reg), 0xB000, 0xC000) || \
+	 REG_RANGE((reg), 0xB000, 0xB480) || \
 	 REG_RANGE((reg), 0xE000, 0xE800))
 
 #define FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg) \

@@ -658,17 +658,14 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 	 REG_RANGE((reg), 0x12000, 0x14000) || \
 	 REG_RANGE((reg), 0x1A000, 0x1C000) || \
 	 REG_RANGE((reg), 0x1E800, 0x1EA00) || \
-	 REG_RANGE((reg), 0x30000, 0x40000))
+	 REG_RANGE((reg), 0x30000, 0x38000))
 
 #define FORCEWAKE_CHV_COMMON_RANGE_OFFSET(reg) \
 	(REG_RANGE((reg), 0x4000, 0x5000) || \
 	 REG_RANGE((reg), 0x8000, 0x8300) || \
 	 REG_RANGE((reg), 0x8500, 0x8600) || \
 	 REG_RANGE((reg), 0x9000, 0xB000) || \
-	 REG_RANGE((reg), 0xC000, 0xC800) || \
-	 REG_RANGE((reg), 0xF000, 0x10000) || \
-	 REG_RANGE((reg), 0x14000, 0x14400) || \
-	 REG_RANGE((reg), 0x22000, 0x24000))
+	 REG_RANGE((reg), 0xF000, 0x10000))
 
 #define FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg) \
 	REG_RANGE((reg), 0xB00,  0x2000)
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Applied
#4 lore raw
Quoted 10 lines · On Thu, Dec 11, 2014 at 09:42:49PM +0530, [email protected] wrote:

From: Deepak S <[email protected]>

According to updated BSpec, Render/Common/media Wells register range changed. Updating the same to match the spec and avoid extra forcewake for none forcewake range.

v2: Update media forcewake range (Ville)

Signed-off-by Deepak S <[email protected]>
Reviewed-by Ville Syrjälä <[email protected]>

Queued for -next, thanks for the patch.
-Daniel

Signature · 7 lines
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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