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intel: Export GT config attributes

PATCH In review [email protected] 2 participants 5 messages Dec 18, 2014 – Jan 9, 2015 DRM drivers

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PATCH 1/1 intel: Export GT config attributes

From: Jeff McGee <[email protected]>

The motivation for this change is that fusing can be used to create multiple slice, subslice, and EU configuration within the same PCI ID. CHV is the first such device to do this and thus make an ID-based lookup table approach unreliable. The best solution is for the kernel to determine the precise config from fuse registers and share the required information with userspace. Moving to this approach has the added benefit of reducing the number of static parameters that userspace must maintain for current and future devices.

The associated kernel patch has been posted to intel-gfx list (no archive link yet). I'm trying to collect feedback from userspace which I hope will be interested in adopting some form of this interface. I am starting with these 4 attributes, but we can add or remove them according to the userspace needs. Please provide any comments. Thanks

Jeff McGee (1):
intel: Export GT config attributes

 include/drm/i915_drm.h   |  4 +++
 intel/intel_bufmgr.h     |  5 ++++
 intel/intel_bufmgr_gem.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+)
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#1 lore raw

PATCH 1/1 intel: Export GT config attributes

From: Jeff McGee <[email protected]>

Update kernel interface with new I915_GETPARAM ioctl entries for slice total, subslice total, EU total, and threads per EU. Add a wrapping function for each parameter.

The motivation for this change is that fusing can be used to create multiple slice, subslice, and EU configuration within the same PCI ID. CHV is the first such device to do this and thus make an ID-based lookup table approach unreliable. The best solution is for the kernel to determine the precise config from fuse registers and share the required information with userspace. Moving to this approach has the added benefit of reducing the number of static parameters that userspace must maintain for current and future devices.

For: VIZ-4636

Signed-off-by Jeff McGee <[email protected]>
---
 include/drm/i915_drm.h   |  4 +++
 intel/intel_bufmgr.h     |  5 ++++
 intel/intel_bufmgr_gem.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+)
include/drm/i915_drm.h +4 -0
index 15dd01d..be38adf 100644
@@ -340,6 +340,10 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_EXEC_HANDLE_LUT   26
 #define I915_PARAM_HAS_WT     	 	 27
 #define I915_PARAM_CMD_PARSER_VERSION	 28
+#define I915_PARAM_SLICE_TOTAL		 30
+#define I915_PARAM_SUBSLICE_TOTAL	 31
+#define I915_PARAM_EU_TOTAL		 32
+#define I915_PARAM_THREADS_PER_EU	 33
 
 typedef struct drm_i915_getparam {
 	int param;
intel/intel_bufmgr.h +5 -0
index be83a56..90e535d 100644
@@ -264,6 +264,11 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
 			      uint32_t *active,
 			      uint32_t *pending);
 
+int drm_intel_get_slice_total(int fd, unsigned int *slice_total);
+int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
+int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
+int drm_intel_get_threads_per_eu(int fd, unsigned int *threads_per_eu);
+
 /** @{ Compatibility defines to keep old code building despite the symbol rename
  * from dri_* to drm_intel_*
  */
intel/intel_bufmgr_gem.c +63 -0

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#2 lore raw
Quoted 20 lines · On 2014.12.18 12:12:33 -0600, [email protected] wrote:
include/drm/i915_drm.h +4 -0
index 15dd01d..be38adf 100644
@@ -340,6 +340,10 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_EXEC_HANDLE_LUT   26
 #define I915_PARAM_HAS_WT     	 	 27
 #define I915_PARAM_CMD_PARSER_VERSION	 28
+#define I915_PARAM_SLICE_TOTAL		 30
+#define I915_PARAM_SUBSLICE_TOTAL	 31
+#define I915_PARAM_EU_TOTAL		 32
+#define I915_PARAM_THREADS_PER_EU	 33
 
 typedef struct drm_i915_getparam {
 	int param;
intel/intel_bufmgr.h +0 -0
index be83a56..90e535d 100644

intel/intel_bufmgr.h int drm_intel_get_reset_stats(drm_intel_context *ctx, · line 271

Quoted 8 lines
intel/intel_bufmgr.h +5 -0
@@ -264,6 +264,11 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
 			      uint32_t *active,
 			      uint32_t *pending);
 
+int drm_intel_get_slice_total(int fd, unsigned int *slice_total);
+int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
+int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
+int drm_intel_get_threads_per_eu(int fd, unsigned int *threads_per_eu);
+

I think we normally use drm_intel_bufmgr in API instead of fd directly. And this config info can be initialized when bufmgr init, so later request can get info without calling ioctl everytime.

Also please cc intel-gfx list for any intel related patch.

thanks.

Quoted 84 lines
intel/intel_bufmgr.h +0 -0
 /** @{ Compatibility defines to keep old code building despite the symbol rename
  * from dri_* to drm_intel_*
  */
intel/intel_bufmgr_gem.c +63 -0
index 14e92c9..e0b13e7 100644
@@ -3293,6 +3293,69 @@ drm_intel_reg_read(drm_intel_bufmgr *bufmgr,
 	return ret;
 }
 
+drm_public int
+drm_intel_get_slice_total(int fd, unsigned int *slice_total)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)slice_total;
+	gp.param = I915_PARAM_SLICE_TOTAL;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
+drm_public int
+drm_intel_get_subslice_total(int fd, unsigned int *subslice_total)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)subslice_total;
+	gp.param = I915_PARAM_SUBSLICE_TOTAL;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
+drm_public int
+drm_intel_get_eu_total(int fd, unsigned int *eu_total)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)eu_total;
+	gp.param = I915_PARAM_EU_TOTAL;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
+drm_public int
+drm_intel_get_threads_per_eu(int fd, unsigned int *threads_per_eu)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)threads_per_eu;
+	gp.param = I915_PARAM_THREADS_PER_EU;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
 
 /**
  * Annotate the given bo for use in aub dumping.
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author
#3 lore raw
Quoted 34 lines · Zhenyu Wang
Quoted 20 lines · On 2014.12.18 12:12:33 -0600, [email protected] wrote:
include/drm/i915_drm.h +4 -0
index 15dd01d..be38adf 100644
@@ -340,6 +340,10 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_EXEC_HANDLE_LUT   26
 #define I915_PARAM_HAS_WT     	 	 27
 #define I915_PARAM_CMD_PARSER_VERSION	 28
+#define I915_PARAM_SLICE_TOTAL		 30
+#define I915_PARAM_SUBSLICE_TOTAL	 31
+#define I915_PARAM_EU_TOTAL		 32
+#define I915_PARAM_THREADS_PER_EU	 33
 
 typedef struct drm_i915_getparam {
 	int param;
intel/intel_bufmgr.h +0 -0
index be83a56..90e535d 100644

intel/intel_bufmgr.h int drm_intel_get_reset_stats(drm_intel_context *ctx, · line 271

Quoted 8 lines
intel/intel_bufmgr.h +5 -0
@@ -264,6 +264,11 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
 			      uint32_t *active,
 			      uint32_t *pending);
 
+int drm_intel_get_slice_total(int fd, unsigned int *slice_total);
+int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
+int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
+int drm_intel_get_threads_per_eu(int fd, unsigned int *threads_per_eu);
+

I think we normally use drm_intel_bufmgr in API instead of fd directly. And this config info can be initialized when bufmgr init, so later request can get info without calling ioctl everytime.

Quoted 4 lines

Also please cc intel-gfx list for any intel related patch.

thanks.

The implementation doesn't require a drm_intel_bufmgr instance to query and return these values, so I think it is best to ask for just the drm file descriptor from client. I see this approach also in use by drm_intel_get_aperture_sizes function. Let me know if there is a strong reason from client perspective to use drm_intel_bufmgr instead of fd.

I thought about caching these values during bufmgr init, but decided there was no benefit. Some clients won't need these at all. And those that do should be calling the query functions once - these values are unchanging.

Jeff

Quoted 80 lines
Quoted 80 lines
intel/intel_bufmgr.h +0 -0
 /** @{ Compatibility defines to keep old code building despite the symbol rename
  * from dri_* to drm_intel_*
  */
intel/intel_bufmgr_gem.c +63 -0
index 14e92c9..e0b13e7 100644
@@ -3293,6 +3293,69 @@ drm_intel_reg_read(drm_intel_bufmgr *bufmgr,
 	return ret;
 }
 
+drm_public int
+drm_intel_get_slice_total(int fd, unsigned int *slice_total)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)slice_total;
+	gp.param = I915_PARAM_SLICE_TOTAL;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
+drm_public int
+drm_intel_get_subslice_total(int fd, unsigned int *subslice_total)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)subslice_total;
+	gp.param = I915_PARAM_SUBSLICE_TOTAL;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
+drm_public int
+drm_intel_get_eu_total(int fd, unsigned int *eu_total)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)eu_total;
+	gp.param = I915_PARAM_EU_TOTAL;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
+drm_public int
+drm_intel_get_threads_per_eu(int fd, unsigned int *threads_per_eu)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	VG_CLEAR(gp);
+	gp.value = (int*)threads_per_eu;
+	gp.param = I915_PARAM_THREADS_PER_EU;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
 
 /**
  * Annotate the given bo for use in aub dumping.
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