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ahci_xgene: Bug fixes in APM X-Gene Soc AHCI SATA controller driver.

PATCH New Suman Tripathi 2 participants 4 messages Dec 29, 2014 – Jan 5, 2015

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#0 lore raw

v3 cover ahci_xgene: Bug fixes in APM X-Gene Soc AHCI SATA controller driver.

These patches address the following two issues :

1. Endianess issue with xgene_read_id function.
2. ATAPI device enumeration failure with ATA_CMD_PACKET PIO mode command.

---

Suman Tripathi (2):
ahci_xgene: Fix the endianess issue in APM X-Gene SoC AHCI SATA
controller driver.
ahci_xgene: Fix the DMA state machine lockup for the ATA_CMD_PACKET
PIO mode command.

 drivers/ata/ahci_xgene.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

--
1.8.2.1

#1 lore raw

PATCH v3 1/2 ahci_xgene: Fix the endianess issue in APM X-Gene SoC AHCI SATA controller driver.

This patch fixes the big endian mode issue with function xgene_ahci_read_id.

---
 drivers/ata/ahci_xgene.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/ata/ahci_xgene.c +1 -1
index 0f8538f..0ffd3c9 100644
@@ -188,7 +188,7 @@ static unsigned int xgene_ahci_read_id(struct ata_device *dev,
 	 *
 	 * Clear reserved bit 8 (DEVSLP bit) as we don't support DEVSLP
 	 */
-	id[ATA_ID_FEATURE_SUPP] &= ~(1 << 8);
+	id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8));
 
 	return 0;
 }

--
1.8.2.1

#2 lore raw

PATCH v3 2/2 ahci_xgene: Fix the DMA state machine lockup for the ATA_CMD_PACKET PIO mode command.

In reply to Suman Tripathi

This patch addresses the issue with ATA_CMD_PACKET pio mode command for enumeration and device detection with ATAPI devices. The X-Gene AHCI controller has an errata in which it cannot clear the BSY bit after the PIO setup FIS. The dma state machine enters CMFatalErrorUpdate state and locks up.

---
 drivers/ata/ahci_xgene.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)
drivers/ata/ahci_xgene.c +7 -5
index 0ffd3c9..d332161 100644
@@ -125,10 +125,11 @@ static int xgene_ahci_restart_engine(struct ata_port *ap)
  * xgene_ahci_qc_issue - Issue commands to the device
  * @qc: Command to issue
  *
- * Due to Hardware errata for IDENTIFY DEVICE command, the controller cannot
- * clear the BSY bit after receiving the PIO setup FIS. This results in the dma
- * state machine goes into the CMFatalErrorUpdate state and locks up. By
- * restarting the dma engine, it removes the controller out of lock up state.
+ * Due to Hardware errata for IDENTIFY DEVICE command and PACKET
+ * command of ATAPI protocol set, the controller cannot clear the BSY bit
+ * after receiving the PIO setup FIS. This results in the DMA state machine
+ * going into the CMFatalErrorUpdate state and locks up. By restarting the
+ * DMA engine, it removes the controller out of lock up state.
  */
 static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc)
 {
@@ -137,7 +138,8 @@ static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc)
 	struct xgene_ahci_context *ctx = hpriv->plat_data;
 	int rc = 0;
 
-	if (unlikely(ctx->last_cmd[ap->port_no] == ATA_CMD_ID_ATA))
+	if (unlikely((ctx->last_cmd[ap->port_no] == ATA_CMD_ID_ATA) ||
+	    (ctx->last_cmd[ap->port_no] == ATA_CMD_PACKET)))
 		xgene_ahci_restart_engine(ap);
 
 	rc = ahci_qc_issue(qc);

--
1.8.2.1

#3 lore raw

PATCH v3 2/2 ahci_xgene: Fix the DMA state machine lockup for the ATA_CMD_PACKET PIO mode command.

Quoted 7 lines · Suman Tripathi

This patch addresses the issue with ATA_CMD_PACKET pio mode command for enumeration and device detection with ATAPI devices. The X-Gene AHCI controller has an errata in which it cannot clear the BSY bit after the PIO setup FIS. The dma state machine enters CMFatalErrorUpdate state and locks up.

Ah, you already posted the updated versions. Applied these instead.

Thanks.

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tejun