Add Qualcomm ADM dmaengine driver

This patch set introduces the dmaengine driver for the Qualcomm Application Data Mover (ADM) DMA controller present on MSM8x60, APQ8064, and IPQ8064 devices.

The initial version of this driver will only support slave DMA operations between system memory and peripherals. Flow control via the CRCI (client rate control interface) is supported and can be configured via device tree configuration. Flow control usage is required for some peripheral devices.

Changes from v2:
- Removed extraneous achan variable from xlate function
- Reworked crci check in slave_sg function
- Added mux field to async_desc structure.
- Reworked dma start function to use crci and mux values directly from structure.
- Added disable of clocks in probe error paths.
- Changed to use #define for fixed number of channels.

Changes since v1:
- Fixed various review comments
- Fixed some descriptor programming issues.
- Added single descriptors to support sub burst length transactions. Selection of single or box descriptors depends on the sg length and burst size.
- Removed use of crci in the dmas property. CRCI is now designated via the slave_config structure and will be stored in slave_id.

Andy Gross (2):
dt/bindings: qcom_adm: Fix channel specifiers
dmaengine: Add ADM driver

 Documentation/devicetree/bindings/dma/qcom_adm.txt |   16 +-
 drivers/dma/Kconfig                                |   10 +
 drivers/dma/Makefile                               |    1 +
 drivers/dma/qcom_adm.c                             |  902 ++++++++++++++++++++
 4 files changed, 919 insertions(+), 10 deletions(-)
 create mode 100644 drivers/dma/qcom_adm.c

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This patch removes the crci information from the dma channel property. At least one client device requires using more than one CRCI value for a channel. This does not match the current binding and the crci information needs to be removed.

Instead, the client device will provide this information via other means.

---
 Documentation/devicetree/bindings/dma/qcom_adm.txt |   16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

index 9bcab91..38d45f8 100644
@@ -4,8 +4,7 @@ Required properties:
 - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
 - reg: Address range for DMA registers
 - interrupts: Should contain one interrupt shared by all channels
-- #dma-cells: must be <2>.  First cell denotes the channel number.  Second cell
-  denotes CRCI (client rate control interface) flow control assignment.
+- #dma-cells: must be <1>.  First cell denotes the channel number.
 - clocks: Should contain the core clock and interface clock.
 - clock-names: Must contain "core" for the core clock and "iface" for the
   interface clock.

@@ -22,7 +21,7 @@ Example:
 			compatible = "qcom,adm";
 			reg = <0x18300000 0x100000>;
 			interrupts = <0 170 0>;
-			#dma-cells = <2>;
+			#dma-cells = <1>;
 
 			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
 			clock-names = "core", "iface";

@@ -35,15 +34,12 @@ Example:
 			qcom,ee = <0>;
 		};
 
-DMA clients must use the format descripted in the dma.txt file, using a three
+DMA clients must use the format descripted in the dma.txt file, using a two
 cell specifier for each channel.
 
-Each dmas request consists of 3 cells:
+Each dmas request consists of two cells:
  1. phandle pointing to the DMA controller
  2. channel number
- 3. CRCI assignment, if applicable.  If no CRCI flow control is required, use 0.
-    The CRCI is used for flow control.  It identifies the peripheral device that
-    is the source/destination for the transferred data.
 
 Example:
 

@@ -56,7 +52,7 @@ Example:
 
 		cs-gpios = <&qcom_pinmux 20 0>;
 
-		dmas = <&adm_dma 6 9>,
-			<&adm_dma 5 10>;
+		dmas = <&adm_dma 6>,
+			<&adm_dma 5>;
 		dma-names = "rx", "tx";
 	};

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hosted by The Linux Foundation

Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA controller found in the MSM8x60 and IPQ/APQ8064 platforms.

The ADM supports both memory to memory transactions and memory to/from peripheral device transactions. The controller also provides flow control capabilities for transactions to/from peripheral devices.

The initial release of this driver supports slave transfers to/from peripherals and also incorporates CRCI (client rate control interface) flow control.

---
 drivers/dma/Kconfig    |   10 +
 drivers/dma/Makefile   |    1 +
 drivers/dma/qcom_adm.c |  902 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 913 insertions(+)
 create mode 100644 drivers/dma/qcom_adm.c

index f2b2c4e..69bc15e 100644
@@ -464,4 +464,14 @@ config QCOM_BAM_DMA
 	  Enable support for the QCOM BAM DMA controller.  This controller
 	  provides DMA capabilities for a variety of on-chip devices.
 
+config QCOM_ADM
+	tristate "Qualcomm ADM support"
+	depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
+	select DMA_ENGINE
+	select DMA_VIRTUAL_CHANNELS
+	---help---
+	  Enable support for the Qualcomm ADM DMA controller.  This controller
+	  provides DMA capabilities for both general purpose and on-chip
+	  peripheral devices.
+
 endif

index 2022b54..3b7ead6 100644
@@ -50,3 +50,4 @@ obj-y += xilinx/
 obj-$(CONFIG_INTEL_MIC_X100_DMA) += mic_x100_dma.o
 obj-$(CONFIG_NBPFAXI_DMA) += nbpfaxi.o
 obj-$(CONFIG_DMA_SUN6I) += sun6i-dma.o
+obj-$(CONFIG_QCOM_ADM) += qcom_adm.o

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darn it. I skimmed right over that. I'll resend.

Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project