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mx6slevk: Provide a proper pad configuration for OTG1_ID pin

PATCH New Fabio Estevam 2 participants 2 messages Feb 28, 2015 – Mar 2, 2015

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Fabio Estevam

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PATCH 1/1 mx6slevk: Provide a proper pad configuration for OTG1_ID pin

From: Fabio Estevam <[email protected]>

Pass the same pad configuration as done in the kernel so that OTG1_ID pin can properly work in device mode.

Signed-off-by Fabio Estevam <[email protected]>
---
 board/freescale/mx6slevk/mx6slevk.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
board/freescale/mx6slevk/mx6slevk.c +6 -1
index c65f72b..7c18c90 100644
@@ -50,6 +50,11 @@ DECLARE_GLOBAL_DATA_PTR;
 		      PAD_CTL_DSE_40ohm | PAD_CTL_HYS |		\
 		      PAD_CTL_ODE | PAD_CTL_SRE_FAST)
 
+#define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
+			PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
+			PAD_CTL_DSE_80ohm | PAD_CTL_HYS |	\
+			PAD_CTL_SRE_FAST)
+
 #define ETH_PHY_RESET	IMX_GPIO_NR(4, 21)
 
 int dram_init(void)

@@ -285,7 +290,7 @@ static int setup_fec(void)
 static iomux_v3_cfg_t const usb_otg_pads[] = {
 	/* OTG1 */
 	MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-	MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(OTGID_PAD_CTRL),
 	/* OTG2 */
 	MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
 };
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1.9.1
#1 lore raw

PATCH 1/1 mx6slevk: Provide a proper pad configuration for OTG1_ID pin

Quoted 7 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Pass the same pad configuration as done in the kernel so that OTG1_ID pin can properly work in device mode.

Signed-off-by Fabio Estevam <[email protected]>

---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
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