ARM: orion5k/mv78xx0/dove multiplatform support
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cover ARM: orion5k/mv78xx0/dove multiplatform support
Hi everyone,
I'm trying to get all ARMv7 platforms moved over to ARCH_MULTIPLATFORM, and while the plan for these three platforms was to do the conversion to DT first and then to remove the board files along with all the support files, I don't see that happening as soon as I'd hoped for (as in, last year).
I've looked at what would be left to do for doing multiplatform with the existing board code, and found that there is in fact very little. This series does the complete change over to multiplatform for all three, along with some header cleanups that fit the general purpose.
I've decided to do the patches across the platforms for better readability, and to save everyone looking at very similar patches three times.
This is build tested so far and survives a randconfig builder for a few hundred builds without regressions, but I have not done any runtime testing. Any help in testing or reviewing would be much appreciated.
Thanks,
Arnd
Arnd Bergmann (5):
ARM: orion: move watchdog setup to mach-orion5x
ARM: orion: always use MULTI_IRQ_HANDLER
ARM: orion: use SPARSE_IRQ everywhere
ARM: orion: clean up mach/*.h headers
ARM: orion: multiplatform support
arch/arm/Kconfig | 39 ------------------
arch/arm/configs/dove_defconfig | 2 +
arch/arm/configs/mv78xx0_defconfig | 3 ++
arch/arm/configs/orion5x_defconfig | 3 ++
arch/arm/mach-dove/Kconfig | 15 +++++--
arch/arm/mach-dove/Makefile | 2 +
.../arm/mach-dove/{include/mach => }/bridge-regs.h | 4 +-
arch/arm/mach-dove/cm-a510.c | 4 +-
arch/arm/mach-dove/common.c | 4 +-
arch/arm/mach-dove/dove-db-setup.c | 3 +-
arch/arm/mach-dove/{include/mach => }/dove.h | 4 +-
arch/arm/mach-dove/include/mach/entry-macro.S | 33 ---------------
arch/arm/mach-dove/include/mach/hardware.h | 19 ---------
arch/arm/mach-dove/include/mach/uncompress.h | 36 ----------------
arch/arm/mach-dove/irq.c | 19 +++------
arch/arm/mach-dove/{include/mach => }/irqs.h | 4 +-
arch/arm/mach-dove/mpp.c | 2 +-
arch/arm/mach-dove/pcie.c | 4 +-
arch/arm/mach-dove/{include/mach => }/pm.h | 4 +-
arch/arm/mach-mv78xx0/Kconfig | 15 +++++--
arch/arm/mach-mv78xx0/Makefile | 2 +
.../mach-mv78xx0/{include/mach => }/bridge-regs.h | 4 +-
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c | 3 +-
arch/arm/mach-mv78xx0/common.c | 4 +-
arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 3 +-
arch/arm/mach-mv78xx0/include/mach/entry-macro.S | 41 ------------------
arch/arm/mach-mv78xx0/include/mach/hardware.h | 14 -------
arch/arm/mach-mv78xx0/include/mach/uncompress.h | 46 ---------------------
arch/arm/mach-mv78xx0/irq.c | 35 +++++++++++++++-
arch/arm/mach-mv78xx0/{include/mach => }/irqs.h | 4 +-
arch/arm/mach-mv78xx0/mpp.c | 2 +-
arch/arm/mach-mv78xx0/{include/mach => }/mv78xx0.h | 4 +-
arch/arm/mach-mv78xx0/pcie.c | 2 +-
arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | 3 +-
arch/arm/mach-orion5x/Kconfig | 18 ++++++--
arch/arm/mach-orion5x/Makefile | 2 +
arch/arm/mach-orion5x/board-d2net.c | 2 +-
arch/arm/mach-orion5x/board-dt.c | 4 +-
arch/arm/mach-orion5x/board-mss2.c | 4 +-
arch/arm/mach-orion5x/board-rd88f5182.c | 2 +-
.../mach-orion5x/{include/mach => }/bridge-regs.h | 4 +-
arch/arm/mach-orion5x/common.c | 20 +++++++--
arch/arm/mach-orion5x/db88f5281-setup.c | 3 +-
arch/arm/mach-orion5x/dns323-setup.c | 3 +-
arch/arm/mach-orion5x/include/mach/entry-macro.S | 25 -----------
arch/arm/mach-orion5x/include/mach/hardware.h | 14 -------
arch/arm/mach-orion5x/include/mach/uncompress.h | 48 ----------------------
arch/arm/mach-orion5x/irq.c | 14 +------
arch/arm/mach-orion5x/{include/mach => }/irqs.h | 4 +-
arch/arm/mach-orion5x/kurobox_pro-setup.c | 4 +-
arch/arm/mach-orion5x/ls-chl-setup.c | 3 +-
arch/arm/mach-orion5x/ls_hgl-setup.c | 3 +-
arch/arm/mach-orion5x/lsmini-setup.c | 3 +-
arch/arm/mach-orion5x/mpp.c | 2 +-
arch/arm/mach-orion5x/mv2120-setup.c | 3 +-
arch/arm/mach-orion5x/net2big-setup.c | 3 +-
arch/arm/mach-orion5x/{include/mach => }/orion5x.h | 4 +-
arch/arm/mach-orion5x/pci.c | 2 +-
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 3 +-
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 3 +-
arch/arm/mach-orion5x/rd88f5182-setup.c | 3 +-
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 3 +-
arch/arm/mach-orion5x/terastation_pro2-setup.c | 3 +-
arch/arm/mach-orion5x/ts209-setup.c | 3 +-
arch/arm/mach-orion5x/ts409-setup.c | 3 +-
arch/arm/mach-orion5x/ts78xx-setup.c | 3 +-
arch/arm/mach-orion5x/tsx09-common.c | 2 +-
arch/arm/mach-orion5x/wnr854t-setup.c | 3 +-
arch/arm/mach-orion5x/wrt350n-v2-setup.c | 3 +-
arch/arm/plat-orion/common.c | 21 ----------
arch/arm/plat-orion/include/plat/common.h | 2 -
arch/arm/plat-orion/irq.c | 1 -
arch/arm/plat-orion/mpp.c | 1 -
73 files changed, 184 insertions(+), 453 deletions(-)
rename arch/arm/mach-dove/{include/mach => }/bridge-regs.h (96%)
rename arch/arm/mach-dove/{include/mach => }/dove.h (99%)
delete mode 100644 arch/arm/mach-dove/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-dove/include/mach/hardware.h
delete mode 100644 arch/arm/mach-dove/include/mach/uncompress.h
rename arch/arm/mach-dove/{include/mach => }/irqs.h (95%)
rename arch/arm/mach-dove/{include/mach => }/pm.h (97%)
rename arch/arm/mach-mv78xx0/{include/mach => }/bridge-regs.h (92%)
delete mode 100644 arch/arm/mach-mv78xx0/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-mv78xx0/include/mach/hardware.h
delete mode 100644 arch/arm/mach-mv78xx0/include/mach/uncompress.h
rename arch/arm/mach-mv78xx0/{include/mach => }/irqs.h (95%)
rename arch/arm/mach-mv78xx0/{include/mach => }/mv78xx0.h (98%)
rename arch/arm/mach-orion5x/{include/mach => }/bridge-regs.h (92%)
delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-orion5x/include/mach/hardware.h
delete mode 100644 arch/arm/mach-orion5x/include/mach/uncompress.h
rename arch/arm/mach-orion5x/{include/mach => }/irqs.h (93%)
rename arch/arm/mach-orion5x/{include/mach => }/orion5x.h (99%)Signature · 1 line
2.1.0.rc2
PATCH 1/5 ARM: orion: move watchdog setup to mach-orion5x
The watchdog device node is created in plat-orion/common.c but depends on the bridge address that is platform specific, so as a preparation for orion multiplatform support, we should move it out of the common code into orion5x.
The other two users of plat-orion currently do not support the watchdog device, so this is not a problem.
Signed-off-by Arnd Bergmann <[email protected]>
--- arch/arm/mach-orion5x/common.c | 14 +++++++++++++- arch/arm/plat-orion/common.c | 21 --------------------- arch/arm/plat-orion/include/plat/common.h | 2 -- 3 files changed, 13 insertions(+), 24 deletions(-)
arch/arm/mach-orion5x/common.c +13 -1
@@ -184,9 +184,21 @@ static void __init orion5x_crypto_init(void)/***************************************************************************** * Watchdog ****************************************************************************/ +static struct resource orion_wdt_resource[] = { +DEFINE_RES_MEM (TIMER_PHYS_BASE ,0x04 ), +DEFINE_RES_MEM (RSTOUTn_MASK_PHYS,0x04 ), +}; + +static struct platform_device orion_wdt_device = { + .name ="orion_wdt" , + .id =-1 , + .num_resources =ARRAY_SIZE (orion_wdt_resource), + .resource = orion_wdt_resource, +}; +static void __init orion5x_wdt_init (void ) { -orion_wdt_init (); +platform_device_register (&orion_wdt_device); }
arch/arm/plat-orion/common.c +0 -21
@@ -21,7 +21,6 @@#include <net/dsa.h> #include <linux/platform_data/dma-mv_xor.h> #include <linux/platform_data/usb-ehci-orion.h> -#include <mach/bridge-regs.h> #include <plat/common.h> /* Create a clkdev entry for a given device/clk */
@@ -593,26 +592,6 @@ void __init orion_spi_1_init(unsigned long mapbase) }/***************************************************************************** -* Watchdog -****************************************************************************/ -static struct resource orion_wdt_resource[] = { -DEFINE_RES_MEM (TIMER_PHYS_BASE ,0x04 ), -DEFINE_RES_MEM (RSTOUTn_MASK_PHYS,0x04 ), -}; - -static struct platform_device orion_wdt_device = { - .name ="orion_wdt" , - .id =-1 , - .num_resources =ARRAY_SIZE (orion_wdt_resource), - .resource = orion_wdt_resource, -}; - -void __init orion_wdt_init (void ) -{ -platform_device_register (&orion_wdt_device); -} - -/***************************************************************************** * XOR ****************************************************************************/ static u64 orion_xor_dmamask =DMA_BIT_MASK (32 );
arch/arm/plat-orion/include/plat/common.h +0 -2
@@ -75,8 +75,6 @@ void __init orion_spi_init(unsigned long mapbase);void __init orion_spi_1_init (unsigned long mapbase); -void __init orion_wdt_init (void ); - void __init orion_xor0_init(unsigned long mapbase_low, unsigned long mapbase_high, unsigned long irq_0,
Signature · 1 line
2.1.0.rc2
Andrew Lunn
maintainerPATCH 1/5 ARM: orion: move watchdog setup to mach-orion5x
Quoted 4 lines · Arnd Bergmann
The watchdog device node is created in
plat-orion/common.cbut depends on the bridge address that is platform specific, so as a preparation for orion multiplatform support, we should move it out of the common code into orion5x.
If i remember correctly, RMK patchset for the Dove PMU allows the watchdog to be enabled for Dove.
Andrew
PATCH 1/5 ARM: orion: move watchdog setup to mach-orion5x
Quoted 8 lines · On Monday 02 March 2015 22:33:06 Andrew Lunn wrote:
Quoted 4 lines · Arnd Bergmann
The watchdog device node is created in
plat-orion/common.cbut depends on the bridge address that is platform specific, so as a preparation for orion multiplatform support, we should move it out of the common code into orion5x.If i remember correctly, RMK patchset for the Dove PMU allows the watchdog to be enabled for Dove.
I see. If it helps, I could change the code here to make orion_wdt_init() take the resources as arguments like orion_i2c_init and others do.
If the goal for Russell's patches is to get everything working with DT anyway, then the current version should work just as well.
Arnd
PATCH 1/5 ARM: orion: move watchdog setup to mach-orion5x
Quoted 7 lines · Arnd Bergmann
Quoted 6 lines · On Monday 02 March 2015 22:33:06 Andrew Lunn wrote:
Quoted 4 lines · Arnd Bergmann
The watchdog device node is created in
plat-orion/common.cbut depends on the bridge address that is platform specific, so as a preparation for orion multiplatform support, we should move it out of the common code into orion5x.
Quoted 8 lines
Quoted 2 lines
If i remember correctly, RMK patchset for the Dove PMU allows the watchdog to be enabled for Dove.
I see. If it helps, I could change the code here to make
orion_wdt_init()take the resources as arguments likeorion_i2c_initand others do.If the goal for Russell's patches is to get everything working with DT anyway, then the current version should work just as well.
Well, right now I don't know how to progress the PMU patches. From what I remember, there was agreement on where to put the PMU driver, but there's still a problem with the PM domain binding code. That issue just ended up stopping being discussed.
Is it no surprise, therefore, that it takes literally years to get stuff into mainline kernels, and people get pissed off and end up maintaining stuff outside of mainline?
commit b6c7ff35be7131abe7c83a22a87bbb2343f61a5a
Author: Russell King <[email protected]> Date: Mon Mar 3 14:49:14 2014 +0000
pm: domains: quieten down generic pm domains
One year old for a simple patch... Several other patches in that set date from April 2014 too...
Mainline kernel development sucks.
Signature · 2 lines
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net.
PATCH 2/5 ARM: orion: always use MULTI_IRQ_HANDLER
In reply to Arnd BergmannAs a preparation for multiplatform support, this enables the MULTI_IRQ_HANDLER code unconditionally on dove and orion5x, and introduces the respective code on mv78xx0, which did not have it so far. The classic entry-macro.S files are removed as they are now obsolete.
Signed-off-by Arnd Bergmann <[email protected]>
--- arch/arm/Kconfig | 3 ++ arch/arm/mach-dove/include/mach/entry-macro.S | 33 ------------------- arch/arm/mach-dove/irq.c | 11 ------- arch/arm/mach-mv78xx0/include/mach/entry-macro.S | 41 ------------------------ arch/arm/mach-mv78xx0/irq.c | 33 +++++++++++++++++++ arch/arm/mach-orion5x/include/mach/entry-macro.S | 25 --------------- arch/arm/mach-orion5x/irq.c | 12 ------- 7 files changed, 36 insertions(+), 122 deletions(-) delete mode 100644 arch/arm/mach-dove/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-mv78xx0/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S
arch/arm/Kconfig +3 -0
@@ -501,6 +501,7 @@ config ARCH_DOVE select CPU_PJ4 select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI + select MULTI_IRQ_HANDLER select MVEBU_MBUS select PINCTRL select PINCTRL_DOVE
@@ -514,6 +515,7 @@ config ARCH_MV78XX0 select CPU_FEROCEON select GENERIC_CLOCKEVENTS select MVEBU_MBUS + select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY help
@@ -527,6 +529,7 @@ config ARCH_ORION5X select CPU_FEROCEON select GENERIC_CLOCKEVENTS select MVEBU_MBUS + select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY help
arch/arm/mach-dove/include/mach/entry-macro.S deleted +0 -33
@@ -1,33 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell Dove platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - - @ if no low interrupts set, check high interrupts - ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] - moveq \irqnr, #63 - andeqs \irqstat, \irqstat, \tmp - - @ find first active interrupt source - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm
arch/arm/mach-dove/irq.c +0 -11
@@ -108,14 +108,6 @@ static int __initdata gpio2_irqs[4] = { 0, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* -* Compiling with both non-DT and DT support enabled, will -* break asm irq handler used by non-DT boards. Therefore, -* we provide a C-style irq handler even for non-DT boards, -* if MULTI_IRQ_HANDLER is set. -*/ -static void __iomem *dove_irq_base =IRQ_VIRT_BASE ;static asmlinkage void
@@ -138,7 +130,6 @@ __exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)return ; } } -#endif void __init dove_init_irq (void ) {
@@ -147,9 +138,7 @@ void __init dove_init_irq(void)orion_irq_init (0 ,IRQ_VIRT_BASE +IRQ_MASK_LOW_OFF );orion_irq_init (32 ,IRQ_VIRT_BASE +IRQ_MASK_HIGH_OFF ); -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq (dove_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-71.
arch/arm/mach-mv78xx0/include/mach/entry-macro.S deleted +0 -41
41 lines not on this page · raw message
arch/arm/mach-mv78xx0/irq.c +33 -0
@@ -11,6 +11,7 @@#include <linux/kernel.h> #include <linux/irq.h> #include <linux/io.h> +#include <asm/exception.h> #include <mach/bridge-regs.h> #include <plat/orion-gpio.h> #include <plat/irq.h>
@@ -23,12 +24,44 @@ static int __initdata gpio0_irqs[4] = { IRQ_MV78XX0_GPIO_24_31, }; +static void __iomem *mv78xx0_irq_base =IRQ_VIRT_BASE ; + +static asmlinkage void +__exception_irq_entry mv78xx0_legacy_handle_irq (struct pt_regs *regs) +{ +u32 stat; + + stat =readl_relaxed (mv78xx0_irq_base +IRQ_CAUSE_LOW_OFF ); + stat &=readl_relaxed (mv78xx0_irq_base +IRQ_MASK_LOW_OFF ); +if (stat) { +unsigned int hwirq =__fls (stat); +handle_IRQ (hwirq, regs); +return ; + } + stat =readl_relaxed (mv78xx0_irq_base +IRQ_CAUSE_HIGH_OFF ); + stat &=readl_relaxed (mv78xx0_irq_base +IRQ_MASK_HIGH_OFF ); +if (stat) { +unsigned int hwirq =32 +__fls (stat); +handle_IRQ (hwirq, regs); +return ; + } + stat =readl_relaxed (mv78xx0_irq_base +IRQ_CAUSE_ERR_OFF ); + stat &=readl_relaxed (mv78xx0_irq_base +IRQ_MASK_ERR_OFF ); +if (stat) { +unsigned int hwirq =64 +__fls (stat); +handle_IRQ (hwirq, regs); +return ; + } +} +void __init mv78xx0_init_irq (void ) {orion_irq_init (0 ,IRQ_VIRT_BASE +IRQ_MASK_LOW_OFF );orion_irq_init (32 ,IRQ_VIRT_BASE +IRQ_MASK_HIGH_OFF );orion_irq_init (64 ,IRQ_VIRT_BASE +IRQ_MASK_ERR_OFF ); +set_handle_irq (mv78xx0_legacy_handle_irq); +/* * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask * registers for core #1 are at an offset of 0x18 from those of
arch/arm/mach-orion5x/include/mach/entry-macro.S deleted +0 -25
@@ -1,25 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Orion platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =MAIN_IRQ_CAUSE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #0] @ main cause - ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask - mov \irqnr, #0 @ default irqnr - @ find cause bits that are unmasked - ands \irqstat, \irqstat, \tmp @ clear Z flag if any - clzne \irqnr, \irqstat @ calc irqnr - rsbne \irqnr, \irqnr, #31 - .endm
arch/arm/mach-orion5x/irq.c +0 -12
@@ -26,14 +26,6 @@ static int __initdata gpio0_irqs[4] = { IRQ_ORION5X_GPIO_24_31, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* -* Compiling with both non-DT and DT support enabled, will -* break asm irq handler used by non-DT boards. Therefore, -* we provide a C-style irq handler even for non-DT boards, -* if MULTI_IRQ_HANDLER is set. -*/ - asmlinkage void__exception_irq_entry orion5x_legacy_handle_irq (struct pt_regs *regs) {
@@ -47,15 +39,11 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)return ; } } -#endif void __init orion5x_init_irq (void ) {orion_irq_init (0 ,MAIN_IRQ_MASK ); - -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq (orion5x_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-31.
Signature · 1 line
2.1.0.rc2
Andrew Lunn
maintainerPATCH 2/5 ARM: orion: always use MULTI_IRQ_HANDLER
Quoted 5 lines · Arnd Bergmann
As a preparation for multiplatform support, this enables the
MULTI_IRQ_HANDLERcode unconditionally on dove and orion5x, and introduces the respective code on mv78xx0, which did not have it so far. The classicentry-macro.Sfiles are removed as they are now obsolete.
Hi Arnd
I don't know if it is relevant or not, but mach-dove IRQ handling is slightly broken. It uses IRQ 0. Russell King did provide a patch to move all the interrupts up by one, but it did not apply. I asked for a new version, rebased on the -rc1 of the time, but it never appeared.
Andrew
Quoted 292 lines
Signed-off-by Arnd Bergmann <[email protected]>--- arch/arm/Kconfig | 3 ++ arch/arm/mach-dove/include/mach/entry-macro.S | 33 ------------------- arch/arm/mach-dove/irq.c | 11 ------- arch/arm/mach-mv78xx0/include/mach/entry-macro.S | 41 ------------------------ arch/arm/mach-mv78xx0/irq.c | 33 +++++++++++++++++++ arch/arm/mach-orion5x/include/mach/entry-macro.S | 25 --------------- arch/arm/mach-orion5x/irq.c | 12 ------- 7 files changed, 36 insertions(+), 122 deletions(-) delete mode 100644 arch/arm/mach-dove/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-mv78xx0/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.Sarch/arm/Kconfig +3
-0@@ -501,6 +501,7 @@ config ARCH_DOVE select CPU_PJ4 select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI + select MULTI_IRQ_HANDLER select MVEBU_MBUS select PINCTRL select PINCTRL_DOVE@@ -514,6 +515,7 @@ config ARCH_MV78XX0 select CPU_FEROCEON select GENERIC_CLOCKEVENTS select MVEBU_MBUS + select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY help@@ -527,6 +529,7 @@ config ARCH_ORION5X select CPU_FEROCEON select GENERIC_CLOCKEVENTS select MVEBU_MBUS + select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY helparch/arm/mach-dove/include/mach/entry-macro.S deleted +0
-33@@ -1,33 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell Dove platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - - @ if no low interrupts set, check high interrupts - ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] - moveq \irqnr, #63 - andeqs \irqstat, \irqstat, \tmp - - @ find first active interrupt source - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endmarch/arm/mach-dove/irq.c +0
-11@@ -108,14 +108,6 @@ static int __initdata gpio2_irqs[4] = { 0, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* -* Compiling with both non-DT and DT support enabled, will -* break asm irq handler used by non-DT boards. Therefore, -* we provide a C-style irq handler even for non-DT boards, -* if MULTI_IRQ_HANDLER is set. -*/ -static void __iomem *dove_irq_base =IRQ_VIRT_BASE ;static asmlinkage void@@ -138,7 +130,6 @@ __exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)return ; } } -#endif void __init dove_init_irq (void ) {@@ -147,9 +138,7 @@ void __init dove_init_irq(void)orion_irq_init (0 ,IRQ_VIRT_BASE +IRQ_MASK_LOW_OFF );orion_irq_init (32 ,IRQ_VIRT_BASE +IRQ_MASK_HIGH_OFF ); -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq (dove_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-71. arch/arm/mach-mv78xx0/include/mach/entry-macro.S deleted +0
-41@@ -1,41 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Marvell MV78xx0 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no low interrupts set, check high interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] - mov \irqnr, #63 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no high interrupts set, check error interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF] - ldr \tmp, [\base, #IRQ_MASK_ERR_OFF] - mov \irqnr, #95 - ands \irqstat, \irqstat, \tmp - - @ find first active interrupt source -1001: clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endmarch/arm/mach-mv78xx0/irq.c +33
-0@@ -11,6 +11,7 @@#include <linux/kernel.h> #include <linux/irq.h> #include <linux/io.h> +#include <asm/exception.h> #include <mach/bridge-regs.h> #include <plat/orion-gpio.h> #include <plat/irq.h> @@ -23,12 +24,44 @@ static int __initdata gpio0_irqs[4] = { IRQ_MV78XX0_GPIO_24_31, }; +static void __iomem *mv78xx0_irq_base =IRQ_VIRT_BASE ; + +static asmlinkage void +__exception_irq_entry mv78xx0_legacy_handle_irq (struct pt_regs *regs) +{ +u32 stat; + + stat =readl_relaxed (mv78xx0_irq_base +IRQ_CAUSE_LOW_OFF ); + stat &=readl_relaxed (mv78xx0_irq_base +IRQ_MASK_LOW_OFF ); +if (stat) { +unsigned int hwirq =__fls (stat); +handle_IRQ (hwirq, regs); +return ; + } + stat =readl_relaxed (mv78xx0_irq_base +IRQ_CAUSE_HIGH_OFF ); + stat &=readl_relaxed (mv78xx0_irq_base +IRQ_MASK_HIGH_OFF ); +if (stat) { +unsigned int hwirq =32 +__fls (stat); +handle_IRQ (hwirq, regs); +return ; + } + stat =readl_relaxed (mv78xx0_irq_base +IRQ_CAUSE_ERR_OFF ); + stat &=readl_relaxed (mv78xx0_irq_base +IRQ_MASK_ERR_OFF ); +if (stat) { +unsigned int hwirq =64 +__fls (stat); +handle_IRQ (hwirq, regs); +return ; + } +} +void __init mv78xx0_init_irq (void ) {orion_irq_init (0 ,IRQ_VIRT_BASE +IRQ_MASK_LOW_OFF );orion_irq_init (32 ,IRQ_VIRT_BASE +IRQ_MASK_HIGH_OFF );orion_irq_init (64 ,IRQ_VIRT_BASE +IRQ_MASK_ERR_OFF ); +set_handle_irq (mv78xx0_legacy_handle_irq); +/* * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask * registers for core #1 are at an offset of 0x18 from those of arch/arm/mach-orion5x/include/mach/entry-macro.S deleted +0
-25@@ -1,25 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for Orion platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/bridge-regs.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =MAIN_IRQ_CAUSE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #0] @ main cause - ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask - mov \irqnr, #0 @ default irqnr - @ find cause bits that are unmasked - ands \irqstat, \irqstat, \tmp @ clear Z flag if any - clzne \irqnr, \irqstat @ calc irqnr - rsbne \irqnr, \irqnr, #31 - .endmarch/arm/mach-orion5x/irq.c +0
-12@@ -26,14 +26,6 @@ static int __initdata gpio0_irqs[4] = { IRQ_ORION5X_GPIO_24_31, }; -#ifdef CONFIG_MULTI_IRQ_HANDLER -/* -* Compiling with both non-DT and DT support enabled, will -* break asm irq handler used by non-DT boards. Therefore, -* we provide a C-style irq handler even for non-DT boards, -* if MULTI_IRQ_HANDLER is set. -*/ - asmlinkage void__exception_irq_entry orion5x_legacy_handle_irq (struct pt_regs *regs) {@@ -47,15 +39,11 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)return ; } } -#endif void __init orion5x_init_irq (void ) {orion_irq_init (0 ,MAIN_IRQ_MASK ); - -#ifdef CONFIG_MULTI_IRQ_HANDLER set_handle_irq (orion5x_legacy_handle_irq); -#endif /* * Initialize gpiolib for GPIOs 0-31. Signature · 1 line
2.1.0.rc2
PATCH 2/5 ARM: orion: always use MULTI_IRQ_HANDLER
Quoted 7 lines · On Monday 02 March 2015 22:37:49 Andrew Lunn wrote:
Quoted 5 lines · Arnd Bergmann
As a preparation for multiplatform support, this enables the
MULTI_IRQ_HANDLERcode unconditionally on dove and orion5x, and introduces the respective code on mv78xx0, which did not have it so far. The classicentry-macro.Sfiles are removed as they are now obsolete.
Quoted 6 lines
Hi Arnd
I don't know if it is relevant or not, but mach-dove IRQ handling is slightly broken. It uses IRQ 0. Russell King did provide a patch to move all the interrupts up by one, but it did not apply. I asked for a new version, rebased on the -rc1 of the time, but it never appeared.
Ok.
My guess is that my patch doesn't change that problem for better or worse, but it might make rebasing slightly harder.
Arnd
PATCH 2/5 ARM: orion: always use MULTI_IRQ_HANDLER
In reply to Andrew LunnQuoted 7 lines · Andrew Lunn
Quoted 5 lines · Arnd Bergmann
As a preparation for multiplatform support, this enables the
MULTI_IRQ_HANDLERcode unconditionally on dove and orion5x, and introduces the respective code on mv78xx0, which did not have it so far. The classicentry-macro.Sfiles are removed as they are now obsolete.
Quoted 6 lines
Hi Arnd
I don't know if it is relevant or not, but mach-dove IRQ handling is slightly broken. It uses IRQ 0. Russell King did provide a patch to move all the interrupts up by one, but it did not apply. I asked for a new version, rebased on the -rc1 of the time, but it never appeared.
That's because I only run non-rc kernels on my hardware, as I probably explained at the time.
Signature · 2 lines
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net.
PATCH 3/5 ARM: orion: use SPARSE_IRQ everywhere
In reply to Arnd BergmannAs a preparation for multiplatform support, this moves all the code using plat-orion over to use sparse irq support, which is enabled implicitly for multiplatform.
In particular, the hardcoded NR_IRQS macro gets replaced with a machine specific one that is set in the machine descriptor in order to set up a static mapping for all legacy interrupts.
Signed-off-by Arnd Bergmann <[email protected]>
--- arch/arm/Kconfig | 3 +++ arch/arm/mach-dove/cm-a510.c | 1 + arch/arm/mach-dove/dove-db-setup.c | 1 + arch/arm/mach-dove/include/mach/dove.h | 2 ++ arch/arm/mach-dove/include/mach/irqs.h | 2 +- arch/arm/mach-mv78xx0/buffalo-wxl-setup.c | 1 + arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 1 + arch/arm/mach-mv78xx0/include/mach/irqs.h | 2 +- arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 2 ++ arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | 1 + arch/arm/mach-orion5x/db88f5281-setup.c | 1 + arch/arm/mach-orion5x/dns323-setup.c | 1 + arch/arm/mach-orion5x/include/mach/irqs.h | 2 +- arch/arm/mach-orion5x/include/mach/orion5x.h | 2 ++ arch/arm/mach-orion5x/kurobox_pro-setup.c | 2 ++ arch/arm/mach-orion5x/ls-chl-setup.c | 1 + arch/arm/mach-orion5x/ls_hgl-setup.c | 1 + arch/arm/mach-orion5x/lsmini-setup.c | 1 + arch/arm/mach-orion5x/mv2120-setup.c | 1 + arch/arm/mach-orion5x/net2big-setup.c | 1 + arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 1 + arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 1 + arch/arm/mach-orion5x/rd88f5182-setup.c | 1 + arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 1 + arch/arm/mach-orion5x/terastation_pro2-setup.c | 1 + arch/arm/mach-orion5x/ts209-setup.c | 1 + arch/arm/mach-orion5x/ts409-setup.c | 1 + arch/arm/mach-orion5x/ts78xx-setup.c | 1 + arch/arm/mach-orion5x/wnr854t-setup.c | 1 + arch/arm/mach-orion5x/wrt350n-v2-setup.c | 1 + 30 files changed, 36 insertions(+), 3 deletions(-)
arch/arm/Kconfig +3 -0
@@ -506,6 +506,7 @@ config ARCH_DOVE select PINCTRL select PINCTRL_DOVE select PLAT_ORION_LEGACY + select SPARSE_IRQ help Support for the Marvell Dove SoC 88AP510
@@ -518,6 +519,7 @@ config ARCH_MV78XX0 select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY + select SPARSE_IRQ help Support for the following Marvell MV78xx0 series SoCs: MV781x0, MV782x0.
@@ -532,6 +534,7 @@ config ARCH_ORION5X select MULTI_IRQ_HANDLER select PCI select PLAT_ORION_LEGACY + select SPARSE_IRQ help Support for the following Marvell Orion 5x series SoCs: Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
arch/arm/mach-dove/cm-a510.c +1 -0
@@ -88,6 +88,7 @@ static void __init cm_a510_init(void)MACHINE_START (CM_A510 ,"Compulab CM-A510 Board" ) .atag_offset = 0x100, + .nr_irqs = DOVE_NR_IRQS, .init_machine = cm_a510_init, .map_io = dove_map_io, .init_early = dove_init_early,
arch/arm/mach-dove/dove-db-setup.c +1 -0
@@ -94,6 +94,7 @@ static void __init dove_db_init(void)MACHINE_START (DOVE_DB ,"Marvell DB-MV88AP510-BP Development Board" ) .atag_offset = 0x100, + .nr_irqs = DOVE_NR_IRQS, .init_machine = dove_db_init, .map_io = dove_map_io, .init_early = dove_init_early,
arch/arm/mach-dove/include/mach/dove.h +2 -0
@@ -11,6 +11,8 @@#ifndef __ASM_ARCH_DOVE_H#define __ASM_ARCH_DOVE_H +#include <mach/irqs.h> +/* * Marvell Dove address maps. *
arch/arm/mach-dove/include/mach/irqs.h +1 -1
@@ -90,7 +90,7 @@#define NR_PMU_IRQS 7#define IRQ_DOVE_RTC (IRQ_DOVE_PMU_START + 5) -#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS) +#define DOVE_NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)#endif
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +1 -0
@@ -146,6 +146,7 @@ subsys_initcall(wxl_pci_init);MACHINE_START (TERASTATION_WXL ,"Buffalo Nas WXL" )/* Maintainer: Sebastien Requiem <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = MV78XX0_NR_IRQS, .init_machine = wxl_init, .map_io = mv78xx0_map_io, .init_early = mv78xx0_init_early,
arch/arm/mach-mv78xx0/db78x00-bp-setup.c +1 -0
@@ -94,6 +94,7 @@ subsys_initcall(db78x00_pci_init);MACHINE_START (DB78X00_BP ,"Marvell DB-78x00-BP Development Board" )/* Maintainer: Lennert Buytenhek <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = MV78XX0_NR_IRQS, .init_machine = db78x00_init, .map_io = mv78xx0_map_io, .init_early = mv78xx0_init_early,
arch/arm/mach-mv78xx0/include/mach/irqs.h +1 -1
@@ -88,7 +88,7 @@#define IRQ_MV78XX0_GPIO_START 96#define NR_GPIO_IRQS 32 -#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) +#define MV78XX0_NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)#endif
arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +2 -0
@@ -12,6 +12,8 @@#ifndef __ASM_ARCH_MV78XX0_H#define __ASM_ARCH_MV78XX0_H +#include "irqs.h" +/* * Marvell MV78xx0 address maps. *
arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +1 -0
@@ -79,6 +79,7 @@ subsys_initcall(rd78x00_pci_init);MACHINE_START (RD78X00_MASA ,"Marvell RD-78x00-MASA Development Board" )/* Maintainer: Lennert Buytenhek <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = MV78XX0_NR_IRQS, .init_machine = rd78x00_masa_init, .map_io = mv78xx0_map_io, .init_early = mv78xx0_init_early,
arch/arm/mach-orion5x/db88f5281-setup.c +1 -0
@@ -369,6 +369,7 @@ static void __init db88f5281_init(void)MACHINE_START (DB88F5281 ,"Marvell Orion-2 Development Board" )/* Maintainer: Tzachi Perelstein <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = db88f5281_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/dns323-setup.c +1 -0
@@ -715,6 +715,7 @@ static void __init dns323_init(void)MACHINE_START (DNS323 ,"D-Link DNS-323" )/* Maintainer: Herbert Valerio Riedel <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = dns323_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/include/mach/irqs.h +1 -1
@@ -54,7 +54,7 @@#define IRQ_ORION5X_GPIO_START 32#define NR_GPIO_IRQS 32 -#define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) +#define ORION5X_NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)#endif
arch/arm/mach-orion5x/include/mach/orion5x.h +2 -0
@@ -14,6 +14,8 @@#ifndef __ASM_ARCH_ORION5X_H#define __ASM_ARCH_ORION5X_H +#include <mach/irqs.h> +/***************************************************************************** * Orion Address Maps *
arch/arm/mach-orion5x/kurobox_pro-setup.c +2 -0
@@ -383,6 +383,7 @@ static void __init kurobox_pro_init(void)MACHINE_START (KUROBOX_PRO ,"Buffalo/Revogear Kurobox Pro" )/* Maintainer: Ronen Shitrit <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
@@ -397,6 +398,7 @@ MACHINE_ENDMACHINE_START (LINKSTATION_PRO ,"Buffalo Linkstation Pro/Live" )/* Maintainer: Byron Bradley <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/ls-chl-setup.c +1 -0
@@ -320,6 +320,7 @@ static void __init lschl_init(void)MACHINE_START (LINKSTATION_LSCHL ,"Buffalo Linkstation LiveV3 (LS-CHL)" )/* Maintainer: Ash Hughes <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = lschl_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/ls_hgl-setup.c +1 -0
@@ -267,6 +267,7 @@ static void __init ls_hgl_init(void)MACHINE_START (LINKSTATION_LS_HGL ,"Buffalo Linkstation LS-HGL" )/* Maintainer: Zhu Qingsen <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = ls_hgl_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/lsmini-setup.c +1 -0
@@ -269,6 +269,7 @@ static void __init lsmini_init(void)MACHINE_START (LINKSTATION_MINI ,"Buffalo Linkstation Mini" )/* Maintainer: Alexey Kopytko <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = lsmini_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/mv2120-setup.c +1 -0
@@ -232,6 +232,7 @@ static void __init mv2120_init(void)MACHINE_START (MV2120 ,"HP Media Vault mv2120" )/* Maintainer: Martin Michlmayr <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = mv2120_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/net2big-setup.c +1 -0
@@ -423,6 +423,7 @@ static void __init net2big_init(void)/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ MACHINE_START (NET2BIG ,"LaCie 2Big Network" ) .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = net2big_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +1 -0
@@ -169,6 +169,7 @@ subsys_initcall(rd88f5181l_fxo_pci_init);MACHINE_START (RD88F5181L_FXO ,"Marvell Orion-VoIP FXO Reference Design" )/* Maintainer: Nicolas Pitre <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f5181l_fxo_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +1 -0
@@ -181,6 +181,7 @@ subsys_initcall(rd88f5181l_ge_pci_init);MACHINE_START (RD88F5181L_GE ,"Marvell Orion-VoIP GE Reference Design" )/* Maintainer: Lennert Buytenhek <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f5181l_ge_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/rd88f5182-setup.c +1 -0
@@ -281,6 +281,7 @@ static void __init rd88f5182_init(void)MACHINE_START (RD88F5182 ,"Marvell Orion-NAS Reference Design" )/* Maintainer: Ronen Shitrit <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f5182_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +1 -0
@@ -119,6 +119,7 @@ subsys_initcall(rd88f6183ap_ge_pci_init);MACHINE_START (RD88F6183AP_GE ,"Marvell Orion-1-90 AP GE Reference Design" )/* Maintainer: Lennert Buytenhek <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = rd88f6183ap_ge_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/terastation_pro2-setup.c +1 -0
@@ -359,6 +359,7 @@ static void __init tsp2_init(void)MACHINE_START (TERASTATION_PRO2 ,"Buffalo Terastation Pro II/Live" )/* Maintainer: Sylver Bruneau <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = tsp2_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/ts209-setup.c +1 -0
@@ -324,6 +324,7 @@ static void __init qnap_ts209_init(void)MACHINE_START (TS209 ,"QNAP TS-109/TS-209" )/* Maintainer: Byron Bradley <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = qnap_ts209_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/ts409-setup.c +1 -0
@@ -313,6 +313,7 @@ static void __init qnap_ts409_init(void)MACHINE_START (TS409 ,"QNAP TS-409" )/* Maintainer: Sylver Bruneau <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = qnap_ts409_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/ts78xx-setup.c +1 -0
@@ -615,6 +615,7 @@ static void __init ts78xx_init(void)MACHINE_START (TS78XX ,"Technologic Systems TS-78xx SBC" )/* Maintainer: Alexander Clouter <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = ts78xx_init, .map_io = ts78xx_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/wnr854t-setup.c +1 -0
@@ -174,6 +174,7 @@ subsys_initcall(wnr854t_pci_init);MACHINE_START (WNR854T ,"Netgear WNR854T" )/* Maintainer: Imre Kaloz <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = wnr854t_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
arch/arm/mach-orion5x/wrt350n-v2-setup.c +1 -0
@@ -262,6 +262,7 @@ subsys_initcall(wrt350n_v2_pci_init);MACHINE_START (WRT350N_V2 ,"Linksys WRT350N v2" )/* Maintainer: Lennert Buytenhek <[email protected]> */ .atag_offset = 0x100, + .nr_irqs = ORION5X_NR_IRQS, .init_machine = wrt350n_v2_init, .map_io = orion5x_map_io, .init_early = orion5x_init_early,
Signature · 1 line
2.1.0.rc2
cover ARM: orion5k/mv78xx0/dove multiplatform support
In reply to Arnd BergmannQuoted 4 lines · On Monday 02 March 2015 21:36:53 Arnd Bergmann wrote:
This is build tested so far and survives a randconfig builder for a few hundred builds without regressions, but I have not done any runtime testing. Any help in testing or reviewing would be much appreciated.
It would help to send out the version that I have actually tested. If you want to give it a try, please apply the patch below to actually get mach-dove to build.
Arnd
arch/arm/mach-dove/irq.c +1 -0
@@ -13,6 +13,7 @@#include <linux/irq.h> #include <linux/gpio.h> #include <linux/io.h> +#include <asm/exception.h> #include <asm/mach/arch.h> #include <asm/mach/irq.h>
arch/arm/mach-dove/irq.c +1 -1
@@ -161,7 +161,7 @@ void __init dove_init_irq(void)writel (0 ,PMU_INTERRUPT_MASK );writel (0 ,PMU_INTERRUPT_CAUSE ); -for (i =IRQ_DOVE_PMU_START ; i <NR_IRQS ; i++) { +for (i =IRQ_DOVE_PMU_START ; i <DOVE_NR_IRQS ; i++) {irq_set_chip_and_handler (i, &pmu_irq_chip, handle_level_irq);irq_set_status_flags (i,IRQ_LEVEL );set_irq_flags (i,IRQF_VALID );
arch/arm/mach-dove/pm.h +1 -1
@@ -61,7 +61,7 @@ static inline int pmu_to_irq(int pin)static inline int irq_to_pmu (int irq) { -if (IRQ_DOVE_PMU_START <= irq && irq <NR_IRQS ) +if (IRQ_DOVE_PMU_START <= irq && irq <DOVE_NR_IRQS )return irq -IRQ_DOVE_PMU_START ;return -EINVAL ;
PATCH 4/5 ARM: orion: clean up mach/*.h headers
In reply to Arnd BergmannThis is a simple move of all header files that are no longer included by anything else from the include/mach directory to the platform directory itself, for mv78xx0, dove, and orion5x, as preparation for multiplatform support.
The mach/uncompress.h headers are left in place for now, and are mildly modified to be independent of the other headers. They will be removed entirely when ARCH_MULTIPLATFORM gets enabled and they become obsolete.
Rather than updating the path names inside of the comments of each header, I delete those comments to avoid having to update them again, should they get moved or copied another time.
Signed-off-by Arnd Bergmann <[email protected]>
---
arch/arm/mach-dove/{include/mach => }/bridge-regs.h | 4 +---
arch/arm/mach-dove/cm-a510.c | 3 +--
arch/arm/mach-dove/common.c | 4 ++--
arch/arm/mach-dove/dove-db-setup.c | 2 +-
arch/arm/mach-dove/{include/mach => }/dove.h | 4 +---
arch/arm/mach-dove/include/mach/hardware.h | 19 -------------------
arch/arm/mach-dove/include/mach/uncompress.h | 8 +++-----
arch/arm/mach-dove/irq.c | 8 +++++---
arch/arm/mach-dove/{include/mach => }/irqs.h | 2 --
arch/arm/mach-dove/mpp.c | 2 +-
arch/arm/mach-dove/pcie.c | 4 ++--
arch/arm/mach-dove/{include/mach => }/pm.h | 4 +---
.../arm/mach-mv78xx0/{include/mach => }/bridge-regs.h | 4 +---
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c | 2 +-
arch/arm/mach-mv78xx0/common.c | 4 ++--
arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 2 +-
arch/arm/mach-mv78xx0/include/mach/hardware.h | 14 --------------
arch/arm/mach-mv78xx0/include/mach/uncompress.h | 4 +---
arch/arm/mach-mv78xx0/irq.c | 2 +-
arch/arm/mach-mv78xx0/{include/mach => }/irqs.h | 2 --
arch/arm/mach-mv78xx0/mpp.c | 2 +-
arch/arm/mach-mv78xx0/{include/mach => }/mv78xx0.h | 2 --
arch/arm/mach-mv78xx0/pcie.c | 2 +-
arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | 2 +-
arch/arm/mach-orion5x/board-d2net.c | 2 +-
arch/arm/mach-orion5x/board-dt.c | 4 ++--
arch/arm/mach-orion5x/board-mss2.c | 4 ++--
arch/arm/mach-orion5x/board-rd88f5182.c | 2 +-
.../arm/mach-orion5x/{include/mach => }/bridge-regs.h | 4 +---
arch/arm/mach-orion5x/common.c | 6 +++---
arch/arm/mach-orion5x/db88f5281-setup.c | 2 +-
arch/arm/mach-orion5x/dns323-setup.c | 2 +-
arch/arm/mach-orion5x/include/mach/hardware.h | 14 --------------
arch/arm/mach-orion5x/include/mach/uncompress.h | 4 +---
arch/arm/mach-orion5x/irq.c | 2 +-
arch/arm/mach-orion5x/{include/mach => }/irqs.h | 2 --
arch/arm/mach-orion5x/kurobox_pro-setup.c | 2 +-
arch/arm/mach-orion5x/ls-chl-setup.c | 2 +-
arch/arm/mach-orion5x/ls_hgl-setup.c | 2 +-
arch/arm/mach-orion5x/lsmini-setup.c | 2 +-
arch/arm/mach-orion5x/mpp.c | 2 +-
arch/arm/mach-orion5x/mv2120-setup.c | 2 +-
arch/arm/mach-orion5x/net2big-setup.c | 2 +-
arch/arm/mach-orion5x/{include/mach => }/orion5x.h | 4 +---
arch/arm/mach-orion5x/pci.c | 2 +-
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 2 +-
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 2 +-
arch/arm/mach-orion5x/rd88f5182-setup.c | 2 +-
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 2 +-
arch/arm/mach-orion5x/terastation_pro2-setup.c | 2 +-
arch/arm/mach-orion5x/ts209-setup.c | 2 +-
arch/arm/mach-orion5x/ts409-setup.c | 2 +-
arch/arm/mach-orion5x/ts78xx-setup.c | 2 +-
arch/arm/mach-orion5x/tsx09-common.c | 2 +-
arch/arm/mach-orion5x/wnr854t-setup.c | 2 +-
arch/arm/mach-orion5x/wrt350n-v2-setup.c | 2 +-
arch/arm/plat-orion/irq.c | 1 -
arch/arm/plat-orion/mpp.c | 1 -
58 files changed, 62 insertions(+), 136 deletions(-)
rename arch/arm/mach-dove/{include/mach => }/bridge-regs.h (96%)
rename arch/arm/mach-dove/{include/mach => }/dove.h (99%)
delete mode 100644 arch/arm/mach-dove/include/mach/hardware.h
rename arch/arm/mach-dove/{include/mach => }/irqs.h (98%)
rename arch/arm/mach-dove/{include/mach => }/pm.h (97%)
rename arch/arm/mach-mv78xx0/{include/mach => }/bridge-regs.h (92%)
delete mode 100644 arch/arm/mach-mv78xx0/include/mach/hardware.h
rename arch/arm/mach-mv78xx0/{include/mach => }/irqs.h (98%)
rename arch/arm/mach-mv78xx0/{include/mach => }/mv78xx0.h (98%)
rename arch/arm/mach-orion5x/{include/mach => }/bridge-regs.h (92%)
delete mode 100644 arch/arm/mach-orion5x/include/mach/hardware.h
rename arch/arm/mach-orion5x/{include/mach => }/irqs.h (96%)
rename arch/arm/mach-orion5x/{include/mach => }/orion5x.h (98%)arch/arm/mach-dove/bridge-regs.h renamed from arch/arm/mach-dove/include/mach/bridge-regs.h +1 -3
@@ -1,6 +1,4 @@/* -* arch/arm/mach-dove/include/mach/bridge-regs.h -* * Mbus-L to Mbus Bridge Registers * * This file is licensed under the terms of the GNU General Public
@@ -11,7 +9,7 @@#ifndef __ASM_ARCH_BRIDGE_REGS_H#define __ASM_ARCH_BRIDGE_REGS_H -#include <mach/dove.h> +#include "dove.h" #define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0000)
arch/arm/mach-dove/cm-a510.c +1 -2
@@ -22,8 +22,7 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/dove.h> - +#include "dove.h" #include "common.h" static struct mv643xx_eth_platform_data cm_a510_ge00_data = {
arch/arm/mach-dove/common.c +2 -2
@@ -20,11 +20,11 @@#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> -#include <mach/bridge-regs.h> -#include <mach/pm.h> #include <plat/common.h> #include <plat/irq.h> #include <plat/time.h> +#include "bridge-regs.h" +#include "pm.h" #include "common.h" /* These can go away once Dove uses the mvebu-mbus DT binding */
arch/arm/mach-dove/dove-db-setup.c +1 -1
@@ -24,7 +24,7 @@#include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/dove.h> +#include "dove.h" #include "common.h" static struct mv643xx_eth_platform_data dove_db_ge00_data = {
arch/arm/mach-dove/dove.h renamed from arch/arm/mach-dove/include/mach/dove.h +1 -3
@@ -1,6 +1,4 @@/* -* arch/arm/mach-dove/include/mach/dove.h -* * Generic definitions for Marvell Dove 88AP510 SoC * * This file is licensed under the terms of the GNU General Public
@@ -11,7 +9,7 @@#ifndef __ASM_ARCH_DOVE_H#define __ASM_ARCH_DOVE_H -#include <mach/irqs.h> +#include "irqs.h" /* * Marvell Dove address maps.
arch/arm/mach-dove/include/mach/hardware.h deleted +0 -19
@@ -1,19 +0,0 @@ -/* -* arch/arm/mach-dove/include/mach/hardware.h -* -* This file is licensed under the terms of the GNU General Public -* License version 2. This program is licensed "as is" without any -* warranty of any kind, whether express or implied. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "dove.h" - -/* Macros below are required for compatibility with PXA AC'97 driver. */ -#define __REG (x) (*((volatile u32 *)((x) - DOVE_SB_REGS_PHYS_BASE + \ - DOVE_SB_REGS_VIRT_BASE))) -#define __PREG (x) (((u32)&(x)) - DOVE_SB_REGS_VIRT_BASE + \ - DOVE_SB_REGS_PHYS_BASE) -#endif
arch/arm/mach-dove/include/mach/uncompress.h +3 -5
@@ -1,15 +1,13 @@/* -* arch/arm/mach-dove/include/mach/uncompress.h -* * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include <mach/dove.h> +#define UART0_PHYS_BASE (0xf1000000 + 0x12000) -#define UART_THR ((volatile unsigned char *)(DOVE_UART0_PHYS_BASE + 0x0)) -#define UART_LSR ((volatile unsigned char *)(DOVE_UART0_PHYS_BASE + 0x14)) +#define UART_THR ((volatile unsigned char *)(UART0_PHYS_BASE + 0x0)) +#define UART_LSR ((volatile unsigned char *)(UART0_PHYS_BASE + 0x14))#define LSR_THRE 0x20
arch/arm/mach-dove/irq.c +5 -3
@@ -14,11 +14,13 @@#include <linux/gpio.h> #include <linux/io.h> #include <asm/mach/arch.h> -#include <plat/irq.h> #include <asm/mach/irq.h> -#include <mach/pm.h> -#include <mach/bridge-regs.h> + +#include <plat/irq.h> #include <plat/orion-gpio.h> + +#include "pm.h" +#include "bridge-regs.h" #include "common.h" static void pmu_irq_mask (struct irq_data *d)
arch/arm/mach-dove/irqs.h renamed from arch/arm/mach-dove/include/mach/irqs.h +0 -2
@@ -1,6 +1,4 @@/* -* arch/arm/mach-dove/include/mach/irqs.h -* * IRQ definitions for Marvell Dove 88AP510 SoC * * This file is licensed under the terms of the GNU General Public
arch/arm/mach-dove/mpp.c +1 -1
@@ -12,8 +12,8 @@#include <linux/gpio.h> #include <linux/io.h> #include <plat/mpp.h> -#include <mach/dove.h> #include <plat/orion-gpio.h> +#include "dove.h" #include "mpp.h" struct dove_mpp_grp {
arch/arm/mach-dove/pcie.c +2 -2
@@ -17,9 +17,9 @@#include <asm/setup.h> #include <asm/delay.h> #include <plat/pcie.h> -#include <mach/irqs.h> -#include <mach/bridge-regs.h> #include <plat/addr-map.h> +#include "irqs.h" +#include "bridge-regs.h" #include "common.h" struct pcie_port {
arch/arm/mach-dove/pm.h renamed from arch/arm/mach-dove/include/mach/pm.h +1 -3
@@ -1,6 +1,4 @@/* -* arch/arm/mach-dove/include/mach/pm.h -* * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied.
@@ -10,7 +8,7 @@#define __ASM_ARCH_PM_H#include <asm/errno.h> -#include <mach/irqs.h> +#include "irqs.h" #define CLOCK_GATING_CONTROL (DOVE_PMU_VIRT_BASE + 0x38)#define CLOCK_GATING_BIT_USB0 0
arch/arm/mach-mv78xx0/bridge-regs.h renamed from arch/arm/mach-mv78xx0/include/mach/bridge-regs.h +1 -3
@@ -1,6 +1,4 @@/* -* arch/arm/mach-mv78xx0/include/mach/bridge-regs.h -* * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied.
@@ -9,7 +7,7 @@#ifndef __ASM_ARCH_BRIDGE_REGS_H#define __ASM_ARCH_BRIDGE_REGS_H -#include <mach/mv78xx0.h> +#include "mv78xx0.h" #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)#define L2_WRITETHROUGH 0x00020000
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +1 -1
@@ -17,9 +17,9 @@#include <linux/mv643xx_eth.h> #include <linux/ethtool.h> #include <linux/i2c.h> -#include <mach/mv78xx0.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include "mv78xx0.h" #include "common.h" #include "mpp.h"
arch/arm/mach-mv78xx0/common.c +2 -2
@@ -18,13 +18,13 @@#include <asm/hardware/cache-feroceon-l2.h> #include <asm/mach/map.h> #include <asm/mach/time.h> -#include <mach/mv78xx0.h> -#include <mach/bridge-regs.h> #include <linux/platform_data/usb-ehci-orion.h> #include <linux/platform_data/mtd-orion_nand.h> #include <plat/time.h> #include <plat/common.h> #include <plat/addr-map.h> +#include "mv78xx0.h" +#include "bridge-regs.h" #include "common.h" static int get_tclk (void );
arch/arm/mach-mv78xx0/db78x00-bp-setup.c +1 -1
@@ -15,9 +15,9 @@#include <linux/mv643xx_eth.h> #include <linux/ethtool.h> #include <linux/i2c.h> -#include <mach/mv78xx0.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include "mv78xx0.h" #include "common.h" static struct mv643xx_eth_platform_data db78x00_ge00_data = {
arch/arm/mach-mv78xx0/include/mach/hardware.h deleted +0 -14
@@ -1,14 +0,0 @@ -/* -* arch/arm/mach-mv78xx0/include/mach/hardware.h -* -* This file is licensed under the terms of the GNU General Public -* License version 2. This program is licensed "as is" without any -* warranty of any kind, whether express or implied. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "mv78xx0.h" - -#endif
arch/arm/mach-mv78xx0/include/mach/uncompress.h +1 -3
@@ -1,14 +1,12 @@/* -* arch/arm/mach-mv78xx0/include/mach/uncompress.h -* * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #include <linux/serial_reg.h> -#include <mach/mv78xx0.h> +#define UART0_PHYS_BASE (0xf1000000 + 0x12000)#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE)static void putc (const char c)
arch/arm/mach-mv78xx0/irq.c +1 -1
@@ -12,9 +12,9 @@#include <linux/irq.h> #include <linux/io.h> #include <asm/exception.h> -#include <mach/bridge-regs.h> #include <plat/orion-gpio.h> #include <plat/irq.h> +#include "bridge-regs.h" #include "common.h" static int __initdata gpio0_irqs[4 ] = {
arch/arm/mach-mv78xx0/irqs.h renamed from arch/arm/mach-mv78xx0/include/mach/irqs.h +0 -2
@@ -1,6 +1,4 @@/* -* arch/arm/mach-mv78xx0/include/mach/irqs.h -* * IRQ definitions for Marvell MV78xx0 SoCs * * This file is licensed under the terms of the GNU General Public
arch/arm/mach-mv78xx0/mpp.c +1 -1
@@ -12,7 +12,7 @@#include <linux/init.h> #include <linux/io.h> #include <plat/mpp.h> -#include <mach/hardware.h> +#include "mv78xx0.h" #include "common.h" #include "mpp.h"
arch/arm/mach-mv78xx0/mv78xx0.h renamed from arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +0 -2
@@ -1,6 +1,4 @@/* -* arch/arm/mach-mv78xx0/include/mach/mv78xx0.h -* * Generic definitions for Marvell MV78xx0 SoC flavors: * MV781x0 and MV782x0. *
arch/arm/mach-mv78xx0/pcie.c +1 -1
@@ -15,7 +15,7 @@#include <asm/irq.h> #include <asm/mach/pci.h> #include <plat/pcie.h> -#include <mach/mv78xx0.h> +#include "mv78xx0.h" #include "common.h" #define MV78XX0_MBUS_PCIE_MEM_TARGET (port, lane) ((port) ? 8 : 4)
arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +1 -1
@@ -14,9 +14,9 @@#include <linux/ata_platform.h> #include <linux/mv643xx_eth.h> #include <linux/ethtool.h> -#include <mach/mv78xx0.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include "mv78xx0.h" #include "common.h" static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = {
arch/arm/mach-orion5x/board-d2net.c +1 -1
@@ -20,9 +20,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include <plat/orion-gpio.h> #include "common.h" +#include "orion5x.h" /***************************************************************************** * LaCie d2 Network Info
arch/arm/mach-orion5x/board-dt.c +2 -2
@@ -21,10 +21,10 @@#include <asm/system_misc.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/orion5x.h> -#include <mach/bridge-regs.h> #include <plat/irq.h> #include <plat/time.h> +#include "orion5x.h" +#include "bridge-regs.h" #include "common.h" static struct of_dev_auxdata orion5x_auxdata_lookup[]__initdata = {
arch/arm/mach-orion5x/board-mss2.c +2 -2
@@ -17,8 +17,8 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> -#include <mach/bridge-regs.h> +#include "orion5x.h" +#include "bridge-regs.h" #include "common.h" /*****************************************************************************
arch/arm/mach-orion5x/board-rd88f5182.c +1 -1
@@ -18,8 +18,8 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5182 Info
arch/arm/mach-orion5x/bridge-regs.h renamed from arch/arm/mach-orion5x/include/mach/bridge-regs.h +1 -3
@@ -1,6 +1,4 @@/* -* arch/arm/mach-orion5x/include/mach/bridge-regs.h -* * Orion CPU Bridge Registers * * This file is licensed under the terms of the GNU General Public
@@ -11,7 +9,7 @@#ifndef __ASM_ARCH_BRIDGE_REGS_H#define __ASM_ARCH_BRIDGE_REGS_H -#include <mach/orion5x.h> +#include "orion5x.h" #define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100)
arch/arm/mach-orion5x/common.c +3 -3
@@ -27,14 +27,14 @@#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> -#include <mach/bridge-regs.h> -#include <mach/hardware.h> -#include <mach/orion5x.h> #include <linux/platform_data/mtd-orion_nand.h> #include <linux/platform_data/usb-ehci-orion.h> #include <plat/time.h> #include <plat/common.h> + +#include "bridge-regs.h" #include "common.h" +#include "orion5x.h" /***************************************************************************** * I/O Address Mapping
arch/arm/mach-orion5x/db88f5281-setup.c +1 -1
@@ -23,10 +23,10 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include <linux/platform_data/mtd-orion_nand.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * DB-88F5281 on board devices
arch/arm/mach-orion5x/dns323-setup.c +1 -1
@@ -33,8 +33,8 @@#include <asm/mach/arch.h> #include <asm/mach/pci.h> #include <asm/system_info.h> -#include <mach/orion5x.h> #include <plat/orion-gpio.h> +#include "orion5x.h" #include "common.h" #include "mpp.h"
arch/arm/mach-orion5x/include/mach/hardware.h deleted +0 -14
@@ -1,14 +0,0 @@ -/* -* arch/arm/mach-orion5x/include/mach/hardware.h -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 as -* published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "orion5x.h" - -#endif
arch/arm/mach-orion5x/include/mach/uncompress.h +1 -3
@@ -1,6 +1,4 @@/* -* arch/arm/mach-orion5x/include/mach/uncompress.h -* * Tzachi Perelstein <[email protected]> * * This file is licensed under the terms of the GNU General Public
@@ -9,8 +7,8 @@*/ #include <linux/serial_reg.h> -#include <mach/orion5x.h> +#define UART0_PHYS_BASE (0xf1000000 + 0x12000)#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE)static void putc (const char c)
arch/arm/mach-orion5x/irq.c +1 -1
@@ -13,10 +13,10 @@#include <linux/kernel.h> #include <linux/irq.h> #include <linux/io.h> -#include <mach/bridge-regs.h> #include <plat/orion-gpio.h> #include <plat/irq.h> #include <asm/exception.h> +#include "bridge-regs.h" #include "common.h" static int __initdata gpio0_irqs[4 ] = {
arch/arm/mach-orion5x/irqs.h renamed from arch/arm/mach-orion5x/include/mach/irqs.h +0 -2
@@ -1,6 +1,4 @@/* -* arch/arm/mach-orion5x/include/mach/irqs.h -* * IRQ definitions for Orion SoC * * Maintainer: Tzachi Perelstein <[email protected]>
arch/arm/mach-orion5x/kurobox_pro-setup.c +1 -1
@@ -23,10 +23,10 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include <linux/platform_data/mtd-orion_nand.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * KUROBOX-PRO Info
arch/arm/mach-orion5x/ls-chl-setup.c +1 -1
@@ -22,9 +22,9 @@#include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * Linkstation LS-CHL Info
arch/arm/mach-orion5x/ls_hgl-setup.c +1 -1
@@ -21,9 +21,9 @@#include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * Linkstation LS-HGL Info
arch/arm/mach-orion5x/lsmini-setup.c +1 -1
@@ -21,9 +21,9 @@#include <linux/gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * Linkstation Mini Info
arch/arm/mach-orion5x/mpp.c +1 -1
@@ -11,8 +11,8 @@#include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> -#include <mach/hardware.h> #include <plat/mpp.h> +#include "orion5x.h" #include "mpp.h" #include "common.h"
arch/arm/mach-orion5x/mv2120-setup.c +1 -1
@@ -21,9 +21,9 @@#include <linux/ata_platform.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #define MV2120_NOR_BOOT_BASE 0xf4000000#define MV2120_NOR_BOOT_SIZE SZ_512K
arch/arm/mach-orion5x/net2big-setup.c +1 -1
@@ -24,10 +24,10 @@#include <linux/delay.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/orion5x.h> #include <plat/orion-gpio.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * LaCie 2Big Network Info
arch/arm/mach-orion5x/orion5x.h renamed from arch/arm/mach-orion5x/include/mach/orion5x.h +1 -3
@@ -1,6 +1,4 @@/* -* arch/arm/mach-orion5x/include/mach/orion5x.h -* * Generic definitions of Orion SoC flavors: * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. *
@@ -14,7 +12,7 @@#ifndef __ASM_ARCH_ORION5X_H#define __ASM_ARCH_ORION5X_H -#include <mach/irqs.h> +#include "irqs.h" /***************************************************************************** * Orion Address Maps
arch/arm/mach-orion5x/pci.c +1 -1
@@ -19,8 +19,8 @@#include <asm/mach/pci.h> #include <plat/pcie.h> #include <plat/addr-map.h> -#include <mach/orion5x.h> #include "common.h" +#include "orion5x.h" /***************************************************************************** * Orion has one PCIe controller and one PCI controller.
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +1 -1
@@ -20,9 +20,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5181L FXO Info
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +1 -1
@@ -21,9 +21,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5181L GE Info
arch/arm/mach-orion5x/rd88f5182-setup.c +1 -1
@@ -23,9 +23,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * RD-88F5182 Info
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +1 -1
@@ -22,8 +22,8 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" +#include "orion5x.h" static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = { .phy_addr =-1 ,
arch/arm/mach-orion5x/terastation_pro2-setup.c +1 -1
@@ -22,9 +22,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" /***************************************************************************** * Terastation Pro 2/Live Info
arch/arm/mach-orion5x/ts209-setup.c +1 -1
@@ -25,9 +25,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #include "tsx09-common.h" #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000
arch/arm/mach-orion5x/ts409-setup.c +1 -1
@@ -27,9 +27,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #include "tsx09-common.h" /*****************************************************************************
arch/arm/mach-orion5x/ts78xx-setup.c +1 -1
@@ -23,9 +23,9 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/orion5x.h> #include "common.h" #include "mpp.h" +#include "orion5x.h" #include "ts78xx-fpga.h" /*****************************************************************************
arch/arm/mach-orion5x/tsx09-common.c +1 -1
@@ -15,7 +15,7 @@#include <linux/mv643xx_eth.h> #include <linux/timex.h> #include <linux/serial_reg.h> -#include <mach/orion5x.h> +#include "orion5x.h" #include "tsx09-common.h" #include "common.h"
arch/arm/mach-orion5x/wnr854t-setup.c +1 -1
@@ -19,7 +19,7 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> +#include "orion5x.h" #include "common.h" #include "mpp.h"
arch/arm/mach-orion5x/wrt350n-v2-setup.c +1 -1
@@ -22,7 +22,7 @@#include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> -#include <mach/orion5x.h> +#include "orion5x.h" #include "common.h" #include "mpp.h"
arch/arm/plat-orion/irq.c +0 -1
@@ -18,7 +18,6 @@#include <asm/exception.h> #include <plat/irq.h> #include <plat/orion-gpio.h> -#include <mach/bridge-regs.h> void __init orion_irq_init (unsigned int irq_start,void __iomem *maskaddr) {
arch/arm/plat-orion/mpp.c +0 -1
@@ -13,7 +13,6 @@#include <linux/mbus.h> #include <linux/io.h> #include <linux/gpio.h> -#include <mach/hardware.h> #include <plat/orion-gpio.h> #include <plat/mpp.h>
Signature · 1 line
2.1.0.rc2
PATCH 5/5 ARM: orion: multiplatform support
In reply to Arnd BergmannAll three remaining orion based platforms are now ready to be enabled for multiplatform support, this patch does the switch over by modifying the Kconfig file, the defconfig and removing the last mach/*.h header that becomes obsolete with this.
Signed-off-by Arnd Bergmann <[email protected]>
--- arch/arm/Kconfig | 45 ------------------------ arch/arm/configs/dove_defconfig | 2 ++ arch/arm/configs/mv78xx0_defconfig | 3 ++ arch/arm/configs/orion5x_defconfig | 3 ++ arch/arm/mach-dove/Kconfig | 15 +++++--- arch/arm/mach-dove/Makefile | 2 ++ arch/arm/mach-dove/include/mach/uncompress.h | 34 ------------------ arch/arm/mach-mv78xx0/Kconfig | 15 +++++--- arch/arm/mach-mv78xx0/Makefile | 2 ++ arch/arm/mach-mv78xx0/include/mach/uncompress.h | 44 ----------------------- arch/arm/mach-orion5x/Kconfig | 18 +++++++--- arch/arm/mach-orion5x/Makefile | 2 ++ arch/arm/mach-orion5x/include/mach/uncompress.h | 46 ------------------------- 13 files changed, 50 insertions(+), 181 deletions(-) delete mode 100644 arch/arm/mach-dove/include/mach/uncompress.h delete mode 100644 arch/arm/mach-mv78xx0/include/mach/uncompress.h delete mode 100644 arch/arm/mach-orion5x/include/mach/uncompress.h
arch/arm/Kconfig +0 -45
@@ -495,51 +495,6 @@ config ARCH_IXP4XX help Support for Intel's IXP4XX (XScale) family of processors. -config ARCH_DOVE - bool "Marvell Dove" - select ARCH_REQUIRE_GPIOLIB - select CPU_PJ4 - select GENERIC_CLOCKEVENTS - select MIGHT_HAVE_PCI - select MULTI_IRQ_HANDLER - select MVEBU_MBUS - select PINCTRL - select PINCTRL_DOVE - select PLAT_ORION_LEGACY - select SPARSE_IRQ - help - Support for the Marvell Dove SoC 88AP510 - -config ARCH_MV78XX0 - bool "Marvell MV78xx0" - select ARCH_REQUIRE_GPIOLIB - select CPU_FEROCEON - select GENERIC_CLOCKEVENTS - select MVEBU_MBUS - select MULTI_IRQ_HANDLER - select PCI - select PLAT_ORION_LEGACY - select SPARSE_IRQ - help - Support for the following Marvell MV78xx0 series SoCs: - MV781x0, MV782x0. - -config ARCH_ORION5X - bool "Marvell Orion" - depends on MMU - select ARCH_REQUIRE_GPIOLIB - select CPU_FEROCEON - select GENERIC_CLOCKEVENTS - select MVEBU_MBUS - select MULTI_IRQ_HANDLER - select PCI - select PLAT_ORION_LEGACY - select SPARSE_IRQ - help - Support for the following Marvell Orion 5x series SoCs: - Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), - Orion-2 (5281), Orion-1-90 (6183). - config ARCH_KS8695 bool "Micrel/Kendin KS8695" select ARCH_REQUIRE_GPIOLIB
arch/arm/configs/dove_defconfig +2 -0
@@ -9,6 +9,8 @@ CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y +# CONFIG_ARCH_MULTI_V6 is not set +CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_DOVE=y CONFIG_MACH_DOVE_DB=y CONFIG_MACH_CM_A510=y
arch/arm/configs/mv78xx0_defconfig +3 -0
@@ -11,6 +11,9 @@ CONFIG_KPROBES=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V6 is not set +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_MV78XX0=y CONFIG_MACH_DB78X00_BP=y CONFIG_MACH_RD78X00_MASA=y
arch/arm/configs/orion5x_defconfig +3 -0
@@ -13,6 +13,9 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y CONFIG_BSD_DISKLABEL=y +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V6 is not set +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_ORION5X=y CONFIG_MACH_DB88F5281=y CONFIG_MACH_RD88F5182=y
arch/arm/mach-dove/Kconfig +11 -4
@@ -1,6 +1,15 @@ -if ARCH_DOVE +menuconfig ARCH_DOVE + bool "Marvell Dove" if ARCH_MULTI_V7 + select ARCH_REQUIRE_GPIOLIB + select CPU_PJ4 + select MVEBU_MBUS + select PINCTRL + select PINCTRL_DOVE + select PLAT_ORION_LEGACY + help + Support for the Marvell Dove SoC 88AP510 -menu "Marvell Dove Implementations" +if ARCH_DOVE config DOVE_LEGACY bool
@@ -20,6 +29,4 @@ config MACH_CM_A510 Say 'Y' here if you want your kernel to support the CompuLab CM-A510 Board. -endmenu - endif
arch/arm/mach-dove/Makefile +2 -0
@@ -1,3 +1,5 @@ +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include + obj-y += common.o obj-$(CONFIG_DOVE_LEGACY) += irq.o mpp.o obj-$(CONFIG_PCI) += pcie.o
arch/arm/mach-dove/include/mach/uncompress.h deleted +0 -34
@@ -1,34 +0,0 @@ -/* -* This file is licensed under the terms of the GNU General Public -* License version 2. This program is licensed "as is" without any -* warranty of any kind, whether express or implied. -*/ - -#define UART0_PHYS_BASE (0xf1000000 + 0x12000) - -#define UART_THR ((volatile unsigned char *)(UART0_PHYS_BASE + 0x0)) -#define UART_LSR ((volatile unsigned char *)(UART0_PHYS_BASE + 0x14)) - -#define LSR_THRE 0x20 - -static void putc (const char c) -{ -int i; - -for (i =0 ; i <0x1000 ; i++) { -/* Transmit fifo not full? */ -if (*UART_LSR &LSR_THRE ) -break ; - } - - *UART_THR = c; -} - -static void flush (void ) -{ -} - -/* -* nothing to do -*/ -#define arch_decomp_setup ()
arch/arm/mach-mv78xx0/Kconfig +11 -4
@@ -1,6 +1,15 @@ -if ARCH_MV78XX0 +menuconfig ARCH_MV78XX0 + bool "Marvell MV78xx0" if ARCH_MULTI_V5 + select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON + select MVEBU_MBUS + select PCI + select PLAT_ORION_LEGACY + help + Support for the following Marvell MV78xx0 series SoCs: + MV781x0, MV782x0. -menu "Marvell MV78xx0 Implementations" +if ARCH_MV78XX0 config MACH_DB78X00_BP bool "Marvell DB-78x00-BP Development Board"
@@ -20,6 +29,4 @@ config MACH_TERASTATION_WXL Say 'Y' here if you want your kernel to support the Buffalo WXL Nas. -endmenu - endif
arch/arm/mach-mv78xx0/Makefile +2 -0
@@ -1,3 +1,5 @@ +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include + obj-y += common.o mpp.o irq.o pcie.o obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
arch/arm/mach-mv78xx0/include/mach/uncompress.h deleted +0 -44
44 lines not on this page · raw message
arch/arm/mach-orion5x/Kconfig +14 -4
@@ -1,6 +1,18 @@ -if ARCH_ORION5X +menuconfig ARCH_ORION5X + bool "Marvell Orion" + depends on MMU && ARCH_MULTI_V5 + select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON + select GENERIC_CLOCKEVENTS + select MVEBU_MBUS + select PCI + select PLAT_ORION_LEGACY + help + Support for the following Marvell Orion 5x series SoCs: + Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), + Orion-2 (5281), Orion-1-90 (6183). -menu "Orion Implementations" +if ARCH_ORION5X config ARCH_ORION5X_DT bool "Marvell Orion5x Flattened Device Tree"
@@ -160,6 +172,4 @@ config MACH_RD88F6183AP_GE Say 'Y' here if you want your kernel to support the Marvell Orion-1-90 (88F6183) AP GE RD. -endmenu - endif
arch/arm/mach-orion5x/Makefile +2 -0
@@ -1,3 +1,5 @@ +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include + obj-y += common.o pci.o irq.o mpp.o obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o
arch/arm/mach-orion5x/include/mach/uncompress.h deleted +0 -46
46 lines not on this page · raw message
Signature · 1 line
2.1.0.rc2
Andrew Lunn
maintainercover ARM: orion5k/mv78xx0/dove multiplatform support
In reply to Arnd BergmannQuoted 1 line · Arnd Bergmann
Hi everyone,
Hi Arnd
Dove already is multi-platform, when you use it in mach-mvebu. The old mach-dove is there to slowly bit rot, because there is one user who has a lot of out of tree patches which are apparently not easy to make work with DT mach-mvebu Dove code.
Quoted 2 lines
I'm trying to get all ARMv7 platforms moved over to
ARCH_MULTIPLATFORM
It should be noted that orion5x is not an ARMv7.
Andrew
cover ARM: orion5k/mv78xx0/dove multiplatform support
Quoted 9 lines · On Monday 02 March 2015 22:30:58 Andrew Lunn wrote:
Quoted 1 line · Arnd Bergmann
Hi everyone,
Hi Arnd
Dove already is multi-platform, when you use it in mach-mvebu. The old mach-dove is there to slowly bit rot, because there is one user who has a lot of out of tree patches which are apparently not easy to make work with DT mach-mvebu Dove code.
I understand that, but I really want to finalize this chapter of the multiplatform work, it's been going for too long. It's not the only platform that has ATAG-based board files remaining, and I don't see how keeping it the remaining dove board files out of multiplatform is going to speed up their removal.
Quoted 4 lines
Quoted 2 lines
I'm trying to get all ARMv7 platforms moved over to
ARCH_MULTIPLATFORMIt should be noted that orion5x is not an ARMv7.
mv78xx0 as well. Yes, that would have been good to mention in the cover-letter, I assumed that everyone was aware of that.
It would seem a bit silly to do one or two of these and not do the others at the same time.
Arnd
cover ARM: orion5k/mv78xx0/dove multiplatform support
Quoted 11 lines · Arnd Bergmann
Quoted 9 lines · On Monday 02 March 2015 22:30:58 Andrew Lunn wrote:
Quoted 1 line · Arnd Bergmann
Hi everyone,
Hi Arnd
Dove already is multi-platform, when you use it in mach-mvebu. The old mach-dove is there to slowly bit rot, because there is one user who has a lot of out of tree patches which are apparently not easy to make work with DT mach-mvebu Dove code.
Quoted 5 lines
I understand that, but I really want to finalize this chapter of the multiplatform work, it's been going for too long. It's not the only platform that has ATAG-based board files remaining, and I don't see how keeping it the remaining dove board files out of multiplatform is going to speed up their removal.
I believe all the boards are already converted. The _boards_ can be removed from mach-dove, as the one I care about is not in mainline, but that one I care about depends on the core mach-dove support.
As I've said in the past, if this gets ripped out, you will only give me even _more_ patches to deal with, you will only increase my workload still further. I wonder whether you really intend to increase my workload doing stuff which isn't productive for the kernel community. That seems to be rather idiotic.
Once I've got to the bottom of why the DT stuff sucks, then maybe I can switch to DT. However, even when I'm boot testing DT mode, I need much of mach-dove right now (since I still need platform support code to fix a few bits, eg, support dynamic switching between GPU drivers to facilitate testing.)
Let me put this a different way: if this support is removed, I'll end up spending this kernel cycle ignoring bug reports etc, and I'll instead spend my time resurecting this support in my own tree so that I can continue to support and test the Armada DRM driver.
And remember, when you commit a change to delete files, the files get deleted in all git trees derived from the mainline kernel, including *mine* and which has to be patched back together via reverts and the probable other fixes.
Since my Dove is the most useful and fully featured ARM platform I've ever had, screwing me in this way will _really_ piss me off.
Signature · 2 lines
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