Fix Powertop support for Intel Braswell SOC
David E. Box
PATCH 1/1 Fix Powertop support for Intel Braswell SOC
Correct Braswell MSR used to determine PC6 residency.
Signed-off-by David E. Box <david.e.box(a)linux.intel.com>
--- src/cpu/intel_cpus.cpp | 21 +++++++++++++++++++-- src/cpu/intel_cpus.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-)
src/cpu/intel_cpus.cpp +19 -2
@@ -289,6 +289,7 @@ nhm_package::nhm_package(int model) has_c8c9c10_res = 0; has_c2c6_res = 0; has_c7_res = 0; + has_c6c_res = 0; switch(model) { case 0x2A: /* SNB */
@@ -314,6 +315,9 @@ nhm_package::nhm_package(int model) else has_c7_res = 0; } + /* BSW only exposes package C6 */ + else if (model == 0x4C) + has_c6c_res=1; else has_c3_res = 1;
@@ -360,7 +364,15 @@ void nhm_package::measurement_start(void) if (this->has_c3_res) c3_before = get_msr(number, MSR_PKG_C3_RESIDENCY); - c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY); + + /* + * Hack for Braswell where C7 MSR is actually BSW C6 + */ + if (this->has_c6c_res) + c6_before = get_msr(number, MSR_PKG_C7_RESIDENCY); + else + c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY); + if (this->has_c7_res) c7_before = get_msr(number, MSR_PKG_C7_RESIDENCY); if (this->has_c8c9c10_res) {
@@ -401,7 +413,12 @@ void nhm_package::measurement_end(void) if (this->has_c3_res) c3_after = get_msr(number, MSR_PKG_C3_RESIDENCY); - c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY); + + if (this->has_c6c_res) + c6_after = get_msr(number, MSR_PKG_C7_RESIDENCY); + else + c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY); + if (this->has_c7_res) c7_after = get_msr(number, MSR_PKG_C7_RESIDENCY); if (has_c8c9c10_res) {
src/cpu/intel_cpus.h +1 -0
@@ -77,6 +77,7 @@ public:int has_c7_res;int has_c2c6_res;int has_c3_res; +int has_c6c_res;/* BSW */ int has_c8c9c10_res; nhm_package(int model); virtual void measurement_start(void);
Signature · 1 line
1.9.1
Joe Konno
Tested-by on v1 1/1One minor nit. Otherwise,
Tested-by Joe Konno <joe.konno(a)intel.com>
Quoted 21 lines · David E. Box
Correct Braswell MSR used to determine PC6 residency.
Signed-off-by David E. Box <david.e.box(a)linux.intel.com>--- src/cpu/intel_cpus.cpp | 21 +++++++++++++++++++-- src/cpu/intel_cpus.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-)src/cpu/intel_cpus.cpp +1
-0@@ -289,6 +289,7 @@ nhm_package::nhm_package(int model) has_c8c9c10_res = 0; has_c2c6_res = 0; has_c7_res = 0; + has_c6c_res = 0; switch(model) { case 0x2A: /* SNB */
src/cpu/intel_cpus.cpp nhm_package::nhm_package(int model) · line 320
Quoted 6 lines
src/cpu/intel_cpus.cpp +3
-0@@ -314,6 +315,9 @@ nhm_package::nhm_package(int model) else has_c7_res = 0; } + /* BSW only exposes package C6 */ + else if (model == 0x4C) + has_c6c_res=1;
Nit: whitespace around '=' inconsistent with surrounding code.
Quoted 47 lines
src/cpu/intel_cpus.cpp +15
-2else has_c3_res = 1;@@ -360,7 +364,15 @@ void nhm_package::measurement_start(void) if (this->has_c3_res) c3_before = get_msr(number, MSR_PKG_C3_RESIDENCY); - c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY); + + /* + * Hack for Braswell where C7 MSR is actually BSW C6 + */ + if (this->has_c6c_res) + c6_before = get_msr(number, MSR_PKG_C7_RESIDENCY); + else + c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY); + if (this->has_c7_res) c7_before = get_msr(number, MSR_PKG_C7_RESIDENCY); if (this->has_c8c9c10_res) {@@ -401,7 +413,12 @@ void nhm_package::measurement_end(void) if (this->has_c3_res) c3_after = get_msr(number, MSR_PKG_C3_RESIDENCY); - c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY); + + if (this->has_c6c_res) + c6_after = get_msr(number, MSR_PKG_C7_RESIDENCY); + else + c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY); + if (this->has_c7_res) c7_after = get_msr(number, MSR_PKG_C7_RESIDENCY); if (has_c8c9c10_res) {src/cpu/intel_cpus.h +1
-0@@ -77,6 +77,7 @@ public:int has_c7_res;int has_c2c6_res;int has_c3_res; +int has_c6c_res;/* BSW */ int has_c8c9c10_res; nhm_package(int model); virtual void measurement_start(void);
David E. Box
PATCH v2 1/1 Fix Powertop support for Intel Braswell SOC
Correct Braswell MSR used to determine PC6 residency.
Signed-off-by David E. Box <david.e.box(a)linux.intel.com>
---
V2: Add missing whitespace between '=' in assignment statement
src/cpu/intel_cpus.cpp | 21 +++++++++++++++++++-- src/cpu/intel_cpus.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-)
src/cpu/intel_cpus.cpp +19 -2
@@ -289,6 +289,7 @@ nhm_package::nhm_package(int model) has_c8c9c10_res = 0; has_c2c6_res = 0; has_c7_res = 0; + has_c6c_res = 0; switch(model) { case 0x2A: /* SNB */
@@ -314,6 +315,9 @@ nhm_package::nhm_package(int model) else has_c7_res = 0; } + /* BSW only exposes package C6 */ + else if (model == 0x4C) + has_c6c_res = 1; else has_c3_res = 1;
@@ -360,7 +364,15 @@ void nhm_package::measurement_start(void) if (this->has_c3_res) c3_before = get_msr(number, MSR_PKG_C3_RESIDENCY); - c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY); + + /* + * Hack for Braswell where C7 MSR is actually BSW C6 + */ + if (this->has_c6c_res) + c6_before = get_msr(number, MSR_PKG_C7_RESIDENCY); + else + c6_before = get_msr(number, MSR_PKG_C6_RESIDENCY); + if (this->has_c7_res) c7_before = get_msr(number, MSR_PKG_C7_RESIDENCY); if (this->has_c8c9c10_res) {
@@ -401,7 +413,12 @@ void nhm_package::measurement_end(void) if (this->has_c3_res) c3_after = get_msr(number, MSR_PKG_C3_RESIDENCY); - c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY); + + if (this->has_c6c_res) + c6_after = get_msr(number, MSR_PKG_C7_RESIDENCY); + else + c6_after = get_msr(number, MSR_PKG_C6_RESIDENCY); + if (this->has_c7_res) c7_after = get_msr(number, MSR_PKG_C7_RESIDENCY); if (has_c8c9c10_res) {
src/cpu/intel_cpus.h +1 -0
@@ -77,6 +77,7 @@ public:int has_c7_res;int has_c2c6_res;int has_c3_res; +int has_c6c_res;/* BSW */ int has_c8c9c10_res; nhm_package(int model); virtual void measurement_start(void);
Signature · 1 line
1.9.1