Extend LPC32xx functionality and add LPC32xx-based work_92015 board

This series extends functionality for the LPC32xx platform and introduces the WORK Microwave work_92105 board which makes use of the extended functionality.

NOTES:

A - I2C driver remains non-DM

During v2 review, it was suggested to move to DM for I2C. However, this caused issues with the 'date', 'dtt' and 'eeprom' commands which are configured in this board. Therefore the I2C move to DM was not done.

B - Some checkpatch diagnostics are not fixed

The following warnings checkpatch warnings and checks were not fixed:

1. "warning: arch/arm/Kconfig,135: please write a paragraph that describes the config symbol fully"
Other symbols in the same file have no description either. For consistency, I did not add the requested description.

1. "check: include/configs/work_92105.h,187: spaces required around that ':' (ctx:VxV)
(5 occurrences on the same line)
This is due to the value of CONFIG_ETHADDR not being in quotes. As it never is in any other definition of CONFIG_ETHADDR, I left it unchanged.

Changes in v5:
- switch to CONFIG_SYS_NAND_SELF_INIT
- switched board NAND config to CONFIG_SYS_NAND_SELF_INIT

Changes in v4:
- remove two debugging statements
- add __iomem to regs struct
- remove useless 'else return;'
- take BB marker out of free OOB area
- replace magic numbers in OOB reads/writes
- add timeouts in NAND loops
- use DIV_ROUND_UP where applicable
- fix erroneous comment
- skip bad blocks in SPL chainload loop

Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private struct
- discourage readers from using functions implementation as an example
- move regs and functions in private struct
- remove script/Makefile.spl change
- use writel() in DRAM initialization code
- remove useless conditionals in dram.c
- fix and complete the board README
- remove redundant CONFIG_CMD_DM from config header file
- add a note re the hard-coded MAC address
- add 'single flashable file' make target

Changes in v2:
- move from legacy to Driver Model support
- added MUX setting for SSP0
- cosmetic: added a blank line before copyright
- move boot image generation to mkimage framework

Albert ARIBAUD (3ADEV) (8):
lpc32xx: add Ethernet support
lpc32xx: mtd: nand: add MLC NAND controller
lpc32xx: i2c: add LPC32xx I2C interface support
lpc32xx: add GPIO support
lpc32xx: add LPC32xx SSP support (SPI mode)
dtt: add ds620 support
lpc32xx: add lpc32xx-spl.bin boot image target
lpc32xx: add support for board work_92105

 Makefile                                           |  20 +
 arch/arm/Kconfig                                   |   6 +
 arch/arm/cpu/arm926ejs/lpc32xx/Makefile            |   2 +
 arch/arm/cpu/arm926ejs/lpc32xx/clk.c               |  34 ++
 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c               |  13 +
 arch/arm/cpu/arm926ejs/lpc32xx/devices.c           |  43 ++
 arch/arm/cpu/arm926ejs/lpc32xx/dram.c              |  79 +++
 arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S     |  45 ++
 arch/arm/include/asm/arch-lpc32xx/clk.h            |  16 +
 arch/arm/include/asm/arch-lpc32xx/config.h         |   3 +
 arch/arm/include/asm/arch-lpc32xx/cpu.h            |   3 +
 arch/arm/include/asm/arch-lpc32xx/gpio.h           |  43 ++
 arch/arm/include/asm/arch-lpc32xx/mux.h            |  18 +
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h      |   8 +-
 board/work-microwave/work_92105/Kconfig            |  15 +
 board/work-microwave/work_92105/MAINTAINERS        |   6 +
 board/work-microwave/work_92105/Makefile           |  10 +
 board/work-microwave/work_92105/README             |  91 +++
 board/work-microwave/work_92105/work_92105.c       |  62 ++
 .../work-microwave/work_92105/work_92105_display.c | 349 +++++++++++
 .../work-microwave/work_92105/work_92105_display.h |  14 +
 board/work-microwave/work_92105/work_92105_spl.c   |  33 +
 common/image.c                                     |   1 +
 configs/work_92105_defconfig                       |   5 +
 drivers/gpio/Kconfig                               |   7 +
 drivers/gpio/Makefile                              |   1 +
 drivers/gpio/lpc32xx_gpio.c                        | 293 +++++++++
 drivers/hwmon/Makefile                             |   1 +
 drivers/hwmon/ds620.c                              |  65 ++
 drivers/i2c/Makefile                               |   1 +
 drivers/i2c/lpc32xx_i2c.c                          | 249 ++++++++
 drivers/mtd/nand/Makefile                          |   1 +
 drivers/mtd/nand/lpc32xx_nand_mlc.c                | 674 +++++++++++++++++++++
 drivers/net/Makefile                               |   1 +
 drivers/net/lpc32xx_eth.c                          | 636 +++++++++++++++++++
 drivers/spi/Makefile                               |   1 +
 drivers/spi/lpc32xx_ssp.c                          | 144 +++++
 include/configs/work_92105.h                       | 268 ++++++++
 include/dtt.h                                      |  15 +-
 include/image.h                                    |   1 +
 include/netdev.h                                   |   1 +
 tools/Makefile                                     |   1 +
 tools/lpc32xximage.c                               | 178 ++++++
 43 files changed, 3449 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/dram.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/gpio.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/mux.h
 create mode 100644 board/work-microwave/work_92105/Kconfig
 create mode 100644 board/work-microwave/work_92105/MAINTAINERS
 create mode 100644 board/work-microwave/work_92105/Makefile
 create mode 100644 board/work-microwave/work_92105/README
 create mode 100644 board/work-microwave/work_92105/work_92105.c
 create mode 100644 board/work-microwave/work_92105/work_92105_display.c
 create mode 100644 board/work-microwave/work_92105/work_92105_display.h
 create mode 100644 board/work-microwave/work_92105/work_92105_spl.c
 create mode 100644 configs/work_92105_defconfig
 create mode 100644 drivers/gpio/lpc32xx_gpio.c
 create mode 100644 drivers/hwmon/ds620.c
 create mode 100644 drivers/i2c/lpc32xx_i2c.c
 create mode 100644 drivers/mtd/nand/lpc32xx_nand_mlc.c
 create mode 100644 drivers/net/lpc32xx_eth.c
 create mode 100644 drivers/spi/lpc32xx_ssp.c
 create mode 100644 include/configs/work_92105.h
 create mode 100644 tools/lpc32xximage.c

2.1.0

---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c          |   9 +
 arch/arm/cpu/arm926ejs/lpc32xx/devices.c      |   7 +
 arch/arm/include/asm/arch-lpc32xx/config.h    |   3 +
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h |   1 +
 drivers/net/Makefile                          |   1 +
 drivers/net/lpc32xx_eth.c                     | 636 ++++++++++++++++++++++++++
 include/netdev.h                              |   1 +
 7 files changed, 658 insertions(+)
 create mode 100644 drivers/net/lpc32xx_eth.c

index 35095a9..eec4d9e 100644
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/wdt.h>

@@ -55,3 +56,11 @@ int print_cpuinfo(void)
 	return 0;
 }
 #endif
+
+#ifdef CONFIG_LPC32XX_ETH
+int cpu_eth_init(bd_t *bis)
+{
+	lpc32xx_eth_initialize(bis);
+	return 0;
+}
+#endif

index b567657..062db8d 100644
@@ -37,3 +37,10 @@ void lpc32xx_uart_init(unsigned int uart_id)
 	writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
 	       &clk->u3clk + (uart_id - 3));
 }
+
+void lpc32xx_mac_init(void)
+{
+	/* Enable MAC interface */
+	writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
+		| CLK_MAC_MII, &clk->macclk_ctrl);
+}

index 564441c..d57bc48 100644
@@ -52,6 +52,9 @@
 #define CONFIG_SYS_BAUDRATE_TABLE	\
 		{ 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
 
+/* Ethernet */
+#define LPC32XX_ETH_BASE ETHERNET_BASE
+
 /* NOR Flash */
 #if defined(CONFIG_SYS_FLASH_CFI)
 #define CONFIG_FLASH_CFI_DRIVER

index 28812be..a6b8826 100644
@@ -8,5 +8,6 @@
 #define _LPC32XX_SYS_PROTO_H
 
 void lpc32xx_uart_init(unsigned int uart_id);
+void lpc32xx_mac_init(void);
 
 #endif /* _LPC32XX_SYS_PROTO_H */

index b8b0803..af8941f 100644
@@ -35,6 +35,7 @@ obj-$(CONFIG_GRETH) += greth.o
 obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o
 obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o
 obj-$(CONFIG_LAN91C96) += lan91c96.o
+obj-$(CONFIG_LPC32XX_ETH) += lpc32xx_eth.o
 obj-$(CONFIG_MACB) += macb.o
 obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
 obj-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o

index 90140bd..453c940 100644
@@ -57,6 +57,7 @@ int greth_initialize(bd_t *bis);
 void gt6426x_eth_initialize(bd_t *bis);
 int ks8851_mll_initialize(u8 dev_num, int base_addr);
 int lan91c96_initialize(u8 dev_num, int base_addr);
+int lpc32xx_eth_initialize(bd_t *bis);
 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
 int mcdmafec_initialize(bd_t *bis);
 int mcffec_initialize(bd_t *bis);

2.1.0

The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.

The SPL framework is supported.

---

Changes in v5:
- switch to CONFIG_SYS_NAND_SELF_INIT

Changes in v4:
- remove two debugging statements
- add __iomem to regs struct
- remove useless 'else return;'
- take BB marker out of free OOB area
- replace magic numbers in OOB reads/writes
- add timeouts in NAND loops
- use DIV_ROUND_UP where applicable
- fix erroneous comment
- skip bad blocks in SPL chainload loop

Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm926ejs/lpc32xx/devices.c      |   6 +
 arch/arm/include/asm/arch-lpc32xx/clk.h       |   4 +
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h |   1 +
 drivers/mtd/nand/Makefile                     |   1 +
 drivers/mtd/nand/lpc32xx_nand_mlc.c           | 674 ++++++++++++++++++++++++++
 5 files changed, 686 insertions(+)
 create mode 100644 drivers/mtd/nand/lpc32xx_nand_mlc.c

index 062db8d..be4c93d 100644
@@ -44,3 +44,9 @@ void lpc32xx_mac_init(void)
 	writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
 		| CLK_MAC_MII, &clk->macclk_ctrl);
 }
+
+void lpc32xx_mlc_nand_init(void)
+{
+	/* Enable NAND interface */
+	writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, &clk->flashclk_ctrl);
+}

index 92f6c15..bc7d33d 100644
@@ -147,6 +147,10 @@ struct clk_pm_regs {
 /* DMA Clock Control Register bits */
 #define CLK_DMA_ENABLE			(1 << 0)
 
+/* NAND Clock Control Register bits */
+#define CLK_NAND_MLC			(1 << 1)
+#define CLK_NAND_MLC_INT		(1 << 5)
+
 unsigned int get_sys_clk_rate(void);
 unsigned int get_hclk_pll_rate(void);
 unsigned int get_hclk_clk_div(void);

index a6b8826..0c4e712 100644
@@ -9,5 +9,6 @@
 
 void lpc32xx_uart_init(unsigned int uart_id);
 void lpc32xx_mac_init(void);
+void lpc32xx_mlc_nand_init(void);
 
 #endif /* _LPC32XX_SYS_PROTO_H */

index 1f02bfc..347ea62 100644
@@ -52,6 +52,7 @@ obj-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
 obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
 obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
 obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
+obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
 obj-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
 obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand.o

2.1.0

---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm926ejs/lpc32xx/devices.c      |  11 ++
 arch/arm/include/asm/arch-lpc32xx/clk.h       |   4 +
 arch/arm/include/asm/arch-lpc32xx/cpu.h       |   2 +
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h |   1 +
 drivers/i2c/Makefile                          |   1 +
 drivers/i2c/lpc32xx_i2c.c                     | 249 ++++++++++++++++++++++++++
 6 files changed, 268 insertions(+)
 create mode 100644 drivers/i2c/lpc32xx_i2c.c

index be4c93d..81b53ea 100644
@@ -50,3 +50,14 @@ void lpc32xx_mlc_nand_init(void)
 	/* Enable NAND interface */
 	writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, &clk->flashclk_ctrl);
 }
+
+void lpc32xx_i2c_init(unsigned int devnum)
+{
+	/* Enable I2C interface */
+	uint32_t ctrl = readl(&clk->i2cclk_ctrl);
+	if (devnum == 1)
+		ctrl |= CLK_I2C1_ENABLE;
+	if (devnum == 2)
+		ctrl |= CLK_I2C2_ENABLE;
+	writel(ctrl, &clk->i2cclk_ctrl);
+}

index bc7d33d..781ac07 100644
@@ -123,6 +123,10 @@ struct clk_pm_regs {
 #define CLK_MAC_SLAVE			(1 << 1)
 #define CLK_MAC_REG			(1 << 0)
 
+/* I2C Clock Control Register bits	*/
+#define CLK_I2C2_ENABLE			(1 << 1)
+#define CLK_I2C1_ENABLE			(1 << 0)
+
 /* Timer Clock Control1 Register bits */
 #define CLK_TIMCLK_MOTOR		(1 << 6)
 #define CLK_TIMCLK_TIMER3		(1 << 5)

index 199b4a0..1067107 100644
@@ -37,6 +37,8 @@
 #define UART4_BASE	0x40088000	/* UART 4 registers base            */
 #define UART5_BASE	0x40090000	/* UART 5 registers base            */
 #define UART6_BASE	0x40098000	/* UART 6 registers base            */
+#define I2C1_BASE	0x400A0000	/* I2C  1 registers base            */
+#define I2C2_BASE	0x400A8000	/* I2C  2 registers base            */
 
 /* External SDRAM Memory Bank base addresses */
 #define EMC_DYCS0_BASE	0x80000000	/* SDRAM DYCS0 base address         */

index 0c4e712..a4a05d1 100644
@@ -10,5 +10,6 @@
 void lpc32xx_uart_init(unsigned int uart_id);
 void lpc32xx_mac_init(void);
 void lpc32xx_mlc_nand_init(void);
+void lpc32xx_i2c_init(unsigned int devnum);
 
 #endif /* _LPC32XX_SYS_PROTO_H */

index 774bc94..26ea854 100644
@@ -20,6 +20,7 @@ obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
 obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
 obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o
 obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
+obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
 obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
 obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
 obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o

2.1.0

This driver only supports Driver Model, not legacy model.

---

Changes in v5: None
Changes in v4: None
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private struct
- discourage readers from using functions implementation as an example

Changes in v2:
- move from legacy to Driver Model support

 arch/arm/cpu/arm926ejs/lpc32xx/devices.c |   5 +
 arch/arm/include/asm/arch-lpc32xx/gpio.h |  43 +++++
 drivers/gpio/Kconfig                     |   7 +
 drivers/gpio/Makefile                    |   1 +
 drivers/gpio/lpc32xx_gpio.c              | 293 +++++++++++++++++++++++++++++++
 5 files changed, 349 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/gpio.h
 create mode 100644 drivers/gpio/lpc32xx_gpio.c

index 81b53ea..a407098 100644
@@ -9,6 +9,7 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/uart.h>
 #include <asm/io.h>
+#include <dm.h>
 
 static struct clk_pm_regs    *clk  = (struct clk_pm_regs *)CLK_PM_BASE;
 static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;

@@ -61,3 +62,7 @@ void lpc32xx_i2c_init(unsigned int devnum)
 		ctrl |= CLK_I2C2_ENABLE;
 	writel(ctrl, &clk->i2cclk_ctrl);
 }
+
+U_BOOT_DEVICE(lpc32xx_gpios) = {
+	.name = "gpio_lpc32xx"
+};

index b609e73..7b5178a 100644
@@ -7,3 +7,10 @@ config DM_GPIO
 	  the GPIO uclass. Drivers provide methods to query the
 	  particular GPIOs that they provide. The uclass interface
 	  is defined in include/asm-generic/gpio.h.
+
+config LPC32XX_GPIO
+	bool "LPC32XX GPIO driver"
+	depends on DM
+	default n
+	help
+	  Support for the LPC32XX GPIO driver.

index fe9a3b2..85f71c5 100644
@@ -41,3 +41,4 @@ obj-$(CONFIG_ADI_GPIO2)	+= adi_gpio2.o
 obj-$(CONFIG_TCA642X)		+= tca642x.o
 oby-$(CONFIG_SX151X)		+= sx151x.o
 obj-$(CONFIG_SUNXI_GPIO)	+= sunxi_gpio.o
+obj-$(CONFIG_LPC32XX_GPIO)	+= lpc32xx_gpio.o

2.1.0

---

Changes in v5: None
Changes in v4: None
Changes in v3:
- move regs and functions in private struct

Changes in v2:
- added MUX setting for SSP0

 arch/arm/cpu/arm926ejs/lpc32xx/devices.c      |  14 +++
 arch/arm/include/asm/arch-lpc32xx/clk.h       |   3 +
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h |   1 +
 drivers/spi/Makefile                          |   1 +
 drivers/spi/lpc32xx_ssp.c                     | 144 ++++++++++++++++++++++++++
 5 files changed, 163 insertions(+)
 create mode 100644 drivers/spi/lpc32xx_ssp.c

index a407098..5a453e3 100644
@@ -8,11 +8,13 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/uart.h>
+#include <asm/arch/mux.h>
 #include <asm/io.h>
 #include <dm.h>
 
 static struct clk_pm_regs    *clk  = (struct clk_pm_regs *)CLK_PM_BASE;
 static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
+static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;
 
 void lpc32xx_uart_init(unsigned int uart_id)
 {

@@ -66,3 +68,15 @@ void lpc32xx_i2c_init(unsigned int devnum)
 U_BOOT_DEVICE(lpc32xx_gpios) = {
 	.name = "gpio_lpc32xx"
 };
+
+/* Mux for SCK0, MISO0, MOSI0. We do not use SSEL0. */
+
+#define P_MUX_SET_SSP0 0x1600
+
+void lpc32xx_ssp_init(void)
+{
+	/* Enable SSP0 interface */
+	writel(CLK_SSP0_ENABLE_CLOCK, &clk->ssp_ctrl);
+	/* Mux SSP0 pins */
+	writel(P_MUX_SET_SSP0, &mux->p_mux_set);
+}

index 781ac07..2cb5703 100644
@@ -155,6 +155,9 @@ struct clk_pm_regs {
 #define CLK_NAND_MLC			(1 << 1)
 #define CLK_NAND_MLC_INT		(1 << 5)
 
+/* SSP Clock Control Register bits */
+#define CLK_SSP0_ENABLE_CLOCK		(1 << 0)
+
 unsigned int get_sys_clk_rate(void);
 unsigned int get_hclk_pll_rate(void);
 unsigned int get_hclk_clk_div(void);

index a4a05d1..86d5ee9 100644
@@ -11,5 +11,6 @@ void lpc32xx_uart_init(unsigned int uart_id);
 void lpc32xx_mac_init(void);
 void lpc32xx_mlc_nand_init(void);
 void lpc32xx_i2c_init(unsigned int devnum);
+void lpc32xx_ssp_init(void);
 
 #endif /* _LPC32XX_SYS_PROTO_H */

index edbd520..ce6f1cc 100644
@@ -32,6 +32,7 @@ obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
 obj-$(CONFIG_FTSSP010_SPI) += ftssp010_spi.o
 obj-$(CONFIG_ICH_SPI) +=  ich.o
 obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
+obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
 obj-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
 obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
 obj-$(CONFIG_MXC_SPI) += mxc_spi.o

2.1.0

---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright

 drivers/hwmon/Makefile |  1 +
 drivers/hwmon/ds620.c  | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++
 include/dtt.h          | 15 ++++++------
 3 files changed, 74 insertions(+), 7 deletions(-)
 create mode 100644 drivers/hwmon/ds620.c

index 25b8e8a..b4fb057 100644
@@ -15,6 +15,7 @@ obj-$(CONFIG_DTT_ADT7460) += adt7460.o
 obj-$(CONFIG_DTT_DS1621) += ds1621.o
 obj-$(CONFIG_DTT_DS1722) += ds1722.o
 obj-$(CONFIG_DTT_DS1775) += ds1775.o
+obj-$(CONFIG_DTT_DS620) += ds620.o
 obj-$(CONFIG_DTT_LM63) += lm63.o
 obj-$(CONFIG_DTT_LM73) += lm73.o
 obj-$(CONFIG_DTT_LM75) += lm75.o

index 058bca4..173159d 100644
@@ -12,13 +12,14 @@
 #define _DTT_H_
 
 #if defined(CONFIG_DTT_ADM1021)	|| \
-    defined(CONFIG_DTT_ADT7460)	|| \
-    defined(CONFIG_DTT_DS1621)	|| \
-    defined(CONFIG_DTT_DS1775)	|| \
-    defined(CONFIG_DTT_LM63)	|| \
-    defined(CONFIG_DTT_LM73)	|| \
-    defined(CONFIG_DTT_LM75)	|| \
-    defined(CONFIG_DTT_LM81)
+	defined(CONFIG_DTT_ADT7460)	|| \
+	defined(CONFIG_DTT_DS1621)	|| \
+	defined(CONFIG_DTT_DS1775)	|| \
+	defined(CONFIG_DTT_DS620)	|| \
+	defined(CONFIG_DTT_LM63)	|| \
+	defined(CONFIG_DTT_LM73)	|| \
+	defined(CONFIG_DTT_LM75)	|| \
+	defined(CONFIG_DTT_LM81)
 
 #define CONFIG_DTT				/* We have a DTT */
 

2.1.0

---

Changes in v5: None
Changes in v4: None
Changes in v3:
- remove script/Makefile.spl change

Changes in v2:
- move boot image generation to mkimage framework

 common/image.c       |   1 +
 include/image.h      |   1 +
 tools/Makefile       |   1 +
 tools/lpc32xximage.c | 178 +++++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 181 insertions(+)
 create mode 100644 tools/lpc32xximage.c

index a911aa9..162b682 100644
@@ -149,6 +149,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_MXSIMAGE,   "mxsimage",   "Freescale MXS Boot Image",},
 	{	IH_TYPE_ATMELIMAGE, "atmelimage", "ATMEL ROM-Boot Image",},
 	{	IH_TYPE_X86_SETUP,  "x86_setup",  "x86 setup.bin",    },
+	{	IH_TYPE_LPC32XXIMAGE, "lpc32xximage",  "LPC32XX Boot Image", },
 	{	-1,		    "",		  "",			},
 };
 

index 0e6af00..3844be6 100644
@@ -242,6 +242,7 @@ struct lmb;
 #define IH_TYPE_ATMELIMAGE	18	/* ATMEL ROM bootable Image	*/
 #define IH_TYPE_SOCFPGAIMAGE	19	/* Altera SOCFPGA Preloader	*/
 #define IH_TYPE_X86_SETUP	20	/* x86 setup.bin Image		*/
+#define IH_TYPE_LPC32XXIMAGE	21	/* x86 setup.bin Image		*/
 
 /*
  * Compression Types

index 88770b0..4bbb153 100644
@@ -83,6 +83,7 @@ dumpimage-mkimage-objs := aisimage.o \
 			imximage.o \
 			kwbimage.o \
 			lib/md5.o \
+			lpc32xximage.o \
 			mxsimage.o \
 			omapimage.o \
 			os_support.o \

2.1.0

Work_92105 from Work Microwave is an LPC3250-
based board with the following features:
- 64MB SDR DRAM
- 1 GB SLC NAND, managed through MLC controller.
- Ethernet
- Ethernet + PHY SMSC8710
- I2C:
- EEPROM (24M01-compatible)
- RTC (DS1374-compatible)
- Temperature sensor (DS620)
- DACs (2 x MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs

This board has SPL support, and uses the LPC32XX boot image format.

---

Changes in v5:
- switched board NAND config to CONFIG_SYS_NAND_SELF_INIT

Changes in v4: None
Changes in v3:
- use writel() in DRAM initialization code
- remove useless conditionals in dram.c
- fix and complete the board README
- remove redundant CONFIG_CMD_DM from config header file
- add a note re the hard-coded MAC address
- add 'single flashable file' make target

Changes in v2: None

 Makefile                                           |  20 ++
 arch/arm/Kconfig                                   |   6 +
 arch/arm/cpu/arm926ejs/lpc32xx/Makefile            |   2 +
 arch/arm/cpu/arm926ejs/lpc32xx/clk.c               |  34 ++
 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c               |   4 +
 arch/arm/cpu/arm926ejs/lpc32xx/dram.c              |  79 +++++
 arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S     |  45 +++
 arch/arm/include/asm/arch-lpc32xx/clk.h            |   5 +
 arch/arm/include/asm/arch-lpc32xx/cpu.h            |   1 +
 arch/arm/include/asm/arch-lpc32xx/mux.h            |  18 ++
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h      |   4 +-
 board/work-microwave/work_92105/Kconfig            |  15 +
 board/work-microwave/work_92105/MAINTAINERS        |   6 +
 board/work-microwave/work_92105/Makefile           |  10 +
 board/work-microwave/work_92105/README             |  91 ++++++
 board/work-microwave/work_92105/work_92105.c       |  62 ++++
 .../work-microwave/work_92105/work_92105_display.c | 349 +++++++++++++++++++++
 .../work-microwave/work_92105/work_92105_display.h |  14 +
 board/work-microwave/work_92105/work_92105_spl.c   |  33 ++
 configs/work_92105_defconfig                       |   5 +
 include/configs/work_92105.h                       | 268 ++++++++++++++++
 21 files changed, 1070 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/dram.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/mux.h
 create mode 100644 board/work-microwave/work_92105/Kconfig
 create mode 100644 board/work-microwave/work_92105/MAINTAINERS
 create mode 100644 board/work-microwave/work_92105/Makefile
 create mode 100644 board/work-microwave/work_92105/README
 create mode 100644 board/work-microwave/work_92105/work_92105.c
 create mode 100644 board/work-microwave/work_92105/work_92105_display.c
 create mode 100644 board/work-microwave/work_92105/work_92105_display.h
 create mode 100644 board/work-microwave/work_92105/work_92105_spl.c
 create mode 100644 configs/work_92105_defconfig
 create mode 100644 include/configs/work_92105.h

index 9747bd2..6013712 100644
@@ -896,6 +896,26 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
 u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE
 	$(call if_changed,pad_cat)
 
+MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE)
+
+lpc32xx-spl.img: spl/u-boot-spl.bin FORCE
+	$(call if_changed,mkimage)
+
+OBJCOPYFLAGS_lpc32xx-boot-0.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)
+
+lpc32xx-boot-0.bin: lpc32xx-spl.img
+	$(call if_changed,objcopy)
+
+OBJCOPYFLAGS_lpc32xx-boot-1.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)
+
+lpc32xx-boot-1.bin: lpc32xx-spl.img
+	$(call if_changed,objcopy)
+
+lpc32xx-full.bin: lpc32xx-boot-0.bin lpc32xx-boot-1.bin u-boot.img
+	$(call if_changed,cat)
+
+CLEAN_FILES += lpc32xx-*
+
 OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \
 				   --pad-to=$(CONFIG_TPL_PAD_TO)
 tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE

index b9ebee1..10d9280 100644
@@ -132,6 +132,11 @@ config TARGET_DEVKIT3250
 	bool "Support devkit3250"
 	select CPU_ARM926EJS
 
+config TARGET_WORK_92105
+	bool "Support work_92105"
+	select CPU_ARM926EJS
+	select SUPPORT_SPL
+
 config TARGET_MX25PDK
 	bool "Support mx25pdk"
 	select CPU_ARM926EJS

@@ -871,6 +876,7 @@ source "board/vpac270/Kconfig"
 source "board/wandboard/Kconfig"
 source "board/warp/Kconfig"
 source "board/woodburn/Kconfig"
+source "board/work-microwave/work_92105/Kconfig"
 source "board/xaeniax/Kconfig"
 source "board/xilinx/zynqmp/Kconfig"
 source "board/zipitz2/Kconfig"

index 314f004..4837377 100644
@@ -6,3 +6,5 @@
 #
 
 obj-y   = cpu.o clk.o devices.o timer.o
+
+obj-$(CONFIG_SPL_BUILD) += dram.o lowlevel_init.o

index b7a44d5..1ef8a36 100644
@@ -98,6 +98,40 @@ unsigned int get_periph_clk_rate(void)
 	return get_hclk_pll_rate() / get_periph_clk_div();
 }
 
+unsigned int get_sdram_clk_rate(void)
+{
+	unsigned int src_clk;
+
+	if (!(readl(&clk->pwr_ctrl) & CLK_PWR_NORMAL_RUN))
+		return get_sys_clk_rate();
+
+	src_clk = get_hclk_pll_rate();
+
+	if (readl(&clk->sdramclk_ctrl) & CLK_SDRAM_DDR_SEL) {
+		/* using DDR */
+		switch (readl(&clk->hclkdiv_ctrl) & CLK_HCLK_DDRAM_MASK) {
+		case CLK_HCLK_DDRAM_HALF:
+			return src_clk/2;
+		case CLK_HCLK_DDRAM_NOMINAL:
+			return src_clk;
+		default:
+			return 0;
+		}
+	} else {
+		/* using SDR */
+		switch (readl(&clk->hclkdiv_ctrl) & CLK_HCLK_ARM_PLL_DIV_MASK) {
+		case CLK_HCLK_ARM_PLL_DIV_4:
+			return src_clk/4;
+		case CLK_HCLK_ARM_PLL_DIV_2:
+			return src_clk/2;
+		case CLK_HCLK_ARM_PLL_DIV_1:
+			return src_clk;
+		default:
+			return 0;
+		}
+	}
+}
+
 int get_serial_clock(void)
 {
 	return get_periph_clk_rate();

index eec4d9e..f4d7f02 100644
@@ -9,6 +9,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/wdt.h>
+#include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 
 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;

@@ -33,6 +34,9 @@ void reset_cpu(ulong addr)
 #if defined(CONFIG_ARCH_CPU_INIT)
 int arch_cpu_init(void)
 {
+#if defined(CONFIG_SPL_BUILD)
+	ddr_init();
+#endif
 	/*
 	 * It might be necessary to flush data cache, if U-boot is loaded
 	 * from kickstart bootloader, e.g. from S1L loader

index 2cb5703..9449869 100644
@@ -71,6 +71,7 @@ struct clk_pm_regs {
 };
 
 /* HCLK Divider Control Register bits */
+#define CLK_HCLK_DDRAM_MASK		(0x3 << 7)
 #define CLK_HCLK_DDRAM_HALF		(0x2 << 7)
 #define CLK_HCLK_DDRAM_NOMINAL		(0x1 << 7)
 #define CLK_HCLK_DDRAM_STOPPED		(0x0 << 7)

@@ -158,11 +159,15 @@ struct clk_pm_regs {
 /* SSP Clock Control Register bits */
 #define CLK_SSP0_ENABLE_CLOCK		(1 << 0)
 
+/* SDRAMCLK register bits */
+#define CLK_SDRAM_DDR_SEL		(1 << 1)
+
 unsigned int get_sys_clk_rate(void);
 unsigned int get_hclk_pll_rate(void);
 unsigned int get_hclk_clk_div(void);
 unsigned int get_hclk_clk_rate(void);
 unsigned int get_periph_clk_div(void);
 unsigned int get_periph_clk_rate(void);
+unsigned int get_sdram_clk_rate(void);
 
 #endif /* _LPC32XX_CLK_H */

index 1067107..0b5dca1 100644
@@ -27,6 +27,7 @@
 #define HS_UART7_BASE	0x4001C000	/* High speed UART 7 registers base */
 #define RTC_BASE	0x40024000	/* RTC registers base               */
 #define GPIO_BASE	0x40028000	/* GPIO registers base              */
+#define MUX_BASE	0x40028100	/* MUX registers base               */
 #define WDT_BASE	0x4003C000	/* Watchdog timer registers base    */
 #define TIMER0_BASE	0x40044000	/* Timer0 registers base            */
 #define TIMER1_BASE	0x4004C000	/* Timer1 registers base            */

new file mode 100644
index 0000000..dc1b5bc
@@ -0,0 +1,18 @@
+/*
+ * LPC32xx MUX interface
+ *
+ * (C) Copyright 2015  DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/**
+ * MUX register map for LPC32xx
+ */
+
+struct mux_regs {
+	u32 p_mux_set;
+	u32 p_mux_clr;
+	u32 p_mux_state;
+};

index 86d5ee9..edcc4bc 100644
@@ -12,5 +12,7 @@ void lpc32xx_mac_init(void);
 void lpc32xx_mlc_nand_init(void);
 void lpc32xx_i2c_init(unsigned int devnum);
 void lpc32xx_ssp_init(void);
-
+#if defined(CONFIG_SPL_BUILD)
+void ddr_init(void);
+#endif
 #endif /* _LPC32XX_SYS_PROTO_H */

new file mode 100644
index 0000000..74f004f
@@ -0,0 +1,15 @@
+if TARGET_WORK_92105
+
+config SYS_BOARD
+	default "work_92105"
+
+config SYS_VENDOR
+	default "work-microwave"
+
+config SYS_SOC
+	default "lpc32xx"
+
+config SYS_CONFIG_NAME
+	default "work_92105"
+
+endif

new file mode 100644
index 0000000..29a92c5
@@ -0,0 +1,6 @@
+WORK_92105 BOARD
+M:	Albert ARIBAUD <[email protected]>
+S:	Maintained
+F:	board/work-microwave/work_92105/
+F:	include/configs/work_92105.h
+F:	configs/work_92105_defconfig

new file mode 100644
index 0000000..ba31c8e
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2014  DENX Software Engineering GmbH
+# Written-by: Albert ARIBAUD <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= work_92105.o work_92105_display.o
+
+obj-$(CONFIG_SPL_BUILD) += work_92105_spl.o

new file mode 100644
index 0000000..dd6e768
@@ -0,0 +1,14 @@
+/*
+ * work_92105 display support interface
+ *
+ * (C) Copyright 2014  DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD <[email protected]>
+ *
+ * The work_92105 display is a HD44780-compatible module
+ * controlled through a MAX6957AAX SPI port expander, two
+ * MAX518 I2C DACs and native LPC32xx GPO 15.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+void work_92105_display_init(void);

new file mode 100644
index 0000000..c0d71b4
@@ -0,0 +1,33 @@
+/*
+ * WORK Microwave work_92105 board support
+ *
+ * (C) Copyright 2014  DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/emc.h>
+#include <asm/gpio.h>
+#include <spl.h>
+#include "work_92105_display.h"
+
+void spl_board_init(void)
+{
+	/* initialize serial port for console */
+	lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
+	/* initialize console */
+	preloader_console_init();
+	/* init DDR and NAND to chainload U-Boot */
+	ddr_init();
+	lpc32xx_mlc_nand_init();
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_NAND;
+}

new file mode 100644
index 0000000..9be52a8
@@ -0,0 +1,5 @@
+CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_SPL=y
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_WORK_92105=y

2.1.0

Bonjour Scott,

Le Fri, 13 Mar 2015 16:57:33 -0500, Scott Wood
<[email protected]> a ?crit :

I followed the examples in several drivers where timeouts are by iteration. Note that -- while this does not void your point -- I did not use 10000 but 100000, which at a CPU clock of 208 MHz, and assuming an optimistic one instruction per cycle and two instructions per loop, makes the loop last at least 960 us, well over the 600 us which the NAND takes for any page programming.

Because I modeled read_single_page from another read function, and I preferred to minimize modifications and keep returning as much info as I have, which can help debugging and cannot cause harm as it does not affect the caller indeed.

Will fix this -- is there any helper function in the bad block management code for this? I could not find one, but I'm no NAND expert.

Will fix.

Cordialement,
Albert ARIBAUD
3ADEV

What if this driver ends up being used on hardware that runs significantly faster than 208 MHz? I could understand if it's hugely space-constrained SPL code (like the ones that have to fit in 4K), but otherwise why not make use of the timekeeping code that exists in U-Boot (either by reading the timer, or by putting udelay(1) in the loop body)?

I don't know of any such helper -- outside of SPL it's handled via the BBT. fsl_ifc_spl.c is an example that checks for bad block markers, but it's hardcoded to assume the first two pages of a block which is a bit simpler than checking at the end of the block.

-Scott

Hi Scott,

Le Mon, 16 Mar 2015 16:30:29 -0500, Scott Wood
<[email protected]> a ?crit :

The udelay(1) in the loop is ok with me -- I'll put it in v6.

Thanks -- I'll dig into the BBT code to see how it's handled in my target and put a fix in v6 based on that.

Cordialement,
Albert ARIBAUD
3ADEV

Hi Albert,

Does CONFIG_DM_I2C_COMPAT help with this? If you define that you get the old API.

Otherwise if you can share the (broken) patches I can take a look at how to fix those commands.

Regards,
Simon

Hi Simon,

Le Fri, 13 Mar 2015 18:33:51 -0600, Simon Glass <[email protected]> a ?crit :

Nope, I tried CONFIG_I2C_COMPAT as soon as I hit the errors, and itdid not fix things.

I'll push a branch on Monday for this.

Cordialement,
Albert ARIBAUD
3ADEV

Hi Albert,

That's unfortunate. Perhaps there are some things missing.

Thanks, I'll take a look when I get it.

Regards,
Simon

Hi Simon,

can you please share the git branch so that I can also review it. I am writing for LPC2148 board.

Thanks,
Anish

Hi Anish,

This is Albert's work. Once he shares if I am sure it will be public.

Regards,
Simon

Hello Simon,

Since this is a derivative of the patch series I've posted here, I could hardly see a problem in making it public anyway.

I've pushed the broken series, the one with I2C DM and COMPAT, as branch dm-i2c of repo u-boot-arm. Anyone feel free to fiddle with it.

Amicalement,

Albert.

Hi Albert,

This does not build for me - e.g. lpc32xx_i2c_set_bus_speed() uses a struct i2c_adaptor * when it should use struct udevice *.

Do I have the right version?

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:64:4:
warning: ?struct i2c_adapter? declared inside parameter list [enabled
by default]
unsigned int speed)
^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:64:4:
warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
In file included from /usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:13:0:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:
In function ?lpc32xx_i2c_set_bus_speed?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:76:39:
error: dereferencing pointer to incomplete type

  writel(half_period, &lpc32xx_i2c[adap->hwadapnr]->clk_hi);
                                       ^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/arch/arm/include/asm/io.h:77:55:
note: in definition of macro ?__arch_putl?
 #define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
                                                       ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:76:2:
note: in expansion of macro ?writel?
writel(half_period, &lpc32xx_i2c[adap->hwadapnr]->clk_hi);
^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:77:39:
error: dereferencing pointer to incomplete type

  writel(half_period, &lpc32xx_i2c[adap->hwadapnr]->clk_lo);
                                       ^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/arch/arm/include/asm/io.h:146:48:
note: in expansion of macro ?__arch_putl?
 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
                                                ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:77:2:
note: in expansion of macro ?writel?
writel(half_period, &lpc32xx_i2c[adap->hwadapnr]->clk_lo);
^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:
At top level:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:82:37:
warning: ?struct i2c_adapter? declared inside parameter list [enabled
by default]
static int lpc32xx_i2c_probe(struct i2c_adapter *adap, u8 dev)

                                     ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:
In function ?lpc32xx_i2c_probe?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:84:54:
error: dereferencing pointer to incomplete type

  struct lpc32xx_i2c_registers *i2c = lpc32xx_i2c[adap->hwadapnr];
                                                      ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:
In function ?lpc32xx_i2c_read_data?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:133:7:
error: ?data? undeclared (first use in this function)

     *(data++) = readl(&regs->rx);
       ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:133:7:
note: each undeclared identifier is reported only once for each
function it appears in
In file included from /usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:13:0:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:
In function ?lpc32xx_i2c_xfer?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:194:34:
error: ?i2c? undeclared (first use in this function)

  writel(LPC32XX_I2C_SOFT_RESET, &i2c->ctrl);
                                  ^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/arch/arm/include/asm/io.h:77:55:
note: in definition of macro ?__arch_putl?
 #define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
                                                       ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:194:2:
note: in expansion of macro ?writel?
writel(LPC32XX_I2C_SOFT_RESET, &i2c->ctrl);
^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:
In function ?lpc32xx_i2c_ofdata_to_platdata?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:223:9:
error: ?struct lpc32xx_i2c_bus? has no member named ?regs?
i2c_bus->regs = (struct lpc32xx_i2c_registers *)

         ^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:219:12:
warning: unused variable ?flags? [-Wunused-variable]
  int node, flags;
            ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:
At top level:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:231:2:
warning: initialization from incompatible pointer type [enabled by
default]
.probe_chip = lpc32xx_i2c_probe,
^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:231:2:
warning: (near initialization for ?lpc32xx_i2c_ops.probe_chip?)
[enabled by default] /usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:232:2:
warning: initialization from incompatible pointer type [enabled by
default]
.set_bus_speed = lpc32xx_i2c_set_bus_speed,
^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:232:2:
warning: (near initialization for ?lpc32xx_i2c_ops.set_bus_speed?)
[enabled by default] /usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/i2c/lpc32xx_i2c.c:236:45:
error: ?LPC32XX_I2C? undeclared here (not in a function)
{ .compatible = "nxp,lpc32xx-i2c", .data = LPC32XX_I2C },

                                             ^

make[2]: *** [drivers/i2c/lpc32xx_i2c.o] Error 1
make[2]: *** Waiting for unfinished jobs.... /usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/rtc/ds1374.c:
In function ?rtc_read?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/rtc/ds1374.c:217:2:
warning: implicit declaration of function ?i2c_reg_read? [-Wimplicit-function-declaration]
return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
^
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/rtc/ds1374.c:
In function ?rtc_write?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/drivers/rtc/ds1374.c:224:3:
warning: implicit declaration of function ?i2c_reg_write? [-Wimplicit-function-declaration]
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
^
make[1]: *** [drivers/i2c] Error 2
make[1]: *** Waiting for unfinished jobs.... /usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_date.c:
In function ?do_date?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_date.c:42:14:
error: ?CONFIG_SYS_RTC_BUS_NUM? undeclared (first use in this function)

  I2C_SET_BUS(CONFIG_SYS_RTC_BUS_NUM);
              ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_date.c:42:14:
note: each undeclared identifier is reported only once for each function it appears in
make[2]: *** [common/cmd_date.o] Error 1
make[2]: *** Waiting for unfinished jobs.... /usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_eeprom.c:
In function ?eeprom_read?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_eeprom.c:155:16:
error: ?I2C_RXTX_LEN? undeclared (first use in this function)
if (maxlen > I2C_RXTX_LEN)

                ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_eeprom.c:155:16:
note: each undeclared identifier is reported only once for each function it appears in /usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_eeprom.c:
In function ?eeprom_write?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_eeprom.c:253:16:
error: ?I2C_RXTX_LEN? undeclared (first use in this function)
if (maxlen > I2C_RXTX_LEN)

                ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_dtt.c:
In function ?dtt_init?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_dtt.c:41:14:
error: ?CONFIG_SYS_DTT_BUS_NUM? undeclared (first use in this function)

  I2C_SET_BUS(CONFIG_SYS_DTT_BUS_NUM);
              ^

/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_dtt.c:41:14:
note: each undeclared identifier is reported only once for each function it appears in /usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_dtt.c:
In function ?dtt_i2c?:
/usr/local/google/c/cosarm/src/third_party/u-boot/files/common/cmd_dtt.c:65:14:
error: ?CONFIG_SYS_DTT_BUS_NUM? undeclared (first use in this function)

  I2C_SET_BUS(CONFIG_SYS_DTT_BUS_NUM);
              ^

make[2]: *** [common/cmd_eeprom.o] Error 1
make[2]: *** [common/cmd_dtt.o] Error 1
make[1]: *** [common] Error 2
make[1]: *** wait: No child processes. Stop.

Regards,
Simon

Bonjour Simon,

Le Mon, 23 Mar 2015 17:55:56 -0600, Simon Glass <[email protected]> a ?crit :

Yes you have, but it most probably misses attempts I did at fixing the LPC32XX driver, sorry.

Since the problem is not with this driver /per se/, try with removing the lpc32xx driver from the build altogether; you should end up with "only" these errors:

Of course the link stage will probably fail, but I guess once the compiler stage works for ds1374, date, eeprom and dtt, the linking should work.

Cordialement,
Albert ARIBAUD
3ADEV

Hi Albert,

Well the problem is that we don't have driver model support in rtc, We do have an eeprom uclass, but it is currently implemented only for sandbox. We don't have a hwmon uclass (although there is thermal, and I wonder if that is similar?

I'd be willing to create an rtc uclass and convert over ds1374 if you are happy to test it?

Regards,
Simon

Hi Simon,

Le Tue, 7 Apr 2015 21:20:22 -0600, Simon Glass <[email protected]> a ?crit :

No idea. :/

I can test ds1374 right now, but that is not a hardware that I can keep. I should be able to test eeprom on some other HW which I own.

Cordialement,
Albert ARIBAUD
3ADEV

Hi Albert,

I posted an RTC conversion series. Are you still able to test ds1374?

Regards,
Simon

Hi Simon,

Le Thu, 23 Apr 2015 09:16:32 -0600, Simon Glass <[email protected]> a ?crit :

I should, but I only have a slight chance to do so today; otherwise, not before sunday afternoon.

Cordialement,
Albert ARIBAUD
3ADEV