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Add Qualcomm ADM DMA support

PATCH New Andy Gross 1 participant 5 messages Mar 17, 2015

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Andy Gross

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#0 lore raw

cover Add Qualcomm ADM DMA support

This patch set adds support for the Qualcomm ADM DMA controller that is present in the APQ8064, IPQ8064, MSM8660, and MSM8960.

Andy Gross (4):
ARM: DT: ipq8064: Add ADM device node
ARM: DT: apq8064: Add ADM device node
ARM: DT: msm8660: Add ADM device nodes
ARM: DT: msm8960: Add ADM device node

 arch/arm/boot/dts/qcom-apq8064.dtsi      |   21 +++++++++++++++
 arch/arm/boot/dts/qcom-ipq8064-ap148.dts |    4 +++
 arch/arm/boot/dts/qcom-ipq8064.dtsi      |   23 ++++++++++++++++
 arch/arm/boot/dts/qcom-msm8660.dtsi      |   42 ++++++++++++++++++++++++++++++
 arch/arm/boot/dts/qcom-msm8960.dtsi      |   21 +++++++++++++++
 5 files changed, 111 insertions(+)
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
author
#1 lore raw

PATCH 1/4 ARM: DT: ipq8064: Add ADM device node

This patch adds support for the ADM DMA on the IPQ8064 SOC

Signed-off-by Andy Gross <[email protected]>
---
 arch/arm/boot/dts/qcom-ipq8064-ap148.dts |    4 ++++
 arch/arm/boot/dts/qcom-ipq8064.dtsi      |   23 +++++++++++++++++++++++
 2 files changed, 27 insertions(+)
arch/arm/boot/dts/qcom-ipq8064-ap148.dts +4 -0
index 55b2910..7f9ea50 100644
@@ -62,6 +62,10 @@
 
 				cs-gpios = <&qcom_pinmux 20 0>;
 
+				dmas = <&adm_dma 6>,
+					<&adm_dma 5>;
+				dma-names = "rx", "tx";
+
 				flash: m25p80 at 0 {
 					compatible = "s25fl256s1";
 					#address-cells = <1>;
arch/arm/boot/dts/qcom-ipq8064.dtsi +23 -0
index cb225da..4108ac4 100644
@@ -2,7 +2,10 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
 
 / {
 	model = "Qualcomm IPQ8064";

@@ -279,5 +282,25 @@
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
+
+		adm_dma: dma at 18300000 {
+			compatible = "qcom,adm";
+			reg = <0x18300000 0x100000>;
+			interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>;
+			#dma-cells = <1>;
+
+			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+			clock-names = "core", "iface";
+
+			resets = <&gcc ADM0_RESET>,
+				 <&gcc ADM0_PBUS_RESET>,
+				 <&gcc ADM0_C0_RESET>,
+				 <&gcc ADM0_C1_RESET>,
+				 <&gcc ADM0_C2_RESET>;
+			reset-names = "clk", "pbus", "c0", "c1", "c2";
+			qcom,ee = <0>;
+
+			status = "disabled";
+		};
 	};
 };
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
author
#2 lore raw

PATCH 2/4 ARM: DT: apq8064: Add ADM device node

In reply to Andy Gross

This patch adds support for the ADM DMA on the APQ8064 SOC.

Signed-off-by Andy Gross <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +21 -0
index b3154c0..0f24334 100644
@@ -2,6 +2,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>

@@ -349,5 +350,25 @@
 				pinctrl-0 = <&sdc4_gpios>;
 			};
 		};
+
+		adm_dma: dma at 18320000 {
+			compatible = "qcom,adm";
+			reg = <0x18320000 0xE0000>;
+			interrupts = <GIC_SPI 171 IRQ_TYPE_NONE>;
+			#dma-cells = <1>;
+
+			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+			clock-names = "core", "iface";
+
+			resets = <&gcc ADM0_RESET>,
+				 <&gcc ADM0_PBUS_RESET>,
+				 <&gcc ADM0_C0_RESET>,
+				 <&gcc ADM0_C1_RESET>,
+				 <&gcc ADM0_C2_RESET>;
+			reset-names = "clk", "pbus", "c0", "c1", "c2";
+			qcom,ee = <1>;
+
+			status = "disabled";
+		};
 	};
 };
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
author
#3 lore raw

PATCH 3/4 ARM: DT: msm8660: Add ADM device nodes

In reply to Andy Gross

This patch adds support for the ADM DMA on the MSM8660 SOC

Signed-off-by Andy Gross <[email protected]>
---
 arch/arm/boot/dts/qcom-msm8660.dtsi |   42 +++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
arch/arm/boot/dts/qcom-msm8660.dtsi +42 -0
index 0affd61..8043c12 100644
@@ -4,7 +4,9 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
+#include <dt-bindings/reset/qcom,gcc-msm8660.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
 	model = "Qualcomm MSM8660";

@@ -196,6 +198,46 @@
 				vmmc-supply = <&vsdcc_fixed>;
 			};
 		};
+
+		adm_dma0: dma at 18320000 {
+			compatible = "qcom,adm";
+			reg = <0x18320000 0x100000>;
+			interrupts = <GIC_SPI 171 IRQ_TYPE_NONE>;
+			#dma-cells = <1>;
+
+			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+			clock-names = "core", "iface";
+
+			resets = <&gcc ADM0_RESET>,
+				 <&gcc ADM0_PBUS_RESET>,
+				 <&gcc ADM0_C0_RESET>,
+				 <&gcc ADM0_C1_RESET>,
+				 <&gcc ADM0_C2_RESET>;
+			reset-names = "clk", "pbus", "c0", "c1", "c2";
+			qcom,ee = <1>;
+
+			status = "disabled";
+		};
+
+		adm_dma1: dma at 18420000 {
+			compatible = "qcom,adm";
+			reg = <0x18420000 0xE0000>;
+			interrupts = <GIC_SPI 167 IRQ_TYPE_NONE>;
+			#dma-cells = <1>;
+
+			clocks = <&gcc ADM1_CLK>, <&gcc ADM1_PBUS_CLK>;
+			clock-names = "core", "iface";
+
+			resets = <&gcc ADM1_RESET>,
+				 <&gcc ADM1_PBUS_RESET>,
+				 <&gcc ADM1_C0_RESET>,
+				 <&gcc ADM1_C1_RESET>,
+				 <&gcc ADM1_C2_RESET>;
+			reset-names = "clk", "pbus", "c0", "c1", "c2";
+			qcom,ee = <1>;
+
+			status = "disabled";
+		};
 	};
 
 };
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
author
#4 lore raw

PATCH 4/4 ARM: DT: msm8960: Add ADM device node

In reply to Andy Gross

This patch adds support for the ADM DMA on the MSM8960 SOC

Signed-off-by Andy Gross <[email protected]>
---
 arch/arm/boot/dts/qcom-msm8960.dtsi |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/arm/boot/dts/qcom-msm8960.dtsi +21 -0
index e1b0d5c..1b7c4c4 100644
@@ -4,6 +4,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 
 / {

@@ -238,5 +239,25 @@
 				vmmc-supply = <&vsdcc_fixed>;
 			};
 		};
+
+		adm_dma: dma at 18320000 {
+			compatible = "qcom,adm";
+			reg = <0x18320000 0xE0000>;
+			interrupts = <GIC_SPI 171 IRQ_TYPE_NONE>;
+			#dma-cells = <1>;
+
+			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+			clock-names = "core", "iface";
+
+			resets = <&gcc ADM0_RESET>,
+				 <&gcc ADM0_PBUS_RESET>,
+				 <&gcc ADM0_C0_RESET>,
+				 <&gcc ADM0_C1_RESET>,
+				 <&gcc ADM0_C2_RESET>;
+			reset-names = "clk", "pbus", "c0", "c1", "c2";
+			qcom,ee = <1>;
+
+			status = "disabled";
+		};
 	};
 };
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation