ARM: dts: imx6: Add Embest MarS Board
Subsystems (3)
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6 Dual based development board.
The e-MMC chip is disabled because initialization fails (error -110). A possible cause is described in [2].
[1] http://www.embest-tech.com/shop/star/marsboard.html
[2] https://community.freescale.com/message/442168#442168
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6q-marsboard.dts | 401 ++++++++++++++++++++++++++++++++++ 2 files changed, 402 insertions(+) create mode 100644 arch/arm/boot/dts/imx6q-marsboard.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -249,6 +249,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-gw54xx.dtb \ imx6q-gw552x.dtb \ imx6q-hummingboard.dtb \ + imx6q-marsboard.dtb \ imx6q-nitrogen6x.dtb \ imx6q-phytec-pbab01.dtb \ imx6q-rex-pro.dtb \
arch/arm/boot/dts/imx6q-marsboard.dts new file +401 -0
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Signature · 1 line
2.3.5
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Am Mittwoch, den 01.04.2015, 10:10 +0200 schrieb Vianney le Cl?ment de Saint-Marcq:
Quoted 5 lines
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6 Dual based development board.
The e-MMC chip is disabled because initialization fails (error -110). A possible cause is described in [2].
So if the problem is that there are only 4 connected data lines one the board, couldn't you simply add the property bus-width = <4>; to the emmc node?
Quoted 430 lines
[1] http://www.embest-tech.com/shop/star/marsboard.html
[2] https://community.freescale.com/message/442168#442168Signed-off-by Vianney le Cl?ment de Saint-Marcq <[email protected]>--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6q-marsboard.dts | 401 ++++++++++++++++++++++++++++++++++ 2 files changed, 402 insertions(+) create mode 100644 arch/arm/boot/dts/imx6q-marsboard.dtsarch/arm/boot/dts/Makefile +1
-0@@ -249,6 +249,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-gw54xx.dtb \ imx6q-gw552x.dtb \ imx6q-hummingboard.dtb \ + imx6q-marsboard.dtb \ imx6q-nitrogen6x.dtb \ imx6q-phytec-pbab01.dtb \ imx6q-rex-pro.dtb \arch/arm/boot/dts/imx6q-marsboard.dts new file +401
-0@@ -0,0 +1,401 @@ +/* + * Copyright 2015 Vianney le Cl?ment de Saint-Marcq, Essensium NV + * Based on imx6dl-riotboard.dts Copyright Iain Paton. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/dts-v1/; +#include "imx6q.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "MarS Board i.MX6 Dual Board"; + compatible = "embest,imx6q-marsboard", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x40000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_2p5v: regulator at 0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + reg_3p3v: regulator at 1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb_otg_vbus: regulator at 2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led>; + + led0: user1 { + label = "user1"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led1: user2 { + label = "user2"; + gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + cs-gpios = <&gpio2 30 0>; + fsl,spi-num-chipselects = <1>; + status = "okay"; + + flash: m25p80 at 0 { + compatible = "st,sst25vf016b"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>; + #size-cells = <1>; + + bootloader at 0 { + reg = <0x00000000 0x00100000>; + read-only; + }; + + kernel at 100000 { + reg = <0x00100000 0x00100000>; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbh1 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + vmmc-supply = <®_3p3v>; + non-removable; + /* Disabled because eMMC initialization fails */ + /*status = "okay";*/ +}; + +&iomuxc { + pinctrl-names = "default"; + + imx6-marsboard { + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000b1 /* CS0 */ + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 + MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 + MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 + MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x000b1 /* CS0 */ + MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x000b1 /* IRQ */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 /* AR8035 pin strapping: IO voltage: pull up */ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 /* AR8035 pin strapping: PHYADDR#0: pull down */ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 /* AR8035 pin strapping: PHYADDR#1: pull down */ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 /* AR8035 pin strapping: MODE#1: pull up */ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 /* AR8035 pin strapping: MODE#3: pull up */ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0 /* AR8035 interrupt */ + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_led: ledgrp { + fsl,pins = < + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* user led0 */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* user led1 */ + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */ + MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* SD2 CD */ + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0 /* SD3 RST (eMMC) */ + >; + }; + }; +};
Signature · 2 lines
Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Quoted 11 lines · Lucas Stach
Am Mittwoch, den 01.04.2015, 10:10 +0200 schrieb Vianney le Cl?ment de
Saint-Marcq:Quoted 7 lines
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6
Dual
based development board.The e-MMC chip is disabled because initialization fails (error
-110).
A possible cause is described in [2].
Quoted 5 lines
So if the problem is that there are only 4 connected data lines one the
board, couldn't you simply add the property bus-width = <4>; to the emmc
node?
It is already the case (imx6qdl.dtsi, line 929), but to no avail. That is why I wrote "possible" cause as I did not find any evidence of the described behaviour in my (admittedly limited) investigations.
Vianney le Cl?ment de Saint-Marcq
Embedded Software Developper ? +32 485 84 55 05 Essensium, Mind division ? www.mind.be
GPG: 727B CFE9 355F 1B02 0820 EE1C 9042 3E07 A804 0316
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
This is still not working on 4.0 with this devicetree and eMMC enabled.
[ 1.467617] Driver 'mmcblk' needs updating - please use bus_type methods [ 1.474581] sdhci: Secure Digital Host Controller Interface driver [ 1.480776] sdhci: Copyright(c) Pierre Ossman [ 1.485229] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.491920] sdhci-esdhc-imx 2194000.usdhc: could not get ultra high speed state, work on normal mode [ 1.502624] sdhci-esdhc-imx 2194000.usdhc: No vqmmc regulator found [ 1.553863] mmc0: SDHCI controller on 2194000.usdhc [2194000.usdhc] using ADMA [ 1.562020] sdhci-esdhc-imx 2198000.usdhc: could not get ultra high speed state, work on normal mode [ 1.572519] sdhci-esdhc-imx 2198000.usdhc: No vqmmc regulator found [ 1.623290] mmc1: SDHCI controller on 2198000.usdhc [2198000.usdhc] using ADMA [ 1.632466] usbcore: registered new interface driver usbhid [ 1.638080] usbhid: USB HID core driver [ 1.648923] TCP: cubic registered [ 1.653864] NET: Registered protocol family 10 [ 1.661093] sit: IPv6 over IPv4 tunneling driver [ 1.667826] NET: Registered protocol family 17 [ 1.672323] can: controller area network core (rev 20120528 abi 9) [ 1.678754] NET: Registered protocol family 29 [ 1.683259] can: raw protocol (rev 20120528) [ 1.683659] usb 1-1: new high-speed USB device number 2 using ci_hdrc [ 1.694117] can: broadcast manager protocol (rev 20120528 t) [ 1.699821] can: netlink gateway (rev 20130117) max_hops=1 [ 1.705994] Key type dns_resolver registered [ 1.715425] Registering SWP/SWPB emulation handler [ 1.728171] snvs_rtc 20cc034.snvs-rtc-lp: setting system clock to 1970-01-01 00:00:00 UTC (0) [ 1.773338] usb_otg_vbus: disabling [ 1.776858] 2P5V: disabling [ 1.780066] ALSA device list: [ 1.783043] No soundcards found. [ 1.787866] Waiting for root device /dev/mmcblk0p1... [ 1.836367] hub 1-1:1.0: USB hub found [ 1.840349] hub 1-1:1.0: 4 ports detected [ 1.879136] mmc1: MAN_BKOPS_EN bit is not set [ 1.893823] mmc1: new high speed MMC card at address 0001 [ 1.901285] mmcblk0: mmc1:0001 NCard 3.71 GiB [ 1.906172] mmcblk0boot0: mmc1:0001 NCard partition 1 2.00 MiB [ 1.912424] mmcblk0boot1: mmc1:0001 NCard partition 2 2.00 MiB [ 1.918676] mmcblk0rpmb: mmc1:0001 NCard partition 3 128 KiB [ 1.928406] mmcblk0: p1 [ 12.033443] mmc1: Timeout waiting for hardware interrupt. [ 12.039193] mmcblk0: error -110 transferring data, sector 20482, nr 2, cmd response 0x900, card status 0xb00 [ 12.049118] mmc1: tried to reset card [ 12.052804] mmcblk0: retrying using single block read [ 22.073257] mmc1: Timeout waiting for hardware interrupt. [ 22.078969] mmcblk0: error -110 transferring data, sector 20480, nr 8, cmd response 0x900, card status 0xb00 [ 22.088897] mmc1: tried to reset card [ 22.092585] mmcblk0: retrying using single block read [ 22.100654] EXT3-fs (mmcblk0p1): error: magic mismatch [ 32.113294] mmc1: Timeout waiting for hardware interrupt. [ 32.119153] mmcblk0: error -110 transferring data, sector 20482, nr 2, cmd response 0x900, card status 0xb00 [ 32.129070] mmc1: tried to reset card [ 32.132758] mmcblk0: retrying using single block read [ 32.138719] EXT2-fs (mmcblk0p1): error: couldn't mount because of
unsupported optional features (4)
Quoted 33 lines · Vianney le Cl?ment
Quoted 7 lines · Lucas Stach
Am Mittwoch, den 01.04.2015, 10:10 +0200 schrieb Vianney le Cl?ment de Saint-Marcq:
Quoted 4 lines
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6 Dual based development board.
Quoted 7 lines
Quoted 2 lines
The e-MMC chip is disabled because initialization fails (error -110). A possible cause is described in [2].
So if the problem is that there are only 4 connected data lines one the board, couldn't you simply add the property bus-width = <4>; to the emmc node?
It is already the case (
imx6qdl.dtsi, line 929), but to no avail. That is why I wrote "possible" cause as I did not find any evidence of the described behaviour in my (admittedly limited) investigations.Vianney le Cl?ment de Saint-Marcq
Embedded Software Developper ? +32 485 84 55 05 Essensium, Mind division ? www.mind.be
GPG: 727B CFE9 355F 1B02 0820 EE1C 9042 3E07 A804 0316_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Hi Catalin,
This may as well be a signaling issue. You could try to slow down the the MMC bus speed or play a bit with the pin drive strength values. Note that in those cases _reducing_ the drive strength may be the right thing to do.
Regards,
Lucas
Am Freitag, den 24.04.2015, 15:22 +0300 schrieb Catalin Crenguta:
Quoted 100 lines
This is still not working on 4.0 with this devicetree and eMMC enabled.
[ 1.467617] Driver 'mmcblk' needs updating - please use bus_type methods [ 1.474581] sdhci: Secure Digital Host Controller Interface driver [ 1.480776] sdhci: Copyright(c) Pierre Ossman [ 1.485229] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.491920] sdhci-esdhc-imx 2194000.usdhc: could not get ultra high speed state, work on normal mode [ 1.502624] sdhci-esdhc-imx 2194000.usdhc: No vqmmc regulator found [ 1.553863] mmc0: SDHCI controller on 2194000.usdhc [2194000.usdhc] using ADMA [ 1.562020] sdhci-esdhc-imx 2198000.usdhc: could not get ultra high speed state, work on normal mode [ 1.572519] sdhci-esdhc-imx 2198000.usdhc: No vqmmc regulator found [ 1.623290] mmc1: SDHCI controller on 2198000.usdhc [2198000.usdhc] using ADMA [ 1.632466] usbcore: registered new interface driver usbhid [ 1.638080] usbhid: USB HID core driver [ 1.648923] TCP: cubic registered [ 1.653864] NET: Registered protocol family 10 [ 1.661093] sit: IPv6 over IPv4 tunneling driver [ 1.667826] NET: Registered protocol family 17 [ 1.672323] can: controller area network core (rev 20120528 abi 9) [ 1.678754] NET: Registered protocol family 29 [ 1.683259] can: raw protocol (rev 20120528) [ 1.683659] usb 1-1: new high-speed USB device number 2 using ci_hdrc [ 1.694117] can: broadcast manager protocol (rev 20120528 t) [ 1.699821] can: netlink gateway (rev 20130117) max_hops=1 [ 1.705994] Key type dns_resolver registered [ 1.715425] Registering SWP/SWPB emulation handler [ 1.728171] snvs_rtc 20cc034.snvs-rtc-lp: setting system clock to 1970-01-01 00:00:00 UTC (0) [ 1.773338] usb_otg_vbus: disabling [ 1.776858] 2P5V: disabling [ 1.780066] ALSA device list: [ 1.783043] No soundcards found. [ 1.787866] Waiting for root device /dev/mmcblk0p1... [ 1.836367] hub 1-1:1.0: USB hub found [ 1.840349] hub 1-1:1.0: 4 ports detected [ 1.879136] mmc1: MAN_BKOPS_EN bit is not set [ 1.893823] mmc1: new high speed MMC card at address 0001 [ 1.901285] mmcblk0: mmc1:0001 NCard 3.71 GiB [ 1.906172] mmcblk0boot0: mmc1:0001 NCard partition 1 2.00 MiB [ 1.912424] mmcblk0boot1: mmc1:0001 NCard partition 2 2.00 MiB [ 1.918676] mmcblk0rpmb: mmc1:0001 NCard partition 3 128 KiB [ 1.928406] mmcblk0: p1 [ 12.033443] mmc1: Timeout waiting for hardware interrupt. [ 12.039193] mmcblk0: error -110 transferring data, sector 20482, nr 2, cmd response 0x900, card status 0xb00 [ 12.049118] mmc1: tried to reset card [ 12.052804] mmcblk0: retrying using single block read [ 22.073257] mmc1: Timeout waiting for hardware interrupt. [ 22.078969] mmcblk0: error -110 transferring data, sector 20480, nr 8, cmd response 0x900, card status 0xb00 [ 22.088897] mmc1: tried to reset card [ 22.092585] mmcblk0: retrying using single block read [ 22.100654] EXT3-fs (mmcblk0p1): error: magic mismatch [ 32.113294] mmc1: Timeout waiting for hardware interrupt. [ 32.119153] mmcblk0: error -110 transferring data, sector 20482, nr 2, cmd response 0x900, card status 0xb00 [ 32.129070] mmc1: tried to reset card [ 32.132758] mmcblk0: retrying using single block read [ 32.138719] EXT2-fs (mmcblk0p1): error: couldn't mount because ofunsupported optional features (4)
Quoted 33 lines · Vianney le Cl?ment
Quoted 7 lines · Lucas Stach
Am Mittwoch, den 01.04.2015, 10:10 +0200 schrieb Vianney le Cl?ment de Saint-Marcq:
Quoted 4 lines
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6 Dual based development board.
Quoted 7 lines
Quoted 2 lines
The e-MMC chip is disabled because initialization fails (error -110). A possible cause is described in [2].
So if the problem is that there are only 4 connected data lines one the board, couldn't you simply add the property bus-width = <4>; to the emmc node?
It is already the case (
imx6qdl.dtsi, line 929), but to no avail. That is why I wrote "possible" cause as I did not find any evidence of the described behaviour in my (admittedly limited) investigations.Vianney le Cl?ment de Saint-Marcq
Embedded Software Developper ? +32 485 84 55 05 Essensium, Mind division ? www.mind.be
GPG: 727B CFE9 355F 1B02 0820 EE1C 9042 3E07 A804 0316_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 2 lines
Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Hi Lucas,
Quoted 7 lines · Lucas Stach
Hi Catalin,
This may as well be a signaling issue. You could try to slow down the the MMC bus speed or play a bit with the pin drive strength values. Note that in those cases _reducing_ the drive strength may be the right thing to do.
Thank you!
I have managed to get it working after changing the drive strength to 260 Ohm and speed to 50 MHz.
Changing only the speed to 50 MHz didn't work, I had to also change the drive strength. I haven't tested other values.
Maybe this can be pushed to mainline?
Quoted 2 lines
Regards,
Lucas
Best regards,
Catalin
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Quoted 5 lines · Catalin Crenguta
I have managed to get it working after changing the drive strength to 260 Ohm and speed to 50 MHz.
Changing only the speed to 50 MHz didn't work, I had to also change the drive strength. I haven't tested other values.
Maybe this can be pushed to mainline?
Hi Catalin,
Sorry for not being able to answer earlier. Great that you made eMMC to work. Can you share your pinmux configuration for usdhc3, so I can send a follow-up patch?
Thanks,
Vianney
Vianney le Cl?ment de Saint-Marcq
Embedded Software Developper ? +32 485 84 55 05 Essensium, Mind division ? www.mind.be
GPG: 727B CFE9 355F 1B02 0820 EE1C 9042 3E07 A804 0316
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Quoted 5 lines
Hi Catalin,
Sorry for not being able to answer earlier. Great that you made eMMC to work. Can you share your pinmux configuration for usdhc3, so I can send a follow-up patch?
I have changed the byte 0x59 with 0x090x17059 -> 0x17009
and 0x10059 -> 0x10009
Fabio Estevam
reviewerPATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
In reply to Vianney le Clément de Saint-MarcqQuoted 10 lines · Vianney le Cl?ment de Saint-Marcq
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6 Dual based development board.
The e-MMC chip is disabled because initialization fails (error -110). A possible cause is described in [2].
[1] http://www.embest-tech.com/shop/star/marsboard.html
[2] https://community.freescale.com/message/442168#442168Signed-off-by Vianney le Cl?ment de Saint-Marcq <[email protected]>
Couldn't this be combined with the existingarch/arm/boot/dts/imx6dl-riotboard.dts?
Regards,
Fabio Estevam
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Quoted 10 lines · Fabio Estevam
Quoted 8 lines · Vianney le Cl?ment de Saint-Marcq
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6
Dual
based development board.The e-MMC chip is disabled because initialization fails (error
-110).
A possible cause is described in [2].
Quoted 8 lines
Quoted 5 lines
[1] http://www.embest-tech.com/shop/star/marsboard.html
[2] https://community.freescale.com/message/442168#442168Signed-off-by: Vianney le Cl?ment de Saint-Marcq
<[email protected]>Couldn't this be combined with the existing
arch/arm/boot/dts/imx6dl-riotboard.dts?
While both boards do indeed share a lot of the schematics, the marsboard has some differences, e.g., in pin configuration, that requires a separate dts. We could split common parts out in a new dtsi, but I am not sure it is worth the hassle.
Regards,
Vianney
Vianney le Cl?ment de Saint-Marcq
Embedded Software Developper ? +32 485 84 55 05 Essensium, Mind division ? www.mind.be
GPG: 727B CFE9 355F 1B02 0820 EE1C 9042 3E07 A804 0316
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
In reply to Vianney le Clément de Saint-MarcqQuoted 5 lines · Vianney le Cl?ment de Saint-Marcq
Add device tree for the Embest/Element 14 MarS Board [1], an i.MX6 Dual based development board.
The e-MMC chip is disabled because initialization fails (error -110). A possible cause is described in [2].
If eMMC doesn't work yet, you should just not add it.
Quoted 29 lines
[1] http://www.embest-tech.com/shop/star/marsboard.html
[2] https://community.freescale.com/message/442168#442168Signed-off-by Vianney le Cl?ment de Saint-Marcq <[email protected]>--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6q-marsboard.dts | 401 ++++++++++++++++++++++++++++++++++ 2 files changed, 402 insertions(+) create mode 100644 arch/arm/boot/dts/imx6q-marsboard.dtsarch/arm/boot/dts/Makefile +1
-0@@ -249,6 +249,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-gw54xx.dtb \ imx6q-gw552x.dtb \ imx6q-hummingboard.dtb \ + imx6q-marsboard.dtb \ imx6q-nitrogen6x.dtb \ imx6q-phytec-pbab01.dtb \ imx6q-rex-pro.dtb \arch/arm/boot/dts/imx6q-marsboard.dts new file +0
-0
arch/arm/boot/dts/imx6q-marsboard.dts line 9
Quoted 9 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +9
-0@@ -0,0 +1,401 @@ +/* + * Copyright 2015 Vianney le Cl?ment de Saint-Marcq, Essensium NV + * Based on imx6dl-riotboard.dts Copyright Iain Paton. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */
For new dts file, we suggest to use GPL/X11 dual-license for non-Linux users. Find example below.
Quoted 31 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +31
-0+ +/dts-v1/; +#include "imx6q.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "MarS Board i.MX6 Dual Board"; + compatible = "embest,imx6q-marsboard", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x40000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_2p5v: regulator at 0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + reg_3p3v: regulator at 1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>;
arch/arm/boot/dts/imx6q-marsboard.dts line 50
Quoted 10 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +10
-0+ regulator-max-microvolt = <3300000>; + }; + + reg_usb_otg_vbus: regulator at 2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>;
Use the definition in dt-bindings/gpio/gpio.h. That's why you include it in the file, right?
arch/arm/boot/dts/imx6q-marsboard.dts line 59
Quoted 9 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +9
-0+ }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led>; + + led0: user1 {
The label is defined for nothing.
Quoted 14 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +14
-0+ label = "user1"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led1: user2 { + label = "user2"; + gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; +}; +
arch/arm/boot/dts/imx6q-marsboard.dts line 83
Quoted 10 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +10
-0+&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + cs-gpios = <&gpio2 30 0>;
Ditto
Quoted 8 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +8
-0+ fsl,spi-num-chipselects = <1>; + status = "okay"; + + flash: m25p80 at 0 { + compatible = "st,sst25vf016b"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>;
arch/arm/boot/dts/imx6q-marsboard.dts line 101
Quoted 10 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +10
-0+ #size-cells = <1>; + + bootloader at 0 { + reg = <0x00000000 0x00100000>; + read-only; + }; + + kernel at 100000 { + reg = <0x00100000 0x00100000>; + };
Do not put the partition table in the default DTS, as it's an user/software level configuration.
Quoted 114 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +114
-0+ }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbh1 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc3 {
arch/arm/boot/dts/imx6q-marsboard.dts line 225
Quoted 10 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +10
-0+ pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + vmmc-supply = <®_3p3v>; + non-removable; + /* Disabled because eMMC initialization fails */ + /*status = "okay";*/ +}; + +&iomuxc { + pinctrl-names = "default";
It makes no sense to have pinctrl-names without anything like pinctrl-0.
Quoted 39 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +39
-0+ + imx6-marsboard { + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000b1 /* CS0 */ + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 + MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 + MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 + MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x000b1 /* CS0 */ + MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x000b1 /* IRQ */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
arch/arm/boot/dts/imx6q-marsboard.dts line 274
Quoted 10 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +10
-0+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 /* AR8035 pin strapping: IO voltage: pull up */ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 /* AR8035 pin strapping: PHYADDR#0: pull down */ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 /* AR8035 pin strapping: PHYADDR#1: pull down */ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 /* AR8035 pin strapping: MODE#1: pull up */ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 /* AR8035 pin strapping: MODE#3: pull up */ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0 /* AR8035 interrupt */
Can we put the comment right above to shorten the lines a bit?
/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 pin strapping: IO voltage: pull up */ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
Quoted 88 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +88
-0+ >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_led: ledgrp { + fsl,pins = < + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* user led0 */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* user led1 */ + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp {
arch/arm/boot/dts/imx6q-marsboard.dts line 372
Quoted 10 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +10
-0+ fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */
What does the comment mean?
Shawn
Quoted 32 lines
arch/arm/boot/dts/imx6q-marsboard.dts new file +29
-0+ MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* SD2 CD */ + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0 /* SD3 RST (eMMC) */ + >; + }; + }; +};Signature · 1 line
2.3.5
PATCH 1/1 ARM: dts: imx6: Add Embest MarS Board
Hi Shawn,
Thanks for taking time reviewing this. I will send a follow-up patch.
Quoted 1 line · Shawn Guo
If eMMC doesn't work yet, you should just not add it.
Thanks to Lucas and Catalin it does work now :). Will update it in v2.
Quoted 4 lines
For new dts file, we suggest to use GPL/X11 dual-license for non-Linux users. Find example below.
No problem for dual-licensing on my part, but this dts is heavily based on imx6q-riotboard.dts (as mentioned in the header), which is only licensed under the GPL.
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+
pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID0x17059
+MX6QDL_PAD_EIM_D22__GPIO3_IO220x000b0/*MX6QDL_PAD_EIM_D22__USB_OTG_PWR*/What does the comment mean?
It is a leftover from imx6q-riotboard.dts. I will change it.
Regards,
Vianney
Vianney le Cl?ment de Saint-Marcq
Embedded Software Developper ? +32 485 84 55 05 Essensium, Mind division ? www.mind.be
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