i2c: sunxi: Support every i2c controller on each supported platform
Subsystems (4)
cover i2c: sunxi: Support every i2c controller on each supported platform
Changes since v1:
* Kconfig option to enable I2C/TWI controllers 1-4 (when applicable)
* Following patch to enable exposed busses on a few community-supported single-board-computers
This series adds support for every i2c controller found on sun4i/sun5i/sun6i/sun7i/sun8i platforms and shouldn't break support for Marvell platforms (orion5x, kirkwood, armada xp) the driver was originally written for.
Regarding sunxi, I double-checked that this doesn't conflict with VIDEO_LCD_PANEL_I2C.
I would be interested in having this tested on sun8i (A23), since I changed TWI0 muxing (to PH2-PH3 instead of PB0-PB1), according to the user manual and what is being done on the upstream Linux kernel. I2C was either not working before, or it was being muxed correctly by the bootrom, probably to communicate with the AXP, which luckily made it work in U-Boot too, since the I/O base address was already correct.
My use case here is that I'm writing a slave-side bitbang i2c implementation (with an Arduino) for a school project, using a Cubieboard2 as master and U-Boot as POC. However, only TWI1 was available through the expansion pins, hence the need for this series.
PATCH v2 1/3 i2c: mvtwsi: Support for up to 4 different controllers
Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI controller. However, other platforms using MVTWSI may come with more: this is the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found on the same chip.
--- arch/arm/include/asm/arch-sunxi/i2c.h | 2 +- arch/arm/mach-kirkwood/include/mach/config.h | 2 +- drivers/i2c/mvtwsi.c | 124 ++++++++++++++++++++------- include/configs/db-mv784mp-gp.h | 2 +- include/configs/edminiv2.h | 2 +- include/configs/maxbcm.h | 2 +- 6 files changed, 100 insertions(+), 34 deletions(-)
arch/arm/include/asm/arch-sunxi/i2c.h +1 -1
@@ -8,7 +8,7 @@#include <asm/arch/cpu.h> -#define CONFIG_I2C_MVTWSI_BASE SUNXI_TWI0_BASE +#define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */ #define CONFIG_SYS_TCLK 24000000
arch/arm/mach-kirkwood/include/mach/config.h +1 -1
@@ -44,7 +44,7 @@#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000#define CONFIG_NR_DRAM_BANKS_MAX 2 -#define CONFIG_I2C_MVTWSI_BASE KW_TWSI_BASE +#define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE#define MV_UART_CONSOLE_BASE KW_UART0_BASE#define MV_SATA_BASE KW_SATA_BASE#define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET
drivers/i2c/mvtwsi.c +95 -29
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include/configs/db-mv784mp-gp.h +1 -1
@@ -37,7 +37,7 @@/* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI -#define CONFIG_I2C_MVTWSI_BASE MVEBU_TWSI_BASE +#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE#define CONFIG_SYS_I2C_SLAVE 0x0#define CONFIG_SYS_I2C_SPEED 100000
include/configs/edminiv2.h +1 -1
@@ -208,7 +208,7 @@#ifdef CONFIG_CMD_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI -#define CONFIG_I2C_MVTWSI_BASE ORION5X_TWSI_BASE +#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE#define CONFIG_SYS_I2C_SLAVE 0x0#define CONFIG_SYS_I2C_SPEED 100000#endif
include/configs/maxbcm.h +1 -1
@@ -35,7 +35,7 @@/* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI -#define CONFIG_I2C_MVTWSI_BASE MVEBU_TWSI_BASE +#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE#define CONFIG_SYS_I2C_SLAVE 0x0#define CONFIG_SYS_I2C_SPEED 100000
Signature · 1 line
1.9.1
PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
In reply to Paul KocialkowskiSunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers.
--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +7 -0
@@ -94,6 +94,13 @@#define SUNXI_TWI0_BASE 0x01c2ac00#define SUNXI_TWI1_BASE 0x01c2b000#define SUNXI_TWI2_BASE 0x01c2b400 +#ifdef CONFIG_MACH_SUN6I +#define SUNXI_TWI3_BASE 0x01c0b800 +#endif +#ifdef CONFIG_MACH_SUN7I +#define SUNXI_TWI3_BASE 0x01c2b800 +#define SUNXI_TWI4_BASE 0x01c2c000 +#endif #define SUNXI_CAN_BASE 0x01c2bc00
arch/arm/include/asm/arch-sunxi/gpio.h +14 -1
@@ -148,7 +148,11 @@ enum sunxi_gpio_number {#define SUN6I_GPA_SDC2 5#define SUN6I_GPA_SDC3 4 -#define SUNXI_GPB_TWI0 2 +#define SUN4I_GPB_TWI0 2 +#define SUN4I_GPB_TWI1 2 +#define SUN5I_GPB_TWI1 2 +#define SUN4I_GPB_TWI2 2 +#define SUN5I_GPB_TWI2 2#define SUN4I_GPB_UART0 2#define SUN5I_GPB_UART0 2
@@ -160,6 +164,7 @@ enum sunxi_gpio_number {#define SUNXI_GPD_LVDS0 3#define SUN5I_GPE_SDC2 3 +#define SUN8I_GPE_TWI2 3#define SUNXI_GPF_SDC0 2#define SUNXI_GPF_UART0 4
@@ -169,12 +174,20 @@ enum sunxi_gpio_number {#define SUN5I_GPG_SDC1 2#define SUN6I_GPG_SDC1 2#define SUN8I_GPG_SDC1 2 +#define SUN6I_GPG_TWI3 2#define SUN5I_GPG_UART1 4#define SUN4I_GPH_SDC1 5 +#define SUN6I_GPH_TWI0 2 +#define SUN8I_GPH_TWI0 2 +#define SUN6I_GPH_TWI1 2 +#define SUN8I_GPH_TWI1 2 +#define SUN6I_GPH_TWI2 2#define SUN6I_GPH_UART0 2#define SUNXI_GPI_SDC3 2 +#define SUN7I_GPI_TWI3 3 +#define SUN7I_GPI_TWI4 3#define SUN6I_GPL0_R_P2WI_SCK 3#define SUN6I_GPL1_R_P2WI_SDA 3
arch/arm/include/asm/arch-sunxi/i2c.h +13 -0
@@ -9,6 +9,19 @@#include <asm/arch/cpu.h> #define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE +#ifdef CONFIG_I2C1_ENABLE +#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE +#endif +#ifdef CONFIG_I2C2_ENABLE +#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_TWI2_BASE +#endif +#ifdef CONFIG_I2C3_ENABLE +#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE +#endif +#ifdef CONFIG_I2C4_ENABLE +#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE +#endif +/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */ #define CONFIG_SYS_TCLK 24000000
board/sunxi/Kconfig +31 -0
@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins, enabling + its clock and setting up the bus. This is especially useful on devices + with slaves connected to the bus or with pins exposed through e.g. an + expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLE + bool "Enable I2C/TWI controller 4" + default n + ---help--- + See I2C1_ENABLE help text. +endif + config VIDEO boolean "Enable graphical uboot console on HDMI, LCD or VGA" default y
board/sunxi/board.c +73 -2
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Signature · 1 line
1.9.1
PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
Hi Paul,
Quoted 130 lines · Paul Kocialkowski
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers.
Signed-off-by Paul Kocialkowski <[email protected]>--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +7
-0@@ -94,6 +94,13 @@#define SUNXI_TWI0_BASE 0x01c2ac00#define SUNXI_TWI1_BASE 0x01c2b000#define SUNXI_TWI2_BASE 0x01c2b400 +#ifdef CONFIG_MACH_SUN6I +#define SUNXI_TWI3_BASE 0x01c0b800 +#endif +#ifdef CONFIG_MACH_SUN7I +#define SUNXI_TWI3_BASE 0x01c2b800 +#define SUNXI_TWI4_BASE 0x01c2c000 +#endif #define SUNXI_CAN_BASE 0x01c2bc00arch/arm/include/asm/arch-sunxi/gpio.h +14
-1@@ -148,7 +148,11 @@ enum sunxi_gpio_number {#define SUN6I_GPA_SDC2 5#define SUN6I_GPA_SDC3 4 -#define SUNXI_GPB_TWI0 2 +#define SUN4I_GPB_TWI0 2 +#define SUN4I_GPB_TWI1 2 +#define SUN5I_GPB_TWI1 2 +#define SUN4I_GPB_TWI2 2 +#define SUN5I_GPB_TWI2 2#define SUN4I_GPB_UART0 2#define SUN5I_GPB_UART0 2@@ -160,6 +164,7 @@ enum sunxi_gpio_number {#define SUNXI_GPD_LVDS0 3#define SUN5I_GPE_SDC2 3 +#define SUN8I_GPE_TWI2 3#define SUNXI_GPF_SDC0 2#define SUNXI_GPF_UART0 4@@ -169,12 +174,20 @@ enum sunxi_gpio_number {#define SUN5I_GPG_SDC1 2#define SUN6I_GPG_SDC1 2#define SUN8I_GPG_SDC1 2 +#define SUN6I_GPG_TWI3 2#define SUN5I_GPG_UART1 4#define SUN4I_GPH_SDC1 5 +#define SUN6I_GPH_TWI0 2 +#define SUN8I_GPH_TWI0 2 +#define SUN6I_GPH_TWI1 2 +#define SUN8I_GPH_TWI1 2 +#define SUN6I_GPH_TWI2 2#define SUN6I_GPH_UART0 2#define SUNXI_GPI_SDC3 2 +#define SUN7I_GPI_TWI3 3 +#define SUN7I_GPI_TWI4 3#define SUN6I_GPL0_R_P2WI_SCK 3#define SUN6I_GPL1_R_P2WI_SDA 3arch/arm/include/asm/arch-sunxi/i2c.h +13
-0@@ -9,6 +9,19 @@#include <asm/arch/cpu.h> #define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE +#ifdef CONFIG_I2C1_ENABLE +#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE +#endif +#ifdef CONFIG_I2C2_ENABLE +#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_TWI2_BASE +#endif +#ifdef CONFIG_I2C3_ENABLE +#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE +#endif +#ifdef CONFIG_I2C4_ENABLE +#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE +#endif +/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */ #define CONFIG_SYS_TCLK 24000000board/sunxi/Kconfig +20
-0@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins, enabling + its clock and setting up the bus. This is especially useful on devices + with slaves connected to the bus or with pins exposed through e.g. an + expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help---
board/sunxi/Kconfig config USB2_VBUS_PIN · line 301
Quoted 10 lines
board/sunxi/Kconfig +10
-0+ See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLE + bool "Enable I2C/TWI controller 4" + default n + ---help--- + See I2C1_ENABLE help text. +endif
It seems wrong to me to add these when they are already in the device tree for the board. Can we not use that? If you would rather wait until we have driver model I2C on sunxi (mvtwsi, I think) then I'd be happy to do the conversion. It's pretty easy.
How can we get sunxi moved over before there is an explosion of these sorts of things (as we have already seen with video options)?
Quoted 92 lines
board/sunxi/Kconfig +1
-0+ config VIDEO boolean "Enable graphical uboot console on HDMI, LCD or VGA" default yboard/sunxi/board.c +73
-3@@ -276,9 +276,80 @@ int board_mmc_init(bd_t *bis)void i2c_init_board (void ) { -sunxi_gpio_set_cfgpin (SUNXI_GPB (0 ),SUNXI_GPB_TWI0 ); -sunxi_gpio_set_cfgpin (SUNXI_GPB (1 ),SUNXI_GPB_TWI0 ); +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN5I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (0 ),SUN4I_GPB_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (1 ),SUN4I_GPB_TWI0 );clock_twi_onoff (0 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (14 ),SUN6I_GPH_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (15 ),SUN6I_GPH_TWI0 ); +clock_twi_onoff (0 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (2 ),SUN8I_GPH_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (3 ),SUN8I_GPH_TWI0 ); +clock_twi_onoff (0 ,1 ); +#endif + +#ifdef CONFIG_I2C1_ENABLE +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (18 ),SUN4I_GPB_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (19 ),SUN4I_GPB_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN5I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (15 ),SUN5I_GPB_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (16 ),SUN5I_GPB_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (16 ),SUN6I_GPH_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (17 ),SUN6I_GPH_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (4 ),SUN8I_GPH_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (5 ),SUN8I_GPH_TWI1 ); +clock_twi_onoff (1 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C2_ENABLE +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (20 ),SUN4I_GPB_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (21 ),SUN4I_GPB_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN5I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (17 ),SUN5I_GPB_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (18 ),SUN5I_GPB_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (18 ),SUN6I_GPH_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (19 ),SUN6I_GPH_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPE (12 ),SUN8I_GPE_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPE (13 ),SUN8I_GPE_TWI2 ); +clock_twi_onoff (2 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C3_ENABLE +#if defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPG (10 ),SUN6I_GPG_TWI3 ); +sunxi_gpio_set_cfgpin (SUNXI_GPG (11 ),SUN6I_GPG_TWI3 ); +clock_twi_onoff (3 ,1 ); +#elif defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPI (0 ),SUN7I_GPI_TWI3 ); +sunxi_gpio_set_cfgpin (SUNXI_GPI (1 ),SUN7I_GPI_TWI3 ); +clock_twi_onoff (3 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C4_ENABLE +#if defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPI (2 ),SUN7I_GPI_TWI4 ); +sunxi_gpio_set_cfgpin (SUNXI_GPI (3 ),SUN7I_GPI_TWI4 ); +clock_twi_onoff (4 ,1 ); +#endif +#endif +#if definedCONFIG_VIDEO_LCD_PANEL_I2C && !(definedCONFIG_SPL_BUILD ) soft_i2c_gpio_sda =sunxi_name_to_gpio (CONFIG_VIDEO_LCD_PANEL_I2C_SDA ); soft_i2c_gpio_scl =sunxi_name_to_gpio (CONFIG_VIDEO_LCD_PANEL_I2C_SCL ); --
Quoted 1 line
1.9.1
Regards,
Simon
PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
Le dimanche 05 avril 2015 ? 12:31 -0600, Simon Glass a ?crit :
Quoted 138 lines
Hi Paul,
Quoted 135 lines · Paul Kocialkowski
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers.
Signed-off-by Paul Kocialkowski <[email protected]>--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +7
-0@@ -94,6 +94,13 @@#define SUNXI_TWI0_BASE 0x01c2ac00#define SUNXI_TWI1_BASE 0x01c2b000#define SUNXI_TWI2_BASE 0x01c2b400 +#ifdef CONFIG_MACH_SUN6I +#define SUNXI_TWI3_BASE 0x01c0b800 +#endif +#ifdef CONFIG_MACH_SUN7I +#define SUNXI_TWI3_BASE 0x01c2b800 +#define SUNXI_TWI4_BASE 0x01c2c000 +#endif #define SUNXI_CAN_BASE 0x01c2bc00arch/arm/include/asm/arch-sunxi/gpio.h +14
-1@@ -148,7 +148,11 @@ enum sunxi_gpio_number {#define SUN6I_GPA_SDC2 5#define SUN6I_GPA_SDC3 4 -#define SUNXI_GPB_TWI0 2 +#define SUN4I_GPB_TWI0 2 +#define SUN4I_GPB_TWI1 2 +#define SUN5I_GPB_TWI1 2 +#define SUN4I_GPB_TWI2 2 +#define SUN5I_GPB_TWI2 2#define SUN4I_GPB_UART0 2#define SUN5I_GPB_UART0 2@@ -160,6 +164,7 @@ enum sunxi_gpio_number {#define SUNXI_GPD_LVDS0 3#define SUN5I_GPE_SDC2 3 +#define SUN8I_GPE_TWI2 3#define SUNXI_GPF_SDC0 2#define SUNXI_GPF_UART0 4@@ -169,12 +174,20 @@ enum sunxi_gpio_number {#define SUN5I_GPG_SDC1 2#define SUN6I_GPG_SDC1 2#define SUN8I_GPG_SDC1 2 +#define SUN6I_GPG_TWI3 2#define SUN5I_GPG_UART1 4#define SUN4I_GPH_SDC1 5 +#define SUN6I_GPH_TWI0 2 +#define SUN8I_GPH_TWI0 2 +#define SUN6I_GPH_TWI1 2 +#define SUN8I_GPH_TWI1 2 +#define SUN6I_GPH_TWI2 2#define SUN6I_GPH_UART0 2#define SUNXI_GPI_SDC3 2 +#define SUN7I_GPI_TWI3 3 +#define SUN7I_GPI_TWI4 3#define SUN6I_GPL0_R_P2WI_SCK 3#define SUN6I_GPL1_R_P2WI_SDA 3arch/arm/include/asm/arch-sunxi/i2c.h +13
-0@@ -9,6 +9,19 @@#include <asm/arch/cpu.h> #define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE +#ifdef CONFIG_I2C1_ENABLE +#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE +#endif +#ifdef CONFIG_I2C2_ENABLE +#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_TWI2_BASE +#endif +#ifdef CONFIG_I2C3_ENABLE +#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE +#endif +#ifdef CONFIG_I2C4_ENABLE +#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE +#endif +/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */ #define CONFIG_SYS_TCLK 24000000board/sunxi/Kconfig +25
-0@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins, enabling + its clock and setting up the bus. This is especially useful on devices + with slaves connected to the bus or with pins exposed through e.g. an + expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLE
Quoted 8 lines
board/sunxi/Kconfig config USB2_VBUS_PIN · line 301
Quoted 5 lines
board/sunxi/Kconfig +5
-0+ bool "Enable I2C/TWI controller 4" + default n + ---help--- + See I2C1_ENABLE help text. +endifIt seems wrong to me to add these when they are already in the device tree for the board. Can we not use that?
Well, Hans has a point when saying that some users may use those pins as GPIO while some others may use the TWI/I2C functions, so it makes sense to make this configurable via Kconfig instead of being statically defined.
Quoted 3 lines
If you would rather wait until we have driver model I2C on sunxi (mvtwsi, I think) then I'd be happy to do the conversion. It's pretty easy.
I would be happy to see U-Boot on sunxi use devicetree and driver model for TWI/I2C as well (provided users can still configure what busses to enable). Still, I'd like to see this getting merged as a short term solution.
Quoted 2 lines
How can we get sunxi moved over before there is an explosion of these sorts of things (as we have already seen with video options)?
I think Hans will know better (than myself) how to do this right.
Quoted 88 lines
Quoted 88 lines
board/sunxi/Kconfig +1
-0+ config VIDEO boolean "Enable graphical uboot console on HDMI, LCD or VGA" default yboard/sunxi/board.c +73
-2@@ -276,9 +276,80 @@ int board_mmc_init(bd_t *bis)void i2c_init_board (void ) { -sunxi_gpio_set_cfgpin (SUNXI_GPB (0 ),SUNXI_GPB_TWI0 ); -sunxi_gpio_set_cfgpin (SUNXI_GPB (1 ),SUNXI_GPB_TWI0 ); +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN5I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (0 ),SUN4I_GPB_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (1 ),SUN4I_GPB_TWI0 );clock_twi_onoff (0 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (14 ),SUN6I_GPH_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (15 ),SUN6I_GPH_TWI0 ); +clock_twi_onoff (0 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (2 ),SUN8I_GPH_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (3 ),SUN8I_GPH_TWI0 ); +clock_twi_onoff (0 ,1 ); +#endif + +#ifdef CONFIG_I2C1_ENABLE +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (18 ),SUN4I_GPB_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (19 ),SUN4I_GPB_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN5I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (15 ),SUN5I_GPB_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (16 ),SUN5I_GPB_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (16 ),SUN6I_GPH_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (17 ),SUN6I_GPH_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (4 ),SUN8I_GPH_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (5 ),SUN8I_GPH_TWI1 ); +clock_twi_onoff (1 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C2_ENABLE +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (20 ),SUN4I_GPB_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (21 ),SUN4I_GPB_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN5I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (17 ),SUN5I_GPB_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (18 ),SUN5I_GPB_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (18 ),SUN6I_GPH_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (19 ),SUN6I_GPH_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPE (12 ),SUN8I_GPE_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPE (13 ),SUN8I_GPE_TWI2 ); +clock_twi_onoff (2 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C3_ENABLE +#if defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPG (10 ),SUN6I_GPG_TWI3 ); +sunxi_gpio_set_cfgpin (SUNXI_GPG (11 ),SUN6I_GPG_TWI3 ); +clock_twi_onoff (3 ,1 ); +#elif defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPI (0 ),SUN7I_GPI_TWI3 ); +sunxi_gpio_set_cfgpin (SUNXI_GPI (1 ),SUN7I_GPI_TWI3 ); +clock_twi_onoff (3 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C4_ENABLE +#if defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPI (2 ),SUN7I_GPI_TWI4 ); +sunxi_gpio_set_cfgpin (SUNXI_GPI (3 ),SUN7I_GPI_TWI4 ); +clock_twi_onoff (4 ,1 ); +#endif +#endif +
Quoted 8 lines
Quoted 5 lines
board/sunxi/board.c +0
-1#if definedCONFIG_VIDEO_LCD_PANEL_I2C && !(definedCONFIG_SPL_BUILD ) soft_i2c_gpio_sda =sunxi_name_to_gpio (CONFIG_VIDEO_LCD_PANEL_I2C_SDA ); soft_i2c_gpio_scl =sunxi_name_to_gpio (CONFIG_VIDEO_LCD_PANEL_I2C_SCL ); --1.9.1
Regards,
Simon
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PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
Hi Paul,
Quoted 148 lines · Paul Kocialkowski
Le dimanche 05 avril 2015 ? 12:31 -0600, Simon Glass a ?crit :
Quoted 138 lines
Hi Paul,
Quoted 135 lines · Paul Kocialkowski
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers.
Signed-off-by Paul Kocialkowski <[email protected]>--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +7
-0@@ -94,6 +94,13 @@#define SUNXI_TWI0_BASE 0x01c2ac00#define SUNXI_TWI1_BASE 0x01c2b000#define SUNXI_TWI2_BASE 0x01c2b400 +#ifdef CONFIG_MACH_SUN6I +#define SUNXI_TWI3_BASE 0x01c0b800 +#endif +#ifdef CONFIG_MACH_SUN7I +#define SUNXI_TWI3_BASE 0x01c2b800 +#define SUNXI_TWI4_BASE 0x01c2c000 +#endif #define SUNXI_CAN_BASE 0x01c2bc00arch/arm/include/asm/arch-sunxi/gpio.h +14
-1@@ -148,7 +148,11 @@ enum sunxi_gpio_number {#define SUN6I_GPA_SDC2 5#define SUN6I_GPA_SDC3 4 -#define SUNXI_GPB_TWI0 2 +#define SUN4I_GPB_TWI0 2 +#define SUN4I_GPB_TWI1 2 +#define SUN5I_GPB_TWI1 2 +#define SUN4I_GPB_TWI2 2 +#define SUN5I_GPB_TWI2 2#define SUN4I_GPB_UART0 2#define SUN5I_GPB_UART0 2@@ -160,6 +164,7 @@ enum sunxi_gpio_number {#define SUNXI_GPD_LVDS0 3#define SUN5I_GPE_SDC2 3 +#define SUN8I_GPE_TWI2 3#define SUNXI_GPF_SDC0 2#define SUNXI_GPF_UART0 4@@ -169,12 +174,20 @@ enum sunxi_gpio_number {#define SUN5I_GPG_SDC1 2#define SUN6I_GPG_SDC1 2#define SUN8I_GPG_SDC1 2 +#define SUN6I_GPG_TWI3 2#define SUN5I_GPG_UART1 4#define SUN4I_GPH_SDC1 5 +#define SUN6I_GPH_TWI0 2 +#define SUN8I_GPH_TWI0 2 +#define SUN6I_GPH_TWI1 2 +#define SUN8I_GPH_TWI1 2 +#define SUN6I_GPH_TWI2 2#define SUN6I_GPH_UART0 2#define SUNXI_GPI_SDC3 2 +#define SUN7I_GPI_TWI3 3 +#define SUN7I_GPI_TWI4 3#define SUN6I_GPL0_R_P2WI_SCK 3#define SUN6I_GPL1_R_P2WI_SDA 3arch/arm/include/asm/arch-sunxi/i2c.h +13
-0@@ -9,6 +9,19 @@#include <asm/arch/cpu.h> #define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE +#ifdef CONFIG_I2C1_ENABLE +#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE +#endif +#ifdef CONFIG_I2C2_ENABLE +#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_TWI2_BASE +#endif +#ifdef CONFIG_I2C3_ENABLE +#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE +#endif +#ifdef CONFIG_I2C4_ENABLE +#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE +#endif +/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */ #define CONFIG_SYS_TCLK 24000000board/sunxi/Kconfig +25
-0@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins, enabling + its clock and setting up the bus. This is especially useful on devices + with slaves connected to the bus or with pins exposed through e.g. an + expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLEQuoted 8 lines
board/sunxi/Kconfig config USB2_VBUS_PIN · line 301
Quoted 5 lines
board/sunxi/Kconfig +5
-0+ bool "Enable I2C/TWI controller 4" + default n + ---help--- + See I2C1_ENABLE help text. +endifIt seems wrong to me to add these when they are already in the device tree for the board. Can we not use that?
Quoted 4 lines
Well, Hans has a point when saying that some users may use those pins as GPIO while some others may use the TWI/I2C functions, so it makes sense to make this configurable via
Kconfiginstead of being statically defined.
I don't see the device tree as static in the sense that people can modify it or create their own just as with Kconfig.
Quoted 9 lines
Quoted 4 lines
If you would rather wait until we have driver model I2C on sunxi (mvtwsi, I think) then I'd be happy to do the conversion. It's pretty easy.
I would be happy to see U-Boot on sunxi use devicetree and driver model for TWI/I2C as well (provided users can still configure what busses to enable). Still, I'd like to see this getting merged as a short term solution.
I did some initial work here (pcDuino3) so it should be easy enough to use it more widely.
The problem with the short term solution is that it's unclear when it gets revisited. I'd like to see this tidied up rather than creating additional debt for someone to unpick. It is actually quite hard to make these sort of changes.
Quoted 5 lines
Quoted 3 lines
How can we get sunxi moved over before there is an explosion of these sorts of things (as we have already seen with video options)?
I think Hans will know better (than myself) how to do this right.
In this case we could add a function like
int funcmux_setup_i2c(enum periph_id id)
which sets the I2C pins up for the specified I2C port. Then you can call this when probing the relevant I2C port.
Quoted 85 lines
Quoted 85 lines
Quoted 85 lines
board/sunxi/Kconfig +1
-0+ config VIDEO boolean "Enable graphical uboot console on HDMI, LCD or VGA" default yboard/sunxi/board.c +69
-2@@ -276,9 +276,80 @@ int board_mmc_init(bd_t *bis)void i2c_init_board (void ) { -sunxi_gpio_set_cfgpin (SUNXI_GPB (0 ),SUNXI_GPB_TWI0 ); -sunxi_gpio_set_cfgpin (SUNXI_GPB (1 ),SUNXI_GPB_TWI0 ); +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN5I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (0 ),SUN4I_GPB_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (1 ),SUN4I_GPB_TWI0 );clock_twi_onoff (0 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (14 ),SUN6I_GPH_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (15 ),SUN6I_GPH_TWI0 ); +clock_twi_onoff (0 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (2 ),SUN8I_GPH_TWI0 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (3 ),SUN8I_GPH_TWI0 ); +clock_twi_onoff (0 ,1 ); +#endif + +#ifdef CONFIG_I2C1_ENABLE +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (18 ),SUN4I_GPB_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (19 ),SUN4I_GPB_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN5I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (15 ),SUN5I_GPB_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (16 ),SUN5I_GPB_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (16 ),SUN6I_GPH_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (17 ),SUN6I_GPH_TWI1 ); +clock_twi_onoff (1 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (4 ),SUN8I_GPH_TWI1 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (5 ),SUN8I_GPH_TWI1 ); +clock_twi_onoff (1 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C2_ENABLE +#if defined(CONFIG_MACH_SUN4I ) || defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (20 ),SUN4I_GPB_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (21 ),SUN4I_GPB_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN5I ) +sunxi_gpio_set_cfgpin (SUNXI_GPB (17 ),SUN5I_GPB_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPB (18 ),SUN5I_GPB_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPH (18 ),SUN6I_GPH_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPH (19 ),SUN6I_GPH_TWI2 ); +clock_twi_onoff (2 ,1 ); +#elif defined(CONFIG_MACH_SUN8I ) +sunxi_gpio_set_cfgpin (SUNXI_GPE (12 ),SUN8I_GPE_TWI2 ); +sunxi_gpio_set_cfgpin (SUNXI_GPE (13 ),SUN8I_GPE_TWI2 ); +clock_twi_onoff (2 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C3_ENABLE +#if defined(CONFIG_MACH_SUN6I ) +sunxi_gpio_set_cfgpin (SUNXI_GPG (10 ),SUN6I_GPG_TWI3 ); +sunxi_gpio_set_cfgpin (SUNXI_GPG (11 ),SUN6I_GPG_TWI3 ); +clock_twi_onoff (3 ,1 ); +#elif defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPI (0 ),SUN7I_GPI_TWI3 ); +sunxi_gpio_set_cfgpin (SUNXI_GPI (1 ),SUN7I_GPI_TWI3 ); +clock_twi_onoff (3 ,1 ); +#endif +#endif + +#ifdef CONFIG_I2C4_ENABLE +#if defined(CONFIG_MACH_SUN7I ) +sunxi_gpio_set_cfgpin (SUNXI_GPI (2 ),SUN7I_GPI_TWI4 ); +sunxi_gpio_set_cfgpin (SUNXI_GPI (3 ),SUN7I_GPI_TWI4 );
Quoted 8 lines
Quoted 8 lines
board/sunxi/board.c int board_mmc_init(bd_t *bis)
Quoted 8 lines
board/sunxi/board.c +4
-1+clock_twi_onoff (4 ,1 ); +#endif +#endif +#if definedCONFIG_VIDEO_LCD_PANEL_I2C && !(definedCONFIG_SPL_BUILD ) soft_i2c_gpio_sda =sunxi_name_to_gpio (CONFIG_VIDEO_LCD_PANEL_I2C_SDA ); soft_i2c_gpio_scl =sunxi_name_to_gpio (CONFIG_VIDEO_LCD_PANEL_I2C_SCL ); --
Regards,
Simon
PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
In reply to Paul KocialkowskiHi Simon and Paul,
Quoted 18 lines · Paul Kocialkowski
Le dimanche 05 avril 2015 ? 12:31 -0600, Simon Glass a ?crit :
Quoted 17 lines
Hi Paul,
Quoted 14 lines · Paul Kocialkowski
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers.
Signed-off-by Paul Kocialkowski <[email protected]>--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)
<snip>
Quoted 47 lines
Quoted 33 lines
Quoted 33 lines
board/sunxi/Kconfig +25
-0@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins, enabling + its clock and setting up the bus. This is especially useful on devices + with slaves connected to the bus or with pins exposed through e.g. an + expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLEQuoted 8 lines
board/sunxi/Kconfig config USB2_VBUS_PIN · line 301
Quoted 5 lines
board/sunxi/Kconfig +5
-0+ bool "Enable I2C/TWI controller 4" + default n + ---help--- + See I2C1_ENABLE help text. +endifIt seems wrong to me to add these when they are already in the device tree for the board. Can we not use that?
Well, Hans has a point when saying that some users may use those pins as GPIO while some others may use the TWI/I2C functions, so it makes sense to make this configurable via
Kconfiginstead of being statically defined.
Quoted 11 lines
Quoted 3 lines
If you would rather wait until we have driver model I2C on sunxi (mvtwsi, I think) then I'd be happy to do the conversion. It's pretty easy.
I would be happy to see U-Boot on sunxi use devicetree and driver model for TWI/I2C as well (provided users can still configure what busses to enable). Still, I'd like to see this getting merged as a short term solution.
Quoted 2 lines
How can we get sunxi moved over before there is an explosion of these sorts of things (as we have already seen with video options)?
I fully support moving sunxi over the devicemodel + devicetree in my mind the following steps need to be taken:
0) Get the devicemode usb patches merged in to u-boot-dm/next Then on top pf u-boot-dm/next:
1) Move all the sunxi boards over to use dm + dt like we're already doing for the pcduino
2) Start using dm for usb on sunxi
3) Enable ohci support on sunxi boards next to ehci
4) Move other stuff over on a step by step basis
Note that we will likely have a mix of Kconfig + devicetree for quite a while though since certain things which we support in u-boot are not supported in the kernel yet so they do not have stable devicetree bindings yet, video being the big one here.
Quoted 1 line
I think Hans will know better (than myself) how to do this right.
Not really, other then having the the generic outline above in my head, I do not really have much experience with the devicemodel in u-boot yet, also I do not have all that much time to work one this, so help on this from you would certainly be very welcome. I can answer any sunxi questions you may have, and I believe it is safe to say that Simon can answer any device-model questions you may have.
Regards,
Hans
p.s.
Paul I'm still fine with taking your i2c patchset upstream for now, but I do agree with Simon that we need to move to the device model and the sooner we do that the better.
PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
Hi,
Quoted 98 lines · Hans de Goede
Hi Simon and Paul,
Quoted 25 lines · Paul Kocialkowski
Le dimanche 05 avril 2015 ? 12:31 -0600, Simon Glass a ?crit :
Quoted 23 lines
Hi Paul,
Quoted 19 lines · Paul Kocialkowski
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms
even have up to 5. This adds support for every controller on each supported
platform, which is especially useful when using expansion ports on single-board-
computers.Signed-off-by Paul Kocialkowski <[email protected]>--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)<snip>
Quoted 57 lines
Quoted 37 lines
Quoted 37 lines
board/sunxi/Kconfig +5
-0@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins,enabling
+ its clock and setting up the bus. This is especially useful on
devices
+ with slaves connected to the bus or with pins exposed through
e.g. anboard/sunxi/Kconfig +19
-0+ expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLE + bool "Enable I2C/TWI controller 4"Quoted 8 lines
board/sunxi/Kconfig config USB2_VBUS_PIN · line 293
Quoted 4 lines
board/sunxi/Kconfig +4
-0+ default n + ---help--- + See I2C1_ENABLE help text. +endifIt seems wrong to me to add these when they are already in the device tree for the board. Can we not use that?
Well, Hans has a point when saying that some users may use those pins as GPIO while some others may use the TWI/I2C functions, so it makes sense to make this configurable via
Kconfiginstead of being statically defined.Quoted 3 lines
If you would rather wait until we have driver model I2C on sunxi (mvtwsi, I think) then I'd be happy to do the conversion. It's pretty easy.
Quoted 7 lines
I would be happy to see U-Boot on sunxi use devicetree and driver model for TWI/I2C as well (provided users can still configure what busses to enable). Still, I'd like to see this getting merged as a short term solution.
Quoted 2 lines
How can we get sunxi moved over before there is an explosion of these sorts of things (as we have already seen with video options)?
Quoted 8 lines
I fully support moving sunxi over the devicemodel + devicetree in my mind the following steps need to be taken:
0) Get the devicemode usb patches merged in to u-boot-dm/next Then on top pf u-boot-dm/next:
1) Move all the sunxi boards over to use dm + dt like we're already doing for the pcduino
This could be a bit tricky unless someone has all the boards. I suppose if we do it at the very start of the merge window and then we have time to fix any problems.
Quoted 4 lines
2) Start using dm for usb on sunxi
3) Enable ohci support on sunxi boards next to ehci
That's not currently supported, but I could perhaps take a look at it.
Quoted 7 lines
4) Move other stuff over on a step by step basis
Note that we will likely have a mix of
Kconfig+ devicetree for quite a while though since certain things which we support in u-boot are not supported in the kernel yet so they do not have stable devicetree bindings yet, video being the big one here.
Yes that makes things tricky.
Quoted 13 lines
Quoted 2 lines
I think Hans will know better (than myself) how to do this right.
Not really, other then having the the generic outline above in my head, I do not really have much experience with the devicemodel in u-boot yet, also I do not have all that much time to work one this, so help on this from you would certainly be very welcome. I can answer any sunxi questions you may have, and I believe it is safe to say that Simon can answer any device-model questions you may have.
Regards,
Quoted 7 lines
Hans
p.s.
Paul I'm still fine with taking your i2c patchset upstream for now, but I do agree with Simon that we need to move to the device model and the sooner we do that the better.
Yes - the problem is that no one person can pay the 'tax' of moving over, so we need to try to spread the effort on individuals who send patches...
Regards,
Simon
PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
Hi,
Quoted 107 lines · Simon Glass
Hi,
Quoted 104 lines · Hans de Goede
Hi Simon and Paul,
Quoted 25 lines · Paul Kocialkowski
Le dimanche 05 avril 2015 ? 12:31 -0600, Simon Glass a ?crit :
Quoted 23 lines
Hi Paul,
Quoted 19 lines · Paul Kocialkowski
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms
even have up to 5. This adds support for every controller on each supported
platform, which is especially useful when using expansion ports on single-board-
computers.Signed-off-by Paul Kocialkowski <[email protected]>--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)<snip>
Quoted 57 lines
Quoted 37 lines
Quoted 37 lines
board/sunxi/Kconfig +5
-0@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins,enabling
+ its clock and setting up the bus. This is especially useful on
devices
+ with slaves connected to the bus or with pins exposed through
e.g. anboard/sunxi/Kconfig +19
-0+ expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLE + bool "Enable I2C/TWI controller 4"Quoted 8 lines
board/sunxi/Kconfig config USB2_VBUS_PIN · line 293
Quoted 4 lines
board/sunxi/Kconfig +4
-0+ default n + ---help--- + See I2C1_ENABLE help text. +endifIt seems wrong to me to add these when they are already in the device tree for the board. Can we not use that?
Well, Hans has a point when saying that some users may use those pins as GPIO while some others may use the TWI/I2C functions, so it makes sense to make this configurable via
Kconfiginstead of being statically defined.Quoted 3 lines
If you would rather wait until we have driver model I2C on sunxi (mvtwsi, I think) then I'd be happy to do the conversion. It's pretty easy.
Quoted 7 lines
I would be happy to see U-Boot on sunxi use devicetree and driver model for TWI/I2C as well (provided users can still configure what busses to enable). Still, I'd like to see this getting merged as a short term solution.
Quoted 2 lines
How can we get sunxi moved over before there is an explosion of these sorts of things (as we have already seen with video options)?
I fully support moving sunxi over the devicemodel + devicetree in my mind the following steps need to be taken:
0) Get the devicemode usb patches merged in to u-boot-dm/next Then on top pf u-boot-dm/next:
Quoted 6 lines
Quoted 2 lines
1) Move all the sunxi boards over to use dm + dt like we're already doing for the pcduino
This could be a bit tricky unless someone has all the boards. I suppose if we do it at the very start of the merge window and then we have time to fix any problems.
If you look at:
board/sunxi/MAINTAINERS
And then the large block at the top, that lists the 30+ boards I've, or at least it lists all the boards for which I've added support to upstream u-boot I still have a couple which I need to add ...
Anyways, I should be able to test this on say 2 boards of each soc generation, which should shake out most (if not all) bugs. The limit here is not hardware access but how much time I want to spend on testing :)
Quoted 5 lines
Quoted 3 lines
2) Start using dm for usb on sunxi
3) Enable ohci support on sunxi boards next to ehci
That's not currently supported, but I could perhaps take a look at it.
Correct, but it is desirable so that plugging in a usb keyboard directly (without a usb-2 hub between the board and the keyboard) will work.
Quoted 26 lines
Quoted 6 lines
4) Move other stuff over on a step by step basis
Note that we will likely have a mix of
Kconfig+ devicetree for quite a while though since certain things which we support in u-boot are not supported in the kernel yet so they do not have stable devicetree bindings yet, video being the big one here.Yes that makes things tricky.
Quoted 17 lines
Quoted 2 lines
I think Hans will know better (than myself) how to do this right.
Not really, other then having the the generic outline above in my head, I do not really have much experience with the devicemodel in u-boot yet, also I do not have all that much time to work one this, so help on this from you would certainly be very welcome. I can answer any sunxi questions you may have, and I believe it is safe to say that Simon can answer any device-model questions you may have.
Regards,
Hans
p.s.
Quoted 7 lines
Quoted 3 lines
Paul I'm still fine with taking your i2c patchset upstream for now, but I do agree with Simon that we need to move to the device model and the sooner we do that the better.
Yes - the problem is that no one person can pay the 'tax' of moving over, so we need to try to spread the effort on individuals who send patches...
Not sure what you mean by paying the 'tax' here, I'm hoping that with the groundwork you've done moving over other boards becomes a pretty mechanical process, other then the testing.
If someone can provide me with a git tree / branch with all boards converted I can spend a couple of saturdays / sundays / evenings on testing, picking boards which I know will exercise different code paths.
Regards,
Hans
PATCH v2 2/3 sunxi: Complete i2c support for each supported platform
Hi Hans,
Quoted 146 lines · Hans de Goede
Hi,
Quoted 116 lines · Simon Glass
Hi,
Quoted 112 lines · Hans de Goede
Hi Simon and Paul,
Quoted 28 lines · Paul Kocialkowski
Le dimanche 05 avril 2015 ? 12:31 -0600, Simon Glass a ?crit :
Quoted 25 lines
Hi Paul,
Quoted 20 lines · Paul Kocialkowski
Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms
even have up to 5. This adds support for every controller on each supported
platform, which is especially useful when using expansion ports on single-board-
computers.Signed-off-by Paul Kocialkowski <[email protected]>--- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 15 +++++- arch/arm/include/asm/arch-sunxi/i2c.h | 13 +++++ board/sunxi/Kconfig | 31 ++++++++++++ board/sunxi/board.c | 75 ++++++++++++++++++++++++++++- 5 files changed, 138 insertions(+), 3 deletions(-)<snip>
Quoted 60 lines
Quoted 38 lines
Quoted 38 lines
board/sunxi/Kconfig +5
-0@@ -269,6 +269,37 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config I2C1_ENABLE + bool "Enable I2C/TWI controller 1" + default n + ---help--- + This allows enabling I2C/TWI controller 1 by muxing its pins,enabling
+ its clock and setting up the bus. This is especially useful on
devices
+ with slaves connected to the bus or with pins exposed through
e.g. anboard/sunxi/Kconfig +20
-0+ expansion port/header. + +config I2C2_ENABLE + bool "Enable I2C/TWI controller 2" + default n + ---help--- + See I2C1_ENABLE help text. + +if MACH_SUN6I || MACH_SUN7I +config I2C3_ENABLE + bool "Enable I2C/TWI controller 3" + default n + ---help--- + See I2C1_ENABLE help text. +endif + +if MACH_SUN7I +config I2C4_ENABLE + bool "Enable I2C/TWI controller 4" + default nQuoted 8 lines
board/sunxi/Kconfig config USB2_VBUS_PIN · line 293
Quoted 3 lines
board/sunxi/Kconfig +3
-0+ ---help--- + See I2C1_ENABLE help text. +endifIt seems wrong to me to add these when they are already in the device tree for the board. Can we not use that?
Well, Hans has a point when saying that some users may use those pins as GPIO while some others may use the TWI/I2C functions, so it makes sense to make this configurable via
Kconfiginstead of being statically defined.Quoted 3 lines
If you would rather wait until we have driver model I2C on sunxi (mvtwsi, I think) then I'd be happy to do the conversion. It's pretty easy.
Quoted 7 lines
I would be happy to see U-Boot on sunxi use devicetree and driver model for TWI/I2C as well (provided users can still configure what busses to enable). Still, I'd like to see this getting merged as a short term solution.
Quoted 2 lines
How can we get sunxi moved over before there is an explosion of these sorts of things (as we have already seen with video options)?
I fully support moving sunxi over the devicemodel + devicetree in my mind the following steps need to be taken:
0) Get the devicemode usb patches merged in to u-boot-dm/next Then on top pf u-boot-dm/next:
Quoted 7 lines
Quoted 2 lines
1) Move all the sunxi boards over to use dm + dt like we're already doing for the pcduino
This could be a bit tricky unless someone has all the boards. I suppose if we do it at the very start of the merge window and then we have time to fix any problems.
If you look at:
board/sunxi/MAINTAINERSAnd then the large block at the top, that lists the 30+ boards I've, or at least it lists all the boards for which I've added support to upstream u-boot I still have a couple which I need to add ...
Anyways, I should be able to test this on say 2 boards of each soc generation, which should shake out most (if not all) bugs. The limit here is not hardware access but how much time I want to spend on testing :)
Quoted 5 lines
Quoted 3 lines
2) Start using dm for usb on sunxi
3) Enable ohci support on sunxi boards next to ehci
Quoted 6 lines
Quoted 1 line
That's not currently supported, but I could perhaps take a look at it.
Correct, but it is desirable so that plugging in a usb keyboard directly (without a usb-2 hub between the board and the keyboard) will work.
OK. I'm hoping that someone else can work on the OHCI conversion.
Quoted 34 lines
Quoted 34 lines
Quoted 7 lines
4) Move other stuff over on a step by step basis
Note that we will likely have a mix of
Kconfig+ devicetree for quite a while though since certain things which we support in u-boot are not supported in the kernel yet so they do not have stable devicetree bindings yet, video being the big one here.Yes that makes things tricky.
Quoted 21 lines
Quoted 2 lines
I think Hans will know better (than myself) how to do this right.
Not really, other then having the the generic outline above in my head, I do not really have much experience with the devicemodel in u-boot yet, also I do not have all that much time to work one this, so help on this from you would certainly be very welcome. I can answer any sunxi questions you may have, and I believe it is safe to say that Simon can answer any device-model questions you may have.
Regards,
Hans
p.s.
Paul I'm still fine with taking your i2c patchset upstream for now, but I do agree with Simon that we need to move to the device model and the sooner we do that the better.
Quoted 8 lines
Quoted 3 lines
Yes - the problem is that no one person can pay the 'tax' of moving over, so we need to try to spread the effort on individuals who send patches...
Not sure what you mean by paying the 'tax' here, I'm hoping that with the groundwork you've done moving over other boards becomes a pretty mechanical process, other then the testing.
I mean that every new board that uses the old config method adds conversion work, and makes it harder to move things over. So the 'tax' is trying to get people who submit patches for new boards to move over a few existing boards. They put a little bit more effort in to get their patch applied, but help the overall effort.
Quoted 5 lines
If someone can provide me with a git tree / branch with all boards converted I can spend a couple of saturdays / sundays / evenings on testing, picking boards which I know will exercise different code paths.
Regards,
Simon
PATCH v2 3/3 sunxi: I2C/TWI configs for a few single-board-computers
In reply to Paul KocialkowskiThis enables the exposed I2C/TWI busses on a few single-board-computers (Olimex and Cubieboard).
--- configs/A10-OLinuXino-Lime_defconfig | 2 ++ configs/A10s-OLinuXino-M_defconfig | 2 ++ configs/A13-OLinuXinoM_defconfig | 2 ++ configs/A13-OLinuXino_defconfig | 2 ++ configs/A20-OLinuXino-Lime2_defconfig | 2 ++ configs/A20-OLinuXino-Lime_defconfig | 2 ++ configs/A20-OLinuXino_MICRO_defconfig | 2 ++ configs/Cubieboard2_defconfig | 1 + configs/Cubieboard_defconfig | 1 + 9 files changed, 16 insertions(+)
configs/A10-OLinuXino-Lime_defconfig +2 -0
@@ -1,6 +1,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" CONFIG_FDTFILE="sun4i-a10-olinuxino-lime.dtb" +CONFIG_I2C1_ENABLE=y +CONFIG_I2C2_ENABLE=y CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y
configs/A10s-OLinuXino-M_defconfig +2 -0
@@ -5,6 +5,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_MMC0_CD_PIN="PG1" CONFIG_MMC1_CD_PIN="PG13" +CONFIG_I2C1_ENABLE=y +CONFIG_I2C2_ENABLE=y CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN5I=y
configs/A13-OLinuXinoM_defconfig +2 -0
@@ -2,6 +2,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,USB_EHCI" CONFIG_FDTFILE="sun5i-a13-olinuxino-micro.dtb" CONFIG_USB1_VBUS_PIN="PG11" +CONFIG_I2C1_ENABLE=y +CONFIG_I2C2_ENABLE=y CONFIG_VIDEO_HDMI=n CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
configs/A13-OLinuXino_defconfig +2 -0
@@ -2,6 +2,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,USB_EHCI" CONFIG_FDTFILE="sun5i-a13-olinuxino.dtb" CONFIG_USB1_VBUS_PIN="PG11" +CONFIG_I2C1_ENABLE=y +CONFIG_I2C2_ENABLE=y CONFIG_VIDEO_HDMI=n CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
configs/A20-OLinuXino-Lime2_defconfig +2 -0
@@ -4,6 +4,8 @@ CONFIG_FDTFILE="sun7i-a20-olinuxino-lime2.dtb" CONFIG_MMC0_CD_PIN="PH1" CONFIG_USB0_VBUS_PIN="PC17" CONFIG_USB0_VBUS_DET="PH5" +CONFIG_I2C1_ENABLE=y +CONFIG_I2C2_ENABLE=y CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN7I=y
configs/A20-OLinuXino-Lime_defconfig +2 -0
@@ -1,6 +1,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" CONFIG_FDTFILE="sun7i-a20-olinuxino-lime.dtb" +CONFIG_I2C1_ENABLE=y +CONFIG_I2C2_ENABLE=y CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN7I=y
configs/A20-OLinuXino_MICRO_defconfig +2 -0
@@ -2,6 +2,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" CONFIG_FDTFILE="sun7i-a20-olinuxino-micro.dtb" CONFIG_MMC_SUNXI_SLOT_EXTRA=3 +CONFIG_I2C1_ENABLE=y +CONFIG_I2C2_ENABLE=y CONFIG_VIDEO_VGA=y CONFIG_MMC0_CD_PIN="PH1" CONFIG_MMC3_CD_PIN="PH11"
configs/Cubieboard2_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" CONFIG_FDTFILE="sun7i-a20-cubieboard2.dtb" CONFIG_MMC0_CD_PIN="PH1" +CONFIG_I2C1_ENABLE=y CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN7I=y
configs/Cubieboard_defconfig +1 -0
@@ -1,6 +1,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" CONFIG_FDTFILE="sun4i-a10-cubieboard.dtb" +CONFIG_I2C1_ENABLE=y CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y
Signature · 1 line
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