qemu-ppce500: Align code at 64k boundary
PATCH 1/1 qemu-ppce500: Align code at 64k boundary
The QEMU u-boot located itself at a 4k aligned offset which the rest of the code didn't really expect. Align it with 64k to allow the memory code to deal with 64k granularity.
This fixes broken interrupt delivery with the ppce500 machine for me.
--- include/configs/qemu-ppce500.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/configs/qemu-ppce500.h +1 -1
@@ -18,7 +18,7 @@#define CONFIG_QEMU_E500 #undef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xf01000/* 15 MB */ +#define CONFIG_SYS_TEXT_BASE 0xf10000/* 15 MB */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_MPC85XX_NO_RESETVEC
Signature · 1 line
1.7.10.4
PATCH 1/1 qemu-ppce500: Align code at 64k boundary
Quoted 16 lines · Alexander Graf
The QEMU u-boot located itself at a 4k aligned offset which the rest of the code didn't really expect. Align it with 64k to allow the memory code to deal with 64k granularity.
This fixes broken interrupt delivery with the ppce500 machine for me.
Signed-off-by Alexander Graf <[email protected]>--- include/configs/qemu-ppce500.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)include/configs/qemu-ppce500.h +0
-0
include/configs/qemu-ppce500.h line 24
Quoted 8 lines
include/configs/qemu-ppce500.h +1
-1@@ -18,7 +18,7 @@#define CONFIG_QEMU_E500 #undef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xf01000/* 15 MB */ +#define CONFIG_SYS_TEXT_BASE 0xf10000/* 15 MB */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_MPC85XX_NO_RESETVEC
I think we have a similar problem with NAND, SD, etc. boot on some targets. I'll try to fix it so that the existing addresses work.
-Scott
PATCH 1/1 qemu-ppce500: Align code at 64k boundary
Scott,
I lost track on your progress. Please let me know if I should hold this one or drop it.
York
Quoted 32 lines · Scott Wood
Quoted 16 lines · Alexander Graf
The QEMU u-boot located itself at a 4k aligned offset which the rest of the code didn't really expect. Align it with 64k to allow the memory code to deal with 64k granularity.
This fixes broken interrupt delivery with the ppce500 machine for me.
Signed-off-by Alexander Graf <[email protected]>--- include/configs/qemu-ppce500.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)include/configs/qemu-ppce500.h +0
-0include/configs/qemu-ppce500.h line 24
Quoted 8 lines
include/configs/qemu-ppce500.h +1
-1@@ -18,7 +18,7 @@#define CONFIG_QEMU_E500 #undef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xf01000/* 15 MB */ +#define CONFIG_SYS_TEXT_BASE 0xf10000/* 15 MB */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_MPC85XX_NO_RESETVEC I think we have a similar problem with NAND, SD, etc. boot on some targets. I'll try to fix it so that the existing addresses work.
-Scott
PATCH 1/1 qemu-ppce500: Align code at 64k boundary
Quoted 7 lines · York Sun
Scott,
I lost track on your progress. Please let me know if I should hold this one or
drop it.York
It shouldn't be needed anymore, as of commit e1bfd1c6b7bc0dc530247fd9108feba3147adf36 ("powerpc/mpc85xx: Use GOT when loading IVORs post-relocation").
-Scott
Quoted 34 lines · Scott Wood
Quoted 33 lines · Alexander Graf
Quoted 17 lines
The QEMU u-boot located itself at a 4k aligned offset which the rest of the code didn't really expect. Align it with 64k to allow the memory code to deal with 64k granularity.
This fixes broken interrupt delivery with the ppce500 machine for me.
Signed-off-by Alexander Graf <[email protected]>--- include/configs/qemu-ppce500.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)include/configs/qemu- renamed from include/configs/qemu-ppce500.h +0
-0
ppce500.h
index 7071849..ec90797 100644include/configs/qemu-ppce500.h line 24
Quoted 8 lines
include/configs/qemu-ppce500.h +1
-1@@ -18,7 +18,7 @@#define CONFIG_QEMU_E500 #undef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xf01000/* 15 MB */ +#define CONFIG_SYS_TEXT_BASE 0xf10000/* 15 MB */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_MPC85XX_NO_RESETVEC I think we have a similar problem with NAND, SD, etc. boot on some targets. I'll try to fix it so that the existing addresses work.
-Scott