Mediatek MT8135 dts updates
Subsystems (2)
This series contains the Mediatek MT8135 dts updates for the clock support and UART support. This needs these two series:
[PATCH v12] clk: Add common clock support for Mediatek MT8135 and MT8173
tty: serial: 8250_mtk: Add support for second clock
Also this adds the PMIC wrapper nodes to the dtsi file and PMIC node to the mt8135-evbp1 board. Support for the PMIC wrapper was merged during the v4.1 merge window.
This series is meant for testing the new features, not (yet) for inclusion.
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The following changes since commit 39a8804455fb23f09157341d3ba7db6d7ae6ee76:
Linux 4.0 (2015-04-12 15:12:50 -0700)
are available in the git repository at:
git://git.pengutronix.de/git/sha/linux-2.6.git tags/v4.0-mtk-arm-dts
for you to fetch changes up to 5fcd75a6aeded756c24d9581f49e0859b85fb3a0:
ARM: dts: mediatek mt8135: Use real UART clocks (2015-04-23 11:02:27 +0200)
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James Liao (1):
ARM: dts: mediatek: Enable clock support for Mediatek MT8135.
Sascha Hauer (3):
ARM: dts: mt8135: Add pmic wrapper nodes
ARM: dts: mt8135-evbp1: Add PMIC support
ARM: dts: mediatek mt8135: Use real UART clocks
arch/arm/boot/dts/mt8135-evbp1.dts | 193 +++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/mt8135.dtsi | 58 ++++++++++- 2 files changed, 247 insertions(+), 4 deletions(-)
PATCH 1/4 ARM: dts: mediatek: Enable clock support for Mediatek MT8135.
From: James Liao <[email protected]>
This patch adds MT8135 clock controllers into device tree.
Signed-off-by James Liao <[email protected]>
Signed-off-by Henry Chen <[email protected]>
Signed-off-by Sascha Hauer <[email protected]>
--- arch/arm/boot/dts/mt8135.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
arch/arm/boot/dts/mt8135.dtsi +32 -0
@@ -12,6 +12,7 @@ * GNU General Public License for more details. */ +#include <dt-bindings/clock/mt8135-clk.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton64.dtsi"
@@ -93,6 +94,11 @@ #clock-cells = <0>; }; + clk26m: clk26m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; }; soc {
@@ -101,6 +107,26 @@ compatible = "simple-bus"; ranges; + topckgen: topckgen at 10000000 { + compatible = "mediatek,mt8135-topckgen"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infracfg: infracfg at 10001000 { + #reset-cells = <1>; + #clock-cells = <1>; + compatible = "mediatek,mt8135-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + }; + + pericfg: pericfg at 10003000 { + #reset-cells = <1>; + #clock-cells = <1>; + compatible = "mediatek,mt8135-pericfg", "syscon"; + reg = <0 0x10003000 0 0x1000>; + }; + timer: timer at 10008000 { compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer";
@@ -119,6 +145,12 @@ reg = <0 0x10200030 0 0x1c>; }; + apmixedsys: apmixedsys at 10209000 { + compatible = "mediatek,mt8135-apmixedsys"; + reg = <0 0x10209000 0 0x1000>; + #clock-cells = <1>; + }; + gic: interrupt-controller at 10211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller;
Signature · 1 line
2.1.4
PATCH 2/4 ARM: dts: mt8135: Add pmic wrapper nodes
In reply to Sascha HauerThis adds the pmic wrapper node to the MediaTek MT8135 dtsi file.
This unit is used to access the PMIC on MediaTek boards.
Signed-off-by Sascha Hauer <[email protected]>
--- arch/arm/boot/dts/mt8135.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
arch/arm/boot/dts/mt8135.dtsi +14 -0
@@ -15,6 +15,7 @@ #include <dt-bindings/clock/mt8135-clk.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/reset-controller/mt8135-resets.h> #include "skeleton64.dtsi" / {
@@ -127,6 +128,19 @@ reg = <0 0x10003000 0 0x1000>; }; + pwrap: pwrap at 1000f000 { + compatible = "mediatek,mt8135-pwrap"; + reg = <0 0x1000f000 0 0x1000>, + <0 0x11017000 0 0x1000>; + reg-names = "pwrap", "pwrap-bridge"; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; + resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, + <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; + reset-names = "pwrap", "pwrap-bridge"; + clocks = <&clk26m>, <&clk26m>; + clock-names = "spi", "wrap"; + }; + timer: timer at 10008000 { compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer";
Signature · 1 line
2.1.4
PATCH 2/4 ARM: dts: mt8135: Add pmic wrapper nodes
Quoted 29 lines · Sascha Hauer
This adds the pmic wrapper node to the MediaTek MT8135 dtsi file.
This unit is used to access the PMIC on MediaTek boards.
Signed-off-by Sascha Hauer <[email protected]>--- arch/arm/boot/dts/mt8135.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/boot/dts/mt8135.dtsi +5
-0@@ -15,6 +15,7 @@ #include <dt-bindings/clock/mt8135-clk.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/reset-controller/mt8135-resets.h> #include "skeleton64.dtsi" / {@@ -127,6 +128,19 @@ reg = <0 0x10003000 0 0x1000>; }; + pwrap: pwrap at 1000f000 { + compatible = "mediatek,mt8135-pwrap"; + reg = <0 0x1000f000 0 0x1000>, + <0 0x11017000 0 0x1000>;
arch/arm/boot/dts/mt8135.dtsi line 144
Quoted 10 lines
arch/arm/boot/dts/mt8135.dtsi +9
-0+ reg-names = "pwrap", "pwrap-bridge"; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; + resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, + <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; + reset-names = "pwrap", "pwrap-bridge"; + clocks = <&clk26m>, <&clk26m>; + clock-names = "spi", "wrap"; + }; + timer: timer at 10008000 {
Hi Sascha,
It seems we have many 8135 dtsi updates recently.
Please sort according to node instance address so it will be easier to merge or resolve conflict.
Joe.C
PATCH 3/4 ARM: dts: mt8135-evbp1: Add PMIC support
In reply to Sascha HauerThe MT8135 eval board contains a MT6397 PMIC. This adds the corresponding device node to the dts file.
Signed-off-by Sascha Hauer <[email protected]>
--- arch/arm/boot/dts/mt8135-evbp1.dts | 193 +++++++++++++++++++++++++++++++++++++ 1 file changed, 193 insertions(+)
arch/arm/boot/dts/mt8135-evbp1.dts +193 -0
@@ -24,6 +24,199 @@ }; }; +&pwrap { + pmic: mt6397 { + compatible = "mediatek,mt6397"; + + mt6397regulator: mt6397regulator { + compatible = "mediatek,mt6397-regulator"; + + mt6397_vpca15_reg: buck_vpca15 { + regulator-compatible = "buck_vpca15"; + regulator-name = "vpca15"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + }; + + mt6397_vpca7_reg: buck_vpca7 { + regulator-compatible = "buck_vpca7"; + regulator-name = "vpca7"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + }; + + mt6397_vsramca15_reg: buck_vsramca15 { + regulator-compatible = "buck_vsramca15"; + regulator-name = "vsramca15"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + }; + + mt6397_vsramca7_reg: buck_vsramca7 { + regulator-compatible = "buck_vsramca7"; + regulator-name = "vsramca7"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + }; + + mt6397_vcore_reg: buck_vcore { + regulator-compatible = "buck_vcore"; + regulator-name = "vcore"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + }; + + mt6397_vgpu_reg: buck_vgpu { + regulator-compatible = "buck_vgpu"; + regulator-name = "vgpu"; + regulator-min-microvolt = < 700000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <115>; + }; + + mt6397_vdrm_reg: buck_vdrm { + regulator-compatible = "buck_vdrm"; + regulator-name = "vdrm"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1400000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + }; + + mt6397_vio18_reg: buck_vio18 { + regulator-compatible = "buck_vio18"; + regulator-name = "vio18"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + }; + + mt6397_vtcxo_reg: ldo_vtcxo { + regulator-compatible = "ldo_vtcxo"; + regulator-name = "vtcxo"; + regulator-always-on; + }; + + mt6397_va28_reg: ldo_va28 { + regulator-compatible = "ldo_va28"; + regulator-name = "va28"; + regulator-always-on; + }; + + mt6397_vcama_reg: ldo_vcama { + regulator-compatible = "ldo_vcama"; + regulator-name = "vcama"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vio28_reg: ldo_vio28 { + regulator-compatible = "ldo_vio28"; + regulator-name = "vio28"; + regulator-always-on; + }; + + mt6397_vusb_reg: ldo_vusb { + regulator-compatible = "ldo_vusb"; + regulator-name = "vusb"; + }; + + mt6397_vmc_reg: ldo_vmc { + regulator-compatible = "ldo_vmc"; + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vmch_reg: ldo_vmch { + regulator-compatible = "ldo_vmch"; + regulator-name = "vmch"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vemc_3v3_reg: ldo_vemc3v3 { + regulator-compatible = "ldo_vemc3v3"; + regulator-name = "vemc_3v3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp1_reg: ldo_vgp1 { + regulator-compatible = "ldo_vgp1"; + regulator-name = "vcamd"; + regulator-min-microvolt = <1220000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <240>; + }; + + mt6397_vgp2_reg: ldo_vgp2 { + regulator-compatible = "ldo_vgp2"; + regulator-name = "vcamio"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp3_reg: ldo_vgp3 { + regulator-compatible = "ldo_vgp3"; + regulator-name = "vcamaf"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp4_reg: ldo_vgp4 { + regulator-compatible = "ldo_vgp4"; + regulator-name = "vgp4"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp5_reg: ldo_vgp5 { + regulator-compatible = "ldo_vgp5"; + regulator-name = "vgp5"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp6_reg: ldo_vgp6 { + regulator-compatible = "ldo_vgp6"; + regulator-name = "vgp6"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vibr_reg: ldo_vibr { + regulator-compatible = "ldo_vibr"; + regulator-name = "vibr"; + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + }; + }; +}; + &uart3 { status = "okay"; };
Signature · 1 line
2.1.4
PATCH 4/4 ARM: dts: mediatek mt8135: Use real UART clocks
In reply to Sascha HauerWe used to provide dummy clocks for the UART. Now that we have common clock support we can provide the real clocks to the UART.
Signed-off-by Sascha Hauer <[email protected]>
--- arch/arm/boot/dts/mt8135.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)
arch/arm/boot/dts/mt8135.dtsi +8 -4
@@ -180,7 +180,8 @@ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; reg = <0 0x11006000 0 0x400>; interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>; + clock-names = "baud", "bus"; status = "disabled"; };
@@ -188,7 +189,8 @@ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; reg = <0 0x11007000 0 0x400>; interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>; + clock-names = "baud", "bus"; status = "disabled"; };
@@ -196,7 +198,8 @@ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; reg = <0 0x11008000 0 0x400>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>; + clock-names = "baud", "bus"; status = "disabled"; };
@@ -204,7 +207,8 @@ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; reg = <0 0x11009000 0 0x400>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>; + clock-names = "baud", "bus"; status = "disabled"; };
Signature · 1 line
2.1.4
Matthias Brugger
maintainerPATCH 4/4 ARM: dts: mediatek mt8135: Use real UART clocks
2015-04-23 11:21 GMT+02:00 Sascha Hauer <[email protected]>:
Quoted 13 lines
We used to provide dummy clocks for the UART. Now that we have common clock support we can provide the real clocks to the UART.
Signed-off-by Sascha Hauer <[email protected]>--- arch/arm/boot/dts/mt8135.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)arch/arm/boot/dts/mt8135.dtsi +0
-0
arch/arm/boot/dts/mt8135.dtsi line 186
Quoted 8 lines
arch/arm/boot/dts/mt8135.dtsi +2
-1@@ -180,7 +180,8 @@ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; reg = <0 0x11006000 0 0x400>; interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>; + clock-names = "baud", "bus"; status = "disabled"; };
We can delete the dummy uart_clk, as it is not needed any more.
Signature · 1 line
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