ARM: sunxi: dts: split IR pins for A10 and A20
Subsystems (2)
PATCH 1/1 ARM: sunxi: dts: split IR pins for A10 and A20
From: Marcus Cooper <[email protected]>
Currently none of the target boards nor the driver supports IR TX. However this pin is used in a few instances as a GPIO. Split the pin ctrl descriptions so that only the IR RX is configured to be used.
--- arch/arm/boot/dts/sun4i-a10.dtsi | 18 ++++++++++++++++-- arch/arm/boot/dts/sun7i-a20.dtsi | 18 ++++++++++++++++-- 2 files changed, 32 insertions(+), 4 deletions(-)
arch/arm/boot/dts/sun4i-a10.dtsi +16 -2
@@ -798,14 +798,28 @@ }; ir0_pins_a: ir0 at 0 { - allwinner,pins = "PB3","PB4"; + allwinner,pins = "PB4"; + allwinner,function = "ir0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir0_pins_b: ir0 at 1 { + allwinner,pins = "PB3"; allwinner,function = "ir0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; ir1_pins_a: ir1 at 0 { - allwinner,pins = "PB22","PB23"; + allwinner,pins = "PB23"; + allwinner,function = "ir1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir1_pins_b: ir1 at 1 { + allwinner,pins = "PB22"; allwinner,function = "ir1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
arch/arm/boot/dts/sun7i-a20.dtsi +16 -2
@@ -1001,14 +1001,28 @@ }; ir0_pins_a: ir0 at 0 { - allwinner,pins = "PB3","PB4"; + allwinner,pins = "PB4"; + allwinner,function = "ir0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir0_pins_b: ir0 at 1 { + allwinner,pins = "PB3"; allwinner,function = "ir0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; ir1_pins_a: ir1 at 0 { - allwinner,pins = "PB22","PB23"; + allwinner,pins = "PB23"; + allwinner,function = "ir1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ir1_pins_b: ir1 at 1 { + allwinner,pins = "PB22"; allwinner,function = "ir1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
Signature · 1 line
2.3.6
PATCH 1/1 ARM: sunxi: dts: split IR pins for A10 and A20
Hi,
Quoted 18 lines · codekipper at gmail.com
From: Marcus Cooper <[email protected]>
Currently none of the target boards nor the driver supports IR TX. However this pin is used in a few instances as a GPIO. Split the pin ctrl descriptions so that only the IR RX is configured to be used.
Signed-off-by Marcus Cooper <[email protected]>--- arch/arm/boot/dts/sun4i-a10.dtsi | 18 ++++++++++++++++-- arch/arm/boot/dts/sun7i-a20.dtsi | 18 ++++++++++++++++-- 2 files changed, 32 insertions(+), 4 deletions(-)arch/arm/boot/dts/sun4i-a10.dtsi +0
-0
arch/arm/boot/dts/sun4i-a10.dtsi line 800
Quoted 3 lines
arch/arm/boot/dts/sun4i-a10.dtsi +0
-0@@ -798,14 +798,28 @@ }; ir0_pins_a: ir0 at 0 {
I would have changed the name of that node to ir0_rx_pins_a, just to make it clear what you're actually muxing.
(of course, that would require fixing the users of these nodes, but that's fine.)
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150429/32c1c11b/attachment-0001.sig>