FAILED: patch "[PATCH] ARM: dts: dove: Fix uart[23] reg property" failed to apply to 3.10-stable tree

The patch below does not apply to the 3.10-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From: Sebastian Hesselbarth <[email protected]>
Date: Tue, 17 Feb 2015 19:52:04 +0100
Subject: [PATCH] ARM: dts: dove: Fix uart[23] reg property

Fix Dove's register addresses of uart2 and uart3 nodes that seem to be broken since ages due to a copy-and-paste error.

index a5441d5482a6..3cc8b8320345 100644
@@ -154,7 +154,7 @@
 
 			uart2: serial@12200 {
 				compatible = "ns16550a";
-				reg = <0x12000 0x100>;
+				reg = <0x12200 0x100>;
 				reg-shift = <2>;
 				interrupts = <9>;
 				clocks = <&core_clk 0>;

@@ -163,7 +163,7 @@
 
 			uart3: serial@12300 {
 				compatible = "ns16550a";
-				reg = <0x12100 0x100>;
+				reg = <0x12300 0x100>;
 				reg-shift = <2>;
 				interrupts = <10>;
 				clocks = <&core_clk 0>;

Fix Dove's register addresses of uart2 and uart3 nodes that seem to be broken since ages due to a copy-and-paste error.

---
Greg,

this is a v3.10-stable compatible version of patch for the corresponding upstream commit a74cd13b807029397f7232449df929bac11fb228. The upstream patch is failing on v3.10 because we moved the uart's parent node to a different level somewhere in between v3.10 and v3.14.

This backport now is based on v3.10.76 instead.

Sebastian

---
 arch/arm/boot/dts/dove.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

index 6cab46849cdb..d1e47092d21a 100644
@@ -75,7 +75,7 @@
 
 		uart2: serial@12200 {
 			compatible = "ns16550a";
-			reg = <0x12000 0x100>;
+			reg = <0x12200 0x100>;
 			reg-shift = <2>;
 			interrupts = <9>;
 			clocks = <&core_clk 0>;

@@ -84,7 +84,7 @@
 
 		uart3: serial@12300 {
 			compatible = "ns16550a";
-			reg = <0x12100 0x100>;
+			reg = <0x12300 0x100>;
 			reg-shift = <2>;
 			interrupts = <10>;
 			clocks = <&core_clk 0>;

2.1.0