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ata: ahci_xgene: Add support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller driver.

PATCH Superseded Suman Tripathi 3 participants 9 messages May 5, 2015 – May 11, 2015 1 message not in the archive

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Suman Tripathi

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#0 lore raw

v5 cover ata: ahci_xgene: Add support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller driver.

V2 change:
* Drop the MIDR based implementation.

V3 change:
* Implement the support for HOST_IRQ_STAT as edge trigger latch.

V4 change:
* Implement seperate irq handler for level and edge trigger latch.

V5 change:
* Refactoring the ahci_single_irq_intr.
* Split refactoring of level trigger and edge trigger into 2 patches.

Signed-off-by Suman Tripathi <[email protected]>

---

Suman Tripathi (3):
libahci: Refactoring of ahci_single_irq_intr function.
libahci: Add support to handle HOST_IRQ_STAT as edge trigger
latch.
ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM
X-Gene SoC AHCI SATA Host controller.

 drivers/ata/ahci.h       |  2 ++
 drivers/ata/ahci_xgene.c | 90 ++++++++++++++++++++++++++++++++++++++----------
 drivers/ata/libahci.c    | 89 ++++++++++++++++++++++++++++++++++++-----------
 3 files changed, 143 insertions(+), 38 deletions(-)

--
1.8.2.1

author
#1 lore raw

PATCH v5 1/3 libahci: Refactoring of ahci_single_irq_intr function.

This patch refactors the ahci_single_irq_intr function and also rename it to ahci_single_level_irq_intr as it handles a level triggered latch.

Signed-off-by Suman tripathi <[email protected]>
---
 drivers/ata/libahci.c | 51 ++++++++++++++++++++++++++++++---------------------
 1 file changed, 30 insertions(+), 21 deletions(-)
drivers/ata/libahci.c +30 -21
index 61a9c07..aa89c8e 100644
@@ -1826,27 +1826,9 @@ static irqreturn_t ahci_multi_irqs_intr(int irq, void *dev_instance)
 	return IRQ_WAKE_THREAD;
 }
 
-static irqreturn_t ahci_single_irq_intr(int irq, void *dev_instance)
+static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
 {
-	struct ata_host *host = dev_instance;
-	struct ahci_host_priv *hpriv;
 	unsigned int i, handled = 0;
-	void __iomem *mmio;
-	u32 irq_stat, irq_masked;
-
-	VPRINTK("ENTER\n");
-
-	hpriv = host->private_data;
-	mmio = hpriv->mmio;
-
-	/* sigh.  0xffffffff is a valid return from h/w */
-	irq_stat = readl(mmio + HOST_IRQ_STAT);
-	if (!irq_stat)
-		return IRQ_NONE;
-
-	irq_masked = irq_stat & hpriv->port_map;
-
-	spin_lock(&host->lock);
 
 	for (i = 0; i < host->n_ports; i++) {
 		struct ata_port *ap;

@@ -1868,6 +1850,33 @@ static irqreturn_t ahci_single_irq_intr(int irq, void *dev_instance)
 		handled = 1;
 	}
 
+	return handled;
+}
+
+static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
+{
+	struct ata_host *host = dev_instance;
+	struct ahci_host_priv *hpriv;
+	unsigned int rc = 0;
+	void __iomem *mmio;
+	u32 irq_stat, irq_masked;
+
+	VPRINTK("ENTER\n");
+
+	hpriv = host->private_data;
+	mmio = hpriv->mmio;
+
+	/* sigh.  0xffffffff is a valid return from h/w */
+	irq_stat = readl(mmio + HOST_IRQ_STAT);
+	if (!irq_stat)
+		return IRQ_NONE;
+
+	irq_masked = irq_stat & hpriv->port_map;
+
+	spin_lock(&host->lock);
+
+	rc = ahci_handle_port_intr(host, irq_masked);
+
 	/* HOST_IRQ_STAT behaves as level triggered latch meaning that
 	 * it should be cleared after all the port events are cleared;
 	 * otherwise, it will raise a spurious interrupt after each

@@ -1883,7 +1892,7 @@ static irqreturn_t ahci_single_irq_intr(int irq, void *dev_instance)
 
 	VPRINTK("EXIT\n");
 
-	return IRQ_RETVAL(handled);
+	return IRQ_RETVAL(rc);
 }
 
 unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)

@@ -2487,7 +2496,7 @@ int ahci_host_activate(struct ata_host *host, int irq,
 	if (hpriv->flags & AHCI_HFLAG_MULTI_MSI)
 		rc = ahci_host_activate_multi_irqs(host, irq, sht);
 	else
-		rc = ata_host_activate(host, irq, ahci_single_irq_intr,
+		rc = ata_host_activate(host, irq, ahci_single_level_irq_intr,
 				       IRQF_SHARED, sht);
 	return rc;
 }

--
1.8.2.1

A message that is not in the archive (sent off-list or not yet received): 1430853672-6227-1-git-send-email-stripathi-qTEPVZfXA3Y@public.gmane.org

#3 lore raw

PATCH v5 2/3 libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch.

This patch adds the support to handle HOST_IRQ_STAT as edge trigger latch.

Signed-off-by Suman Tripathi <[email protected]>
---
 drivers/ata/ahci.h    |  2 ++
 drivers/ata/libahci.c | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)
drivers/ata/ahci.h +2 -0
index 71262e0..f442960 100644
@@ -238,6 +238,8 @@ enum {
 	AHCI_HFLAG_MULTI_MSI		= (1 << 16), /* multiple PCI MSIs */
 	AHCI_HFLAG_NO_DEVSLP		= (1 << 17), /* no device sleep */
 	AHCI_HFLAG_NO_FBS		= (1 << 18), /* no FBS */
+	AHCI_HFLAG_EDGE_IRQ		= (1 << 19), /* HOST_IRQ_STAT behaves as
+							Edge Triggered */
 
 	/* ap->flags bits */
drivers/ata/libahci.c +40 -0
index aa89c8e..1add5ba 100644
@@ -1853,6 +1853,43 @@ static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
 	return handled;
 }
 
+static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance)
+{
+	struct ata_host *host = dev_instance;
+	struct ahci_host_priv *hpriv;
+	unsigned int rc = 0;
+	void __iomem *mmio;
+	u32 irq_stat, irq_masked;
+
+	VPRINTK("ENTER\n");
+
+	hpriv = host->private_data;
+	mmio = hpriv->mmio;
+
+	/* sigh.  0xffffffff is a valid return from h/w */
+	irq_stat = readl(mmio + HOST_IRQ_STAT);
+	if (!irq_stat)
+		return IRQ_NONE;
+
+	irq_masked = irq_stat & hpriv->port_map;
+
+	spin_lock(&host->lock);
+
+	/*
+	 * HOST_IRQ_STAT behaves as edge triggered latch meaning that
+	 * it should be cleared before all the port events are cleared.
+	 */
+	writel(irq_stat, mmio + HOST_IRQ_STAT);
+
+	rc = ahci_handle_port_intr(host, irq_masked);
+
+	spin_unlock(&host->lock);
+
+	VPRINTK("EXIT\n");
+
+	return IRQ_RETVAL(rc);
+}
+
 static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
 {
 	struct ata_host *host = dev_instance;

@@ -2495,6 +2532,9 @@ int ahci_host_activate(struct ata_host *host, int irq,
 
 	if (hpriv->flags & AHCI_HFLAG_MULTI_MSI)
 		rc = ahci_host_activate_multi_irqs(host, irq, sht);
+	else if (hpriv->flags & AHCI_HFLAG_EDGE_IRQ)
+		rc = ata_host_activate(host, irq, ahci_single_edge_irq_intr,
+				       IRQF_SHARED, sht);
 	else
 		rc = ata_host_activate(host, irq, ahci_single_level_irq_intr,
 				       IRQF_SHARED, sht);

--
1.8.2.1

--
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author
#4 lore raw

PATCH v5 2/3 libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch.

Hi Tejun

Quoted 82 lines · Suman Tripathi

This patch adds the support to handle HOST_IRQ_STAT as edge trigger latch.

Signed-off-by Suman Tripathi <[email protected]>
---
 drivers/ata/ahci.h    |  2 ++
 drivers/ata/libahci.c | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)
drivers/ata/ahci.h +2 -0
index 71262e0..f442960 100644
@@ -238,6 +238,8 @@ enum {
        AHCI_HFLAG_MULTI_MSI            = (1 << 16), /* multiple PCI MSIs */
        AHCI_HFLAG_NO_DEVSLP            = (1 << 17), /* no device sleep */
        AHCI_HFLAG_NO_FBS               = (1 << 18), /* no FBS */
+       AHCI_HFLAG_EDGE_IRQ             = (1 << 19), /* HOST_IRQ_STAT behaves as
+                                                       Edge Triggered */
 
        /* ap->flags bits */
drivers/ata/libahci.c +40 -1
index aa89c8e..1add5ba 100644
@@ -1853,6 +1853,43 @@ static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
        return handled;
 }
 
+static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance)
+{
+       struct ata_host *host = dev_instance;
+       struct ahci_host_priv *hpriv;
+       unsigned int rc = 0;
+       void __iomem *mmio;
+       u32 irq_stat, irq_masked;
+
+       VPRINTK("ENTER\n");
+
+       hpriv = host->private_data;
+       mmio = hpriv->mmio;
+
+       /* sigh.  0xffffffff is a valid return from h/w */
+       irq_stat = readl(mmio + HOST_IRQ_STAT);
+       if (!irq_stat)
+               return IRQ_NONE;
+
+       irq_masked = irq_stat & hpriv->port_map;
+
+       spin_lock(&host->lock);
+
+       /*
+        * HOST_IRQ_STAT behaves as edge triggered latch meaning that
+        * it should be cleared before all the port events are cleared.
+        */
+       writel(irq_stat, mmio + HOST_IRQ_STAT);
+
+       rc = ahci_handle_port_intr(host, irq_masked);
+
+       spin_unlock(&host->lock);
+
+       VPRINTK("EXIT\n");
+
+       return IRQ_RETVAL(rc);
+}
+
 static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
 {
        struct ata_host *host = dev_instance;

@@ -2495,6 +2532,9 @@ int ahci_host_activate(struct ata_host *host, int irq,
 
        if (hpriv->flags & AHCI_HFLAG_MULTI_MSI)
                rc = ahci_host_activate_multi_irqs(host, irq, sht);
+       else if (hpriv->flags & AHCI_HFLAG_EDGE_IRQ)
+               rc = ata_host_activate(host, irq, ahci_single_edge_irq_intr,
+                                      IRQF_SHARED, sht);
        else
                rc = ata_host_activate(host, irq, ahci_single_level_irq_intr,
                                       IRQF_SHARED, sht);
--
Quoted 2 lines

1.8.2.1

Any comments on this version ??

Signature · 3 lines
Thanks,
with regards,
Suman Tripathi
author
#6 lore raw

PATCH v5 3/3 ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller.

In reply to Suman Tripathi

This patch enables full AHCI feature support for APM X-Gene SoC SATA host controller. The following errata's are removed:

1. 2a0bdff6b95 ("ahci-xgene: fix the dma state machine lockup for the IDENTIFY DEVICE PIO mode command")
2. 09c32aaa368 ("ahci_xgene: Fix the dma state machine lockup for the ATA_CMD_SMART PIO mode command")
3. 1540035da71 ("ahci_xgene: Implement the xgene_ahci_poll_reg_val to support PMP")
4. a3a84bc7c88 ("ahci_xgene: Implement the workaround to support PMP enumeration and discovery")
5. 1102407bb71 ("ahci_xgene: Fix the DMA state machine lockup for the ATA_CMD_PACKET PIO mode command")
6. 72f79f9e35b ("ahci_xgene: Removing NCQ support from the APM X-Gene SoC AHCI SATA Host Controller driver")

In addition, enable PMP support for APM X-Gene SoC and enable FBS support for second generation APM X-Gene SoC.

Signed-off-by Suman Tripathi <[email protected]>
---
 drivers/ata/ahci_xgene.c | 90 ++++++++++++++++++++++++++++++++++++++----------
 1 file changed, 72 insertions(+), 18 deletions(-)
drivers/ata/ahci_xgene.c +72 -18
index 2b78510..88a0988 100644
@@ -27,6 +27,7 @@
 #include <linux/platform_device.h>
 #include <linux/ahci_platform.h>
 #include <linux/of_address.h>
+#include <linux/of_device.h>
 #include <linux/of_irq.h>
 #include <linux/phy/phy.h>
 #include "ahci.h"

@@ -84,6 +85,11 @@
 /* Max retry for link down */
 #define MAX_LINK_DOWN_RETRY 3
 
+enum xgene_ahci_version {
+	XGENE_AHCI_V1 = 1,
+	XGENE_AHCI_V2,
+};
+
 struct xgene_ahci_context {
 	struct ahci_host_priv *hpriv;
 	struct device *dev;

@@ -547,9 +553,6 @@ static struct ata_port_operations xgene_ahci_ops = {
 	.host_stop = xgene_ahci_host_stop,
 	.hardreset = xgene_ahci_hardreset,
 	.read_id = xgene_ahci_read_id,
-	.qc_issue = xgene_ahci_qc_issue,
-	.softreset = xgene_ahci_softreset,
-	.pmp_softreset = xgene_ahci_pmp_softreset
 };
 
 static const struct ata_port_info xgene_ahci_port_info = {

@@ -629,12 +632,30 @@ static struct scsi_host_template ahci_platform_sht = {
 	AHCI_SHT(DRV_NAME),
 };
 
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id xgene_ahci_acpi_match[] = {
+	{ "APMC0D0D", XGENE_AHCI_V1},
+	{ "APMC0D32", XGENE_AHCI_V2},
+	{},
+};
+MODULE_DEVICE_TABLE(acpi, xgene_ahci_acpi_match);
+#endif
+
+static const struct of_device_id xgene_ahci_of_match[] = {
+	{.compatible = "apm,xgene-ahci", .data = (void *) XGENE_AHCI_V1},
+	{.compatible = "apm,xgene-ahci-v2", .data = (void *) XGENE_AHCI_V2},
+	{},
+};
+MODULE_DEVICE_TABLE(of, xgene_ahci_of_match);
+
 static int xgene_ahci_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct ahci_host_priv *hpriv;
 	struct xgene_ahci_context *ctx;
 	struct resource *res;
+	const struct of_device_id *of_devid;
+	enum xgene_ahci_version version = XGENE_AHCI_V1;
 	int rc;
 
 	hpriv = ahci_platform_get_resources(pdev);

@@ -677,6 +698,37 @@ static int xgene_ahci_probe(struct platform_device *pdev)
 		ctx->csr_mux = csr;
 	}
 
+	of_devid = of_match_device(xgene_ahci_of_match, dev);
+	if (of_devid) {
+		if (of_devid->data)
+			version = (enum xgene_ahci_version) of_devid->data;
+	}
+#ifdef CONFIG_ACPI
+	else {
+		const struct acpi_device_id *acpi_id;
+		struct acpi_device_info *info;
+		acpi_status status;
+
+		acpi_id = acpi_match_device(xgene_ahci_acpi_match, &pdev->dev);
+		if (!acpi_id) {
+			dev_warn(&pdev->dev, "No node entry in ACPI table. Assume version1\n");
+			version = XGENE_AHCI_V1;
+		}
+
+		if (acpi_id->driver_data) {
+			version = (enum xgene_ahci_version) acpi_id->driver_data;
+			status = acpi_get_object_info(ACPI_HANDLE(&pdev->dev), &info);
+			if (ACPI_FAILURE(status)) {
+				dev_warn(&pdev->dev, "%s: Error reading device info. Assume version1\n",
+					__func__);
+				version = XGENE_AHCI_V1;
+			}
+			if (info->valid & ACPI_VALID_CID)
+				version = XGENE_AHCI_V2;
+		}
+	}
+#endif
+
 	dev_dbg(dev, "VAddr 0x%p Mmio VAddr 0x%p\n", ctx->csr_core,
 		hpriv->mmio);
 

@@ -704,7 +756,23 @@ static int xgene_ahci_probe(struct platform_device *pdev)
 	/* Configure the host controller */
 	xgene_ahci_hw_init(hpriv);
 skip_clk_phy:
-	hpriv->flags = AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_NCQ;
+
+	switch (version) {
+	case XGENE_AHCI_V1:
+		hpriv->flags = AHCI_HFLAG_NO_NCQ;
+		/*
+		 * Override the callbacks for storm ERRATA
+		 */
+		xgene_ahci_ops.qc_issue = xgene_ahci_qc_issue;
+		xgene_ahci_ops.softreset = xgene_ahci_softreset;
+		xgene_ahci_ops.pmp_softreset = xgene_ahci_pmp_softreset;
+		break;
+	case XGENE_AHCI_V2:
+		hpriv->flags |= AHCI_HFLAG_YES_FBS | AHCI_HFLAG_EDGE_IRQ;
+		break;
+	default:
+		break;
+	}
 
 	rc = ahci_platform_init_host(pdev, hpriv, &xgene_ahci_port_info,
 				     &ahci_platform_sht);

@@ -719,20 +787,6 @@ disable_resources:
 	return rc;
 }
 
-#ifdef CONFIG_ACPI
-static const struct acpi_device_id xgene_ahci_acpi_match[] = {
-	{ "APMC0D0D", },
-	{ }
-};
-MODULE_DEVICE_TABLE(acpi, xgene_ahci_acpi_match);
-#endif
-
-static const struct of_device_id xgene_ahci_of_match[] = {
-	{.compatible = "apm,xgene-ahci"},
-	{},
-};
-MODULE_DEVICE_TABLE(of, xgene_ahci_of_match);
-
 static struct platform_driver xgene_ahci_driver = {
 	.probe = xgene_ahci_probe,
 	.remove = ata_platform_remove_one,

--
1.8.2.1

author
#7 lore raw

PATCH v5 3/3 ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller.

Quoted 174 lines · Suman Tripathi

This patch enables full AHCI feature support for APM X-Gene SoC SATA host controller. The following errata's are removed:

1. 2a0bdff6b95 ("ahci-xgene: fix the dma state machine lockup for the IDENTIFY DEVICE PIO mode command")
2. 09c32aaa368 ("ahci_xgene: Fix the dma state machine lockup for the ATA_CMD_SMART PIO mode command")
3. 1540035da71 ("ahci_xgene: Implement the xgene_ahci_poll_reg_val to support PMP")
4. a3a84bc7c88 ("ahci_xgene: Implement the workaround to support PMP enumeration and discovery")
5. 1102407bb71 ("ahci_xgene: Fix the DMA state machine lockup for the ATA_CMD_PACKET PIO mode command")
6. 72f79f9e35b ("ahci_xgene: Removing NCQ support from the APM X-Gene SoC AHCI SATA Host Controller driver")

In addition, enable PMP support for APM X-Gene SoC and enable FBS support for second generation APM X-Gene SoC.

Signed-off-by Suman Tripathi <[email protected]>
---
 drivers/ata/ahci_xgene.c | 90 ++++++++++++++++++++++++++++++++++++++----------
 1 file changed, 72 insertions(+), 18 deletions(-)
drivers/ata/ahci_xgene.c +72 -19
index 2b78510..88a0988 100644
@@ -27,6 +27,7 @@
 #include <linux/platform_device.h>
 #include <linux/ahci_platform.h>
 #include <linux/of_address.h>
+#include <linux/of_device.h>
 #include <linux/of_irq.h>
 #include <linux/phy/phy.h>
 #include "ahci.h"

@@ -84,6 +85,11 @@
 /* Max retry for link down */
 #define MAX_LINK_DOWN_RETRY 3
 
+enum xgene_ahci_version {
+       XGENE_AHCI_V1 = 1,
+       XGENE_AHCI_V2,
+};
+
 struct xgene_ahci_context {
        struct ahci_host_priv *hpriv;
        struct device *dev;

@@ -547,9 +553,6 @@ static struct ata_port_operations xgene_ahci_ops = {
        .host_stop = xgene_ahci_host_stop,
        .hardreset = xgene_ahci_hardreset,
        .read_id = xgene_ahci_read_id,
-       .qc_issue = xgene_ahci_qc_issue,
-       .softreset = xgene_ahci_softreset,
-       .pmp_softreset = xgene_ahci_pmp_softreset
 };
 
 static const struct ata_port_info xgene_ahci_port_info = {

@@ -629,12 +632,30 @@ static struct scsi_host_template ahci_platform_sht = {
        AHCI_SHT(DRV_NAME),
 };
 
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id xgene_ahci_acpi_match[] = {
+       { "APMC0D0D", XGENE_AHCI_V1},
+       { "APMC0D32", XGENE_AHCI_V2},
+       {},
+};
+MODULE_DEVICE_TABLE(acpi, xgene_ahci_acpi_match);
+#endif
+
+static const struct of_device_id xgene_ahci_of_match[] = {
+       {.compatible = "apm,xgene-ahci", .data = (void *) XGENE_AHCI_V1},
+       {.compatible = "apm,xgene-ahci-v2", .data = (void *) XGENE_AHCI_V2},
+       {},
+};
+MODULE_DEVICE_TABLE(of, xgene_ahci_of_match);
+
 static int xgene_ahci_probe(struct platform_device *pdev)
 {
        struct device *dev = &pdev->dev;
        struct ahci_host_priv *hpriv;
        struct xgene_ahci_context *ctx;
        struct resource *res;
+       const struct of_device_id *of_devid;
+       enum xgene_ahci_version version = XGENE_AHCI_V1;
        int rc;
 
        hpriv = ahci_platform_get_resources(pdev);

@@ -677,6 +698,37 @@ static int xgene_ahci_probe(struct platform_device *pdev)
                ctx->csr_mux = csr;
        }
 
+       of_devid = of_match_device(xgene_ahci_of_match, dev);
+       if (of_devid) {
+               if (of_devid->data)
+                       version = (enum xgene_ahci_version) of_devid->data;
+       }
+#ifdef CONFIG_ACPI
+       else {
+               const struct acpi_device_id *acpi_id;
+               struct acpi_device_info *info;
+               acpi_status status;
+
+               acpi_id = acpi_match_device(xgene_ahci_acpi_match, &pdev->dev);
+               if (!acpi_id) {
+                       dev_warn(&pdev->dev, "No node entry in ACPI table. Assume version1\n");
+                       version = XGENE_AHCI_V1;
+               }
+
+               if (acpi_id->driver_data) {
+                       version = (enum xgene_ahci_version) acpi_id->driver_data;
+                       status = acpi_get_object_info(ACPI_HANDLE(&pdev->dev), &info);
+                       if (ACPI_FAILURE(status)) {
+                               dev_warn(&pdev->dev, "%s: Error reading device info. Assume version1\n",
+                                       __func__);
+                               version = XGENE_AHCI_V1;
+                       }
+                       if (info->valid & ACPI_VALID_CID)
+                               version = XGENE_AHCI_V2;
+               }
+       }
+#endif
+
        dev_dbg(dev, "VAddr 0x%p Mmio VAddr 0x%p\n", ctx->csr_core,
                hpriv->mmio);
 

@@ -704,7 +756,23 @@ static int xgene_ahci_probe(struct platform_device *pdev)
        /* Configure the host controller */
        xgene_ahci_hw_init(hpriv);
 skip_clk_phy:
-       hpriv->flags = AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_NCQ;
+
+       switch (version) {
+       case XGENE_AHCI_V1:
+               hpriv->flags = AHCI_HFLAG_NO_NCQ;
+               /*
+                * Override the callbacks for storm ERRATA
+                */
+               xgene_ahci_ops.qc_issue = xgene_ahci_qc_issue;
+               xgene_ahci_ops.softreset = xgene_ahci_softreset;
+               xgene_ahci_ops.pmp_softreset = xgene_ahci_pmp_softreset;
+               break;
+       case XGENE_AHCI_V2:
+               hpriv->flags |= AHCI_HFLAG_YES_FBS | AHCI_HFLAG_EDGE_IRQ;
+               break;
+       default:
+               break;
+       }
 
        rc = ahci_platform_init_host(pdev, hpriv, &xgene_ahci_port_info,
                                     &ahci_platform_sht);

@@ -719,20 +787,6 @@ disable_resources:
        return rc;
 }
 
-#ifdef CONFIG_ACPI
-static const struct acpi_device_id xgene_ahci_acpi_match[] = {
-       { "APMC0D0D", },
-       { }
-};
-MODULE_DEVICE_TABLE(acpi, xgene_ahci_acpi_match);
-#endif
-
-static const struct of_device_id xgene_ahci_of_match[] = {
-       {.compatible = "apm,xgene-ahci"},
-       {},
-};
-MODULE_DEVICE_TABLE(of, xgene_ahci_of_match);
-
 static struct platform_driver xgene_ahci_driver = {
        .probe = xgene_ahci_probe,
        .remove = ata_platform_remove_one,
--
Quoted 2 lines

1.8.2.1

Any comments on this version ??

Signature · 3 lines
Thanks,
with regards,
Suman Tripathi
#8 lore raw

PATCH v5 3/3 ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller.

In reply to Suman Tripathi

Hello,

drivers/ata/ahci_xgene.c static int xgene_ahci_probe(struct platform_device *pdev) · line 768

Quoted 9 lines · Suman Tripathi
drivers/ata/ahci_xgene.c +9 -0
+	switch (version) {
+	case XGENE_AHCI_V1:
+		hpriv->flags = AHCI_HFLAG_NO_NCQ;
+		/*
+		 * Override the callbacks for storm ERRATA
+		 */
+		xgene_ahci_ops.qc_issue = xgene_ahci_qc_issue;
+		xgene_ahci_ops.softreset = xgene_ahci_softreset;
+		xgene_ahci_ops.pmp_softreset = xgene_ahci_pmp_softreset;

Let's please create separate ops structs for v1 and v2.

Thanks.

Signature · 1 line
tejun
author
#9 lore raw

PATCH v5 3/3 ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller.

Quoted 13 lines · Tejun Heo

Hello,

drivers/ata/ahci_xgene.c static int xgene_ahci_probe(struct platform_device *pdev) · line 768

Quoted 9 lines · Suman Tripathi
drivers/ata/ahci_xgene.c +9 -0
+     switch (version) {
+     case XGENE_AHCI_V1:
+             hpriv->flags = AHCI_HFLAG_NO_NCQ;
+             /*
+              * Override the callbacks for storm ERRATA
+              */
+             xgene_ahci_ops.qc_issue = xgene_ahci_qc_issue;
+             xgene_ahci_ops.softreset = xgene_ahci_softreset;
+             xgene_ahci_ops.pmp_softreset = xgene_ahci_pmp_softreset;
Quoted 1 line

Let's please create separate ops structs for v1 and v2.

Good idea . Will do that .

Quoted 5 lines

Thanks.

--
tejun

Signature · 3 lines
Thanks,
with regards,
Suman Tripathi