Patch "arm64: KVM: allows discrimination of AArch32 sysreg access" has been added to the 3.14-stable tree

This is a note to let you know that I've just added the patch titled

arm64: KVM: allows discrimination of AArch32 sysreg access

to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
arm64-kvm-allows-discrimination-of-aarch32-sysreg-access.patch
and it can be found in the queue-3.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Marc Zyngier <[email protected]>
Date: Tue, 21 Jan 2014 10:55:17 +0000
Subject: arm64: KVM: allows discrimination of AArch32 sysreg access

From: Marc Zyngier <[email protected]>

commit 2072d29c46b73e39b3c6c56c6027af77086f45fd upstream.

The current handling of AArch32 trapping is slightly less than perfect, as it is not possible (from a handler point of view) to distinguish it from an AArch64 access, nor to tell a 32bit from a 64bit access either.

Fix this by introducing two additional flags:
- is_aarch32: true if the access was made in AArch32 mode
- is_32bit: true if is_aarch32 == true and a MCR/MRC instruction was used to perform the access (as opposed to MCRR/MRRC).

This allows a handler to cover all the possible conditions in which a system register gets trapped.

---
 arch/arm64/kvm/sys_regs.c |    6 ++++++
 arch/arm64/kvm/sys_regs.h |    2 ++
 2 files changed, 8 insertions(+)

@@ -437,6 +437,8 @@ int kvm_handle_cp15_64(struct kvm_vcpu *
 	u32 hsr = kvm_vcpu_get_hsr(vcpu);
 	int Rt2 = (hsr >> 10) & 0xf;
 
+	params.is_aarch32 = true;
+	params.is_32bit = false;
 	params.CRm = (hsr >> 1) & 0xf;
 	params.Rt = (hsr >> 5) & 0xf;
 	params.is_write = ((hsr & 1) == 0);

@@ -480,6 +482,8 @@ int kvm_handle_cp15_32(struct kvm_vcpu *
 	struct sys_reg_params params;
 	u32 hsr = kvm_vcpu_get_hsr(vcpu);
 
+	params.is_aarch32 = true;
+	params.is_32bit = true;
 	params.CRm = (hsr >> 1) & 0xf;
 	params.Rt  = (hsr >> 5) & 0xf;
 	params.is_write = ((hsr & 1) == 0);

@@ -549,6 +553,8 @@ int kvm_handle_sys_reg(struct kvm_vcpu *
 	struct sys_reg_params params;
 	unsigned long esr = kvm_vcpu_get_hsr(vcpu);
 
+	params.is_aarch32 = false;
+	params.is_32bit = false;
 	params.Op0 = (esr >> 20) & 3;
 	params.Op1 = (esr >> 14) & 0x7;
 	params.CRn = (esr >> 10) & 0xf;

@@ -30,6 +30,8 @@ struct sys_reg_params {
 	u8	Op2;
 	u8	Rt;
 	bool	is_write;
+	bool	is_aarch32;
+	bool	is_32bit;	/* Only valid if is_aarch32 is true */
 };
 
 struct sys_reg_desc {

Patches currently in stable-queue which might be from [email protected] are

queue-3.14/kvm-arm-arm64-vgic-fix-gicd_icfgr-register-accesses.patch queue-3.14/arm-kvm-introduce-per-vcpu-hyp-configuration-register.patch queue-3.14/arm-kvm-fix-handling-of-trapped-64bit-coprocessor-accesses.patch queue-3.14/kvm-arm64-vgic-fix-hyp-panic-with-64k-pages-on-juno-platform.patch queue-3.14/arm64-kvm-force-cache-clean-on-page-fault-when-caches-are-off.patch queue-3.14/arm-kvm-introduce-kvm_p-d_addr_end.patch queue-3.14/arm64-kvm-flush-vm-pages-before-letting-the-guest-enable-caches.patch queue-3.14/arm-kvm-force-cache-clean-on-page-fault-when-caches-are-off.patch queue-3.14/arm-kvm-add-world-switch-for-amair-0-1.patch queue-3.14/kvm-arm-vgic-fix-the-overlap-check-action-about-setting-the-gicd-gicc-base-address.patch queue-3.14/arm64-kvm-use-inner-shareable-barriers-for-inner-shareable-maintenance.patch queue-3.14/arm64-kvm-allows-discrimination-of-aarch32-sysreg-access.patch queue-3.14/arm-kvm-trap-vm-system-registers-until-mmu-and-caches-are-on.patch queue-3.14/arm-kvm-fix-ordering-of-64bit-coprocessor-accesses.patch queue-3.14/arm64-kvm-trap-vm-system-registers-until-mmu-and-caches-are-on.patch