Patch "ARM: KVM: trap VM system registers until MMU and caches are ON" has been added to the 3.14-stable tree

This is a note to let you know that I've just added the patch titled

ARM: KVM: trap VM system registers until MMU and caches are ON

to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
arm-kvm-trap-vm-system-registers-until-mmu-and-caches-are-on.patch
and it can be found in the queue-3.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Marc Zyngier <[email protected]>
Date: Tue, 14 Jan 2014 18:00:55 +0000
Subject: ARM: KVM: trap VM system registers until MMU and caches are ON

From: Marc Zyngier <[email protected]>

commit 8034699a42d68043b495c7e0cfafccd920707ec8 upstream.

In order to be able to detect the point where the guest enables its MMU and caches, trap all the VM related system registers.

Once we see the guest enabling both the MMU and the caches, we can go back to a saner mode of operation, which is to leave these registers in complete control of the guest.

---
 arch/arm/include/asm/kvm_arm.h |    3 +
 arch/arm/kvm/coproc.c          |   74 ++++++++++++++++++++++++++++++++---------
 arch/arm/kvm/coproc.h          |    4 ++
 arch/arm/kvm/coproc_a15.c      |    2 -
 arch/arm/kvm/coproc_a7.c       |    2 -
 5 files changed, 66 insertions(+), 19 deletions(-)

@@ -55,6 +55,7 @@
  * The bits we set in HCR:
  * TAC:		Trap ACTLR
  * TSC:		Trap SMC
+ * TVM:		Trap VM ops (until MMU and caches are on)
  * TSW:		Trap cache operations by set/way
  * TWI:		Trap WFI
  * TWE:		Trap WFE

@@ -68,7 +69,7 @@
  */
 #define HCR_GUEST_MASK (HCR_TSC | HCR_TSW | HCR_TWI | HCR_VM | HCR_BSU_IS | \
 			HCR_FB | HCR_TAC | HCR_AMO | HCR_IMO | HCR_FMO | \
-			HCR_TWE | HCR_SWIO | HCR_TIDCP)
+			HCR_TVM | HCR_TWE | HCR_SWIO | HCR_TIDCP)
 
 /* System Control Register (SCTLR) bits */
 #define SCTLR_TE	(1 << 30)

@@ -153,4 +153,8 @@ static inline int cmp_reg(const struct c
 #define is64		.is_64 = true
 #define is32		.is_64 = false
 
+bool access_sctlr(struct kvm_vcpu *vcpu,
+		  const struct coproc_params *p,
+		  const struct coproc_reg *r);
+
 #endif /* __ARM_KVM_COPROC_LOCAL_H__ */

@@ -34,7 +34,7 @@
 static const struct coproc_reg a15_regs[] = {
 	/* SCTLR: swapped by interrupt.S. */
 	{ CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
-			NULL, reset_val, c1_SCTLR, 0x00C50078 },
+			access_sctlr, reset_val, c1_SCTLR, 0x00C50078 },
 };
 
 static struct kvm_coproc_target_table a15_target_table = {

@@ -37,7 +37,7 @@
 static const struct coproc_reg a7_regs[] = {
 	/* SCTLR: swapped by interrupt.S. */
 	{ CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
-			NULL, reset_val, c1_SCTLR, 0x00C50878 },
+			access_sctlr, reset_val, c1_SCTLR, 0x00C50878 },
 };
 
 static struct kvm_coproc_target_table a7_target_table = {

Patches currently in stable-queue which might be from [email protected] are

queue-3.14/kvm-arm-arm64-vgic-fix-gicd_icfgr-register-accesses.patch queue-3.14/arm-kvm-introduce-per-vcpu-hyp-configuration-register.patch queue-3.14/arm-kvm-fix-handling-of-trapped-64bit-coprocessor-accesses.patch queue-3.14/kvm-arm64-vgic-fix-hyp-panic-with-64k-pages-on-juno-platform.patch queue-3.14/arm64-kvm-force-cache-clean-on-page-fault-when-caches-are-off.patch queue-3.14/arm-kvm-introduce-kvm_p-d_addr_end.patch queue-3.14/arm64-kvm-flush-vm-pages-before-letting-the-guest-enable-caches.patch queue-3.14/arm-kvm-force-cache-clean-on-page-fault-when-caches-are-off.patch queue-3.14/arm-kvm-add-world-switch-for-amair-0-1.patch queue-3.14/kvm-arm-vgic-fix-the-overlap-check-action-about-setting-the-gicd-gicc-base-address.patch queue-3.14/arm64-kvm-use-inner-shareable-barriers-for-inner-shareable-maintenance.patch queue-3.14/arm64-kvm-allows-discrimination-of-aarch32-sysreg-access.patch queue-3.14/arm-kvm-trap-vm-system-registers-until-mmu-and-caches-are-on.patch queue-3.14/arm-kvm-fix-ordering-of-64bit-coprocessor-accesses.patch queue-3.14/arm64-kvm-trap-vm-system-registers-until-mmu-and-caches-are-on.patch