Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller.

PATCH RESEND Superseded Suman Tripathi 4 participants 13 messages May 21, 2015 – Jun 10, 2015 1 message not in the archive

Subsystems (4)

Device tree bindings MMC, SD and SDIO Secure digital host controller interface (SDHCI) driver Applied micro (apm) x-gene device tree support

lore

Share & tools

lore

Suman Tripathi

author

2015-05-21 08:43 UTC #1 lore raw

PATCH RESEND v7 1/2 arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi

This patch adds the arasan mmc nodes to reuse the of-arasan driver for APM X-Gene SoC.

Signed-off-by Suman Tripathi <[email protected]>

---

---
 arch/arm64/boot/dts/apm/apm-mustang.dts |  4 +++
 arch/arm64/boot/dts/apm/apm-storm.dtsi  | 43 +++++++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+)

arch/arm64/boot/dts/apm/apm-mustang.dts +4 -0

index 83578e7..7a3ea72 100644
@@ -52,3 +52,7 @@
 &xgenet {
 	status = "ok";
 };
+
+&mmc0 {
+	status = "ok";
+};

arch/arm64/boot/dts/apm/apm-storm.dtsi +43 -0

55 lines not on this page · raw message

--
1.8.2.1

Suman Tripathi

author

2015-05-26 11:04 UTC #2 lore raw

Re: [PATCH RESEND v7 1/2] arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi

Hi ,

Quoted 87 lines · Suman Tripathi

This patch adds the arasan mmc nodes to reuse the of-arasan driver for APM X-Gene SoC.

Signed-off-by Suman Tripathi <[email protected]>

---

---
 arch/arm64/boot/dts/apm/apm-mustang.dts |  4 +++
 arch/arm64/boot/dts/apm/apm-storm.dtsi  | 43
+++++++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+)

arch/arm64/boot/dts/apm/apm-mustang.dts +4 -0

index 83578e7..7a3ea72 100644
@@ -52,3 +52,7 @@
 &xgenet {
        status = "ok";
 };
+
+&mmc0 {
+       status = "ok";
+};

arch/arm64/boot/dts/apm/apm-storm.dtsi +43 -1

index c8d3e0e..8e03ecd 100644
@@ -145,6 +145,40 @@
                                clock-output-names = "socplldiv2";
                        };
 
+                       ahbclk: ahbclk@1f2ac000 {
+                               compatible = "apm,xgene-device-clock";
+                               #clock-cells = <1>;
+                               clocks = <&socplldiv2 0>;
+                               reg = <0x0 0x1f2ac000 0x0 0x1000
+                                       0x0 0x17000000 0x0 0x2000>;
+                               reg-names = "csr-reg", "div-reg";
+                               csr-offset = <0x0>;
+                               csr-mask = <0x1>;
+                               enable-offset = <0x8>;
+                               enable-mask = <0x1>;
+                               divider-offset = <0x164>;
+                               divider-width = <0x5>;
+                               divider-shift = <0x0>;
+                               clock-output-names = "ahbclk";
+                       };
+
+                       sdioclk: sdioclk@1f2ac000 {
+                               compatible = "apm,xgene-device-clock";
+                               #clock-cells = <1>;
+                               clocks = <&socplldiv2 0>;
+                               reg = <0x0 0x1f2ac000 0x0 0x1000
+                                       0x0 0x17000000 0x0 0x2000>;
+                               reg-names = "csr-reg", "div-reg";
+                               csr-offset = <0x0>;
+                               csr-mask = <0x2>;
+                               enable-offset = <0x8>;
+                               enable-mask = <0x2>;
+                               divider-offset = <0x178>;
+                               divider-width = <0x8>;
+                               divider-shift = <0x0>;
+                               clock-output-names = "sdioclk";
+                       };
+
                        qmlclk: qmlclk {
                                compatible = "apm,xgene-device-clock";
                                #clock-cells = <1>;

@@ -533,6 +567,15 @@
                        interrupts = <0x0 0x4f 0x4>;
                };
 
+               mmc0: mmc@1c000000 {
+                       compatible = "arasan,sdhci-4.9a";
+                       reg = <0x0 0x1c000000 0x0 0x100>;
+                       interrupts = <0x0 0x49 0x4>;
+                       dma-coherent;
+                       clock-names = "clk_xin", "clk_ahb";
+                       clocks = <&sdioclk 0>, <&ahbclk 0>;
+               };
+
                phy1: phy@1f21a000 {
                        compatible = "apm,xgene-phy";
                        reg = <0x0 0x1f21a000 0x0 0x100>;
--

Quoted 3 lines

1.8.2.1

Any comments on this patch ?? I changed the dts node name as per EPAR and Arnd comments.

Signature · 3 lines

Thanks,
with regards,
Suman Tripathi

_______________________________________________
Linuxppc-dev mailing list
[email protected]
https://lists.ozlabs.org/listinfo/linuxppc-dev

A message that is not in the archive (sent off-list or not yet received): 1432197817-22110-1-git-send-email-stripathi-qTEPVZfXA3Y@public.gmane.org

Suman Tripathi

2015-05-21 08:43 UTC #4 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk. This patch adds the support to disable SDR104/SDR50/DDR50 based on reading the capability register 0.

Signed-off-by Suman Tripathi <[email protected]>

---

---
 drivers/mmc/host/sdhci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/mmc/host/sdhci.c +2 -1

index 58c1770..a3d9b8a 100644
@@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host)
 		}
 	}
 
-	if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
+	if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V ||
+	    !(caps[0] & SDHCI_CAN_VDD_180))
 		caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
 		       SDHCI_SUPPORT_DDR50);

--
1.8.2.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html

Suman Tripathi

author

2015-05-26 11:07 UTC #5 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

Quoted 25 lines · Suman Tripathi

The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk. This patch adds the support to disable SDR104/SDR50/DDR50 based on reading the capability register 0.

Signed-off-by Suman Tripathi <[email protected]>

---

---
 drivers/mmc/host/sdhci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/mmc/host/sdhci.c +2 -2

index 58c1770..a3d9b8a 100644
@@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host)
                }
        }
 
-       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
+       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V ||
+           !(caps[0] & SDHCI_CAN_VDD_180))
                caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
                       SDHCI_SUPPORT_DDR50);
 
--

Quoted 2 lines

1.8.2.1

Any comments on this patch ?

Signature · 3 lines

Thanks,
with regards,
Suman Tripathi

Ulf Hansson

2015-05-26 12:36 UTC #6 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

In reply to Suman Tripathi

Quoted 25 lines · Suman Tripathi

The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk. This patch adds the support to disable SDR104/SDR50/DDR50 based on reading the capability register 0.

Signed-off-by Suman Tripathi <[email protected]>

---

---
 drivers/mmc/host/sdhci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/mmc/host/sdhci.c +2 -2

index 58c1770..a3d9b8a 100644
@@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host)
                }
        }
 
-       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
+       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V ||
+           !(caps[0] & SDHCI_CAN_VDD_180))
                caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
                       SDHCI_SUPPORT_DDR50);
 
--

Quoted 2 lines

1.8.2.1

I have no problem with this patch, except that it would be nice to get a few "tested by" to make sure it doesn't break UHS support for some SoCs.

Kind regards
Uffe

Suman Tripathi

author

2015-05-27 14:16 UTC #7 lore raw

Re: [PATCH RESEND v7 2/2] mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

Quoted 33 lines · Ulf Hansson

Quoted 25 lines · Suman Tripathi
The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk. This patch adds the support to disable SDR104/SDR50/DDR50 based on reading the capability register 0.
Signed-off-by Suman Tripathi <[email protected]>
---
---
 drivers/mmc/host/sdhci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci.c +2 -2
index 58c1770..a3d9b8a 100644
@@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host)
                }
        }
 
-       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
+       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V ||
+           !(caps[0] & SDHCI_CAN_VDD_180))
                caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
                       SDHCI_SUPPORT_DDR50);
 
--
Quoted 2 lines
1.8.2.1
I have no problem with this patch, except that it would be nice to get a few "tested by" to make sure it doesn't break UHS support for some SoCs.

Quoted 3 lines

Kind regards
Uffe

Can anyone test this in some other SoC ? Appreciate your help ..

Signature · 3 lines

Thanks,
with regards,
Suman Tripathi

_______________________________________________
Linuxppc-dev mailing list
[email protected]
https://lists.ozlabs.org/listinfo/linuxppc-dev

Suman Tripathi

author

2015-06-01 08:08 UTC #8 lore raw

Re: [PATCH RESEND v7 2/2] mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

Hi Aisheng,

Quoted 53 lines · Suman Tripathi

Quoted 30 lines · Ulf Hansson
Quoted 15 lines · Suman Tripathi
The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk. This patch adds the support to disable SDR104/SDR50/DDR50 based on reading the capability register 0.
Signed-off-by Suman Tripathi <[email protected]>
---
---
 drivers/mmc/host/sdhci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci.c +0 -0
index 58c1770..a3d9b8a 100644
drivers/mmc/host/sdhci.c int sdhci_add_host(struct sdhci_host *host) · line 3123
Quoted 7 lines
drivers/mmc/host/sdhci.c +2 -1
@@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host)
                }
        }
 
-       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
+       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V ||
+           !(caps[0] & SDHCI_CAN_VDD_180))
                caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50
|
Quoted 5 lines
drivers/mmc/host/sdhci.c +0 -1
                       SDHCI_SUPPORT_DDR50);
 
--
1.8.2.1
Quoted 7 lines
I have no problem with this patch, except that it would be nice to get a few "tested by" to make sure it doesn't break UHS support for some SoCs.
Kind regards
Uffe
Can anyone test this in some other SoC ? Appreciate your help ..
Can you test this patch on imx SoC ?
--
Thanks,
with regards,
Suman Tripathi

Signature · 3 lines

Thanks,
with regards,
Suman Tripathi

_______________________________________________
Linuxppc-dev mailing list
[email protected]
https://lists.ozlabs.org/listinfo/linuxppc-dev

Dong Aisheng

2015-06-05 14:53 UTC #9 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

Quoted 39 lines · Suman Tripathi

   Hi Aisheng,
   On Wed, May 27, 2015 at 7:46 PM, Suman Tripathi <[1][email protected]>
   wrote:

     On Tue, May 26, 2015 at 6:06 PM, Ulf Hansson <[2][email protected]>
     wrote:

       On 21 May 2015 at 10:43, Suman Tripathi <[3][email protected]> wrote:
       > The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk.
       > This patch adds the support to disable SDR104/SDR50/DDR50 based on
       > reading the capability register 0.
       >
       > Signed-off-by: Suman Tripathi <[4][email protected]>
       > ---
       > ---
       >  drivers/mmc/host/sdhci.c | 3 ++-
       >  1 file changed, 2 insertions(+), 1 deletion(-)
       >
       > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
       > index 58c1770..a3d9b8a 100644
       > --- a/drivers/mmc/host/sdhci.c
       > +++ b/drivers/mmc/host/sdhci.c
       > @@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host)
       >                 }
       >         }
       >
       > -       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
       > +       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V ||
       > +           !(caps[0] & SDHCI_CAN_VDD_180))
       >                 caps[1] &= ~(SDHCI_SUPPORT_SDR104 |
       SDHCI_SUPPORT_SDR50 |
       >                        SDHCI_SUPPORT_DDR50);
       >
       > --
       > 1.8.2.1
       >

       I have no problem with this patch, except that it would be nice to get
       a few "tested by" to make sure it doesn't break UHS support for some

Quoted 9 lines

       SoCs.

       Kind regards
       Uffe

     Can anyone test this in some other SoC ? Appreciate your help ..

   Can you test this patch  on imx SoC ?

(Your email have some format issue.)

I have tested this patch and it does not break imx SoC. You can add my tag.

Tested-by Dong Aisheng <[email protected]>

However, it looks to me SDHCI_CAN_VDD_180 is only indicating the host VDD capabiliies, not IO voltage capability.
SD3.0 cards require 1.8v IO voltage support.
So should this bit affect SD3.0 support?
e.g. some hosts can only work at VDD_330 (most VDD of SD slot on IMX boards is using external regulator and is fixed to 3.3v), but it can support 1.8v IO voltage, so it can support SD3.0 cards as well.

Ulf,
Can you help confirm it?

Regards
Dong Aisheng

Quoted 33 lines

     --
     Thanks,
     with regards,
     Suman Tripathi
   --
   Thanks,
   with regards,
   Suman Tripathi
References
Visible links
1. mailto:stripathi at apm.com
2. mailto:ulf.hansson at linaro.org
3. mailto:stripathi at apm.com
4. mailto:stripathi at apm.com
perl: warning: Setting locale failed.
perl: warning: Please check that your locale settings:
	LANGUAGE = (unset),
	LC_ALL = (unset),
	LC_TIME = "zh_CN.UTF-8",
	LC_MONETARY = "zh_CN.UTF-8",
	LC_ADDRESS = "zh_CN.UTF-8",
	LC_TELEPHONE = "zh_CN.UTF-8",
	LC_NAME = "zh_CN.UTF-8",
	LC_MEASUREMENT = "zh_CN.UTF-8",
	LC_IDENTIFICATION = "zh_CN.UTF-8",
	LC_NUMERIC = "zh_CN.UTF-8",
	LC_PAPER = "zh_CN.UTF-8",
	LANG = "en_US.UTF-8"
    are supported and installed on your system.
perl: warning: Falling back to the standard locale ("C").

Suman Tripathi

author

2015-06-06 13:56 UTC #10 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

Quoted 46 lines · Dong Aisheng

Quoted 44 lines · Suman Tripathi

   Hi Aisheng,
   On Wed, May 27, 2015 at 7:46 PM, Suman Tripathi <[1][email protected]>
   wrote:

     On Tue, May 26, 2015 at 6:06 PM, Ulf Hansson <[2][email protected]>
     wrote:

       On 21 May 2015 at 10:43, Suman Tripathi <[3][email protected]> wrote:
       > The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk.
       > This patch adds the support to disable SDR104/SDR50/DDR50 based on
       > reading the capability register 0.
       >
       > Signed-off-by: Suman Tripathi <[4][email protected]>
       > ---
       > ---
       >  drivers/mmc/host/sdhci.c | 3 ++-
       >  1 file changed, 2 insertions(+), 1 deletion(-)
       >
       > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
       > index 58c1770..a3d9b8a 100644
       > --- a/drivers/mmc/host/sdhci.c
       > +++ b/drivers/mmc/host/sdhci.c
       > @@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host)
       >                 }
       >         }
       >
       > -       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V)
       > +       if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V ||
       > +           !(caps[0] & SDHCI_CAN_VDD_180))
       >                 caps[1] &= ~(SDHCI_SUPPORT_SDR104 |
       SDHCI_SUPPORT_SDR50 |
       >                        SDHCI_SUPPORT_DDR50);
       >
       > --
       > 1.8.2.1
       >

       I have no problem with this patch, except that it would be nice to get
       a few "tested by" to make sure it doesn't break UHS support for some
       SoCs.

       Kind regards
       Uffe

Quoted 6 lines

Quoted 4 lines
Can anyone test this in some other SoC ? Appreciate your help ..
Can you test this patch on imx SoC ?
(Your email have some format issue.)

Yeah missed to sent in plain text mode.

Quoted 4 lines

I have tested this patch and it does not break imx SoC. You can add my tag.
Tested-by Dong Aisheng <[email protected]>

Thanks Dong !!

Quoted 3 lines

However, it looks to me SDHCI_CAN_VDD_180 is only indicating the host VDD capabiliies, not IO voltage capability.

Are you sure on this ?? If SDHCI host VDD is 1.8V then the cards are also capable to operate at 1.8V ? Didn't understand what you mean by IO voltage capability

Quoted 2 lines

SD3.0 cards require 1.8v IO voltage support.
So should this bit affect SD3.0 support?

The preset value resgister says that SDR modes requires 1.8V and we disable the modes based on capability or quirk.

Quoted 3 lines

e.g. some hosts can only work at VDD_330 (most VDD of SD slot on IMX boards is using external regulator and is fixed to 3.3v), but it can support 1.8v IO voltage, so it can support SD3.0 cards as well.

Same for us but somehow 1.8v is broken in our version. Yeah so those host can still use 1.8V by not setting the quirk or not setting the capability register.

Quoted 40 lines

Ulf,
Can you help confirm it?
Regards
Dong Aisheng
Quoted 33 lines
     --
     Thanks,
     with regards,
     Suman Tripathi
   --
   Thanks,
   with regards,
   Suman Tripathi
References
Visible links
1. mailto:stripathi at apm.com
2. mailto:ulf.hansson at linaro.org
3. mailto:stripathi at apm.com
4. mailto:stripathi at apm.com
perl: warning: Setting locale failed.
perl: warning: Please check that your locale settings:
      LANGUAGE = (unset),
      LC_ALL = (unset),
      LC_TIME = "zh_CN.UTF-8",
      LC_MONETARY = "zh_CN.UTF-8",
      LC_ADDRESS = "zh_CN.UTF-8",
      LC_TELEPHONE = "zh_CN.UTF-8",
      LC_NAME = "zh_CN.UTF-8",
      LC_MEASUREMENT = "zh_CN.UTF-8",
      LC_IDENTIFICATION = "zh_CN.UTF-8",
      LC_NUMERIC = "zh_CN.UTF-8",
      LC_PAPER = "zh_CN.UTF-8",
      LANG = "en_US.UTF-8"
    are supported and installed on your system.
perl: warning: Falling back to the standard locale ("C").

Signature · 3 lines

Thanks,
with regards,
Suman Tripathi

Ulf Hansson

2015-06-08 08:37 UTC #11 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

[...]

Quoted 6 lines

Quoted 5 lines
Quoted 3 lines
Can you test this patch on imx SoC ?
(Your email have some format issue.)

Quoted 12 lines

Yeah missed to sent in plain text mode.
Quoted 4 lines
I have tested this patch and it does not break imx SoC. You can add my tag.
Tested-by Dong Aisheng <[email protected]>
Thanks Dong !!
Quoted 3 lines
However, it looks to me SDHCI_CAN_VDD_180 is only indicating the host VDD capabiliies, not IO voltage capability.

I think Dong is correct. I don't think SDHCI_CAN_VDD_180 is not related to UHS modes at all.

At least the name of the field (SDHCI_CAN_VDD_180) indicates it's about VDD/VCC, the core power and not the IO voltage.

Quoted 10 lines

Are you sure on this ?? If SDHCI host VDD is 1.8V then the cards are also capable to operate at 1.8V ? Didn't understand what you mean by IO voltage capability
Quoted 2 lines
SD3.0 cards require 1.8v IO voltage support.
So should this bit affect SD3.0 support?
The preset value resgister says that SDR modes requires 1.8V and we disable the modes based on capability or quirk.

It requires 1.8V *IO voltage*, not VDD/VCC.

[...]

Kind regards
Uffe

Ulf Hansson

2015-06-08 08:38 UTC #12 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

Quoted 15 lines · Ulf Hansson

[...]
Quoted 13 lines
Quoted 5 lines
Quoted 3 lines
Can you test this patch on imx SoC ?
(Your email have some format issue.)
Yeah missed to sent in plain text mode.
Quoted 4 lines
I have tested this patch and it does not break imx SoC. You can add my tag.
Tested-by Dong Aisheng <[email protected]>

Quoted 7 lines

Quoted 5 lines
Thanks Dong !!
Quoted 3 lines
However, it looks to me SDHCI_CAN_VDD_180 is only indicating the host VDD capabiliies, not IO voltage capability.
I think Dong is correct. I don't think SDHCI_CAN_VDD_180 is not

/s /is not /is

Quoted 22 lines

related to UHS modes at all.
At least the name of the field (SDHCI_CAN_VDD_180) indicates it's about VDD/VCC, the core power and not the IO voltage.
Quoted 10 lines
Are you sure on this ?? If SDHCI host VDD is 1.8V then the cards are also capable to operate at 1.8V ? Didn't understand what you mean by IO voltage capability
Quoted 2 lines
SD3.0 cards require 1.8v IO voltage support.
So should this bit affect SD3.0 support?
The preset value resgister says that SDR modes requires 1.8V and we disable the modes based on capability or quirk.
It requires 1.8V *IO voltage*, not VDD/VCC.
[...]
Kind regards
Uffe

Suman Tripathi

author

2015-06-10 18:24 UTC #13 lore raw

PATCH RESEND v7 2/2 mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0.

Hi Ulf, Dong

Quoted 19 lines · Ulf Hansson

Quoted 18 lines · Ulf Hansson
[...]
Quoted 16 lines
Quoted 5 lines
Quoted 3 lines
Can you test this patch on imx SoC ?
(Your email have some format issue.)
Yeah missed to sent in plain text mode.
Quoted 4 lines
I have tested this patch and it does not break imx SoC. You can add my tag.
Tested-by Dong Aisheng <[email protected]>
Thanks Dong !!
Quoted 1 line

Quoted 24 lines

Quoted 4 lines
Quoted 2 lines
Quoted 2 lines
However, it looks to me SDHCI_CAN_VDD_180 is only indicating the host VDD capabiliies, not IO voltage capability.
I think Dong is correct. I don't think SDHCI_CAN_VDD_180 is not
/s /is not /is
Quoted 17 lines
related to UHS modes at all.
At least the name of the field (SDHCI_CAN_VDD_180) indicates it's about VDD/VCC, the core power and not the IO voltage.
Quoted 10 lines
Are you sure on this ?? If SDHCI host VDD is 1.8V then the cards are also capable to operate at 1.8V ? Didn't understand what you mean by IO voltage capability
Quoted 2 lines
SD3.0 cards require 1.8v IO voltage support.
So should this bit affect SD3.0 support?
The preset value resgister says that SDR modes requires 1.8V and we disable the modes based on capability or quirk.
It requires 1.8V *IO voltage*, not VDD/VCC.

I agree on this now . I will post a version where this quirk will be added for arasan 4.9a that doesn't support 1.8v voltage signalling.

Quoted 5 lines

Quoted 5 lines
[...]
Kind regards
Uffe

Signature · 3 lines

Thanks,
with regards,
Suman Tripathi