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pinctrl: tegra-xusb: Clean-up and fixes

PATCH New Jon Hunter 3 participants 5 messages May 27, 2015 – Jun 1, 2015 3 messages not in the archive

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Jon Hunter

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#0 lore raw

v2 cover pinctrl: tegra-xusb: Clean-up and fixes

Some clean-up and fixes for tegra-xusb driver.

This had been boot tested on tegra20-trimslice, tegra30-beaver, tegra114-dalmore-a04 and tegra124-jetson-tk1 and no issues seen. Complete test information can be found below.

http://nvt.pwsan.com/pub/jonathanh-tester/testlogs/test_20150527055028_b031599c28a38c92b745822d702e9b073d49dbaa/20150527055028

Changes since v1:
- Dropped 3rd patch as it was unnecessary
- Simplified implementation of get_group_pins function based upon Thierry's feedback.

Jon Hunter (2):
pinctrl: tegra-xusb: Remove unused structure
pinctrl: tegra-xusb: Fix allocation of pins

 drivers/pinctrl/pinctrl-tegra-xusb.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)
Signature · 1 line
1.9.1

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#2 lore raw

PATCH v2 1/2 pinctrl: tegra-xusb: Remove unused structure

The structure tegra_xusb_padctl_group is defined but never used and so remove this.

Signed-off-by Jon Hunter <[email protected]>
Acked-by Thierry Reding <[email protected]>
---
 drivers/pinctrl/pinctrl-tegra-xusb.c | 5 -----
 1 file changed, 5 deletions(-)
drivers/pinctrl/pinctrl-tegra-xusb.c +0 -5
index 753d747d4261..3e8e4a914fb4 100644
@@ -59,11 +59,6 @@ struct tegra_xusb_padctl_function {
 	unsigned int num_groups;
 };
 
-struct tegra_xusb_padctl_group {
-	const unsigned int *funcs;
-	unsigned int num_funcs;
-};
-
 struct tegra_xusb_padctl_soc {
 	const struct pinctrl_pin_desc *pins;
 	unsigned int num_pins;
Signature · 1 line
1.9.1

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#5 lore raw

PATCH v2 2/2 pinctrl: tegra-xusb: Fix allocation of pins

In reply to a message not in the archive

Commit e5b3b2d9ed20 ("pinctrl: allows not to define the get_group_pins operation") allows pin controllers not to register the get_group_pins() function. However, a side-effect of not registering this function is that pins are not allocated and potentially multiple devices could attempt to configure the same pins [1]. Although this problem exists in the pinctrl core, because only a few devices are impacted by this, fix this for tegra-xusb by adding the get_group_pins() function.

Please note that in addition to adding the get_group_pins() functions the pins/lanes for the tegra-xusb also need to be registered when calling pinctrl_register(). This also allows the current pinmux state to be viewed by the debugfs node "pinmux-pins" for the tegra-xusb pad controller.

[1] http://www.spinics.net/lists/linux-gpio/msg05810.html

Signed-off-by Jon Hunter <[email protected]>
Acked-by Thierry Reding <[email protected]>
---
 drivers/pinctrl/pinctrl-tegra-xusb.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
drivers/pinctrl/pinctrl-tegra-xusb.c +18 -0
index 3e8e4a914fb4..6a6eebfb2930 100644
@@ -125,6 +125,21 @@ static const char *tegra_xusb_padctl_get_group_name(struct pinctrl_dev *pinctrl,
 	return padctl->soc->pins[group].name;
 }
 
+static int tegra_xusb_padctl_get_group_pins(struct pinctrl_dev *pinctrl,
+					    unsigned group,
+					    const unsigned **pins,
+					    unsigned *num_pins)
+{
+	/*
+	 * For the tegra-xusb pad controller groups are synonomous
+	 * with lanes/pins and there is always one lane/pin per group.
+	 */
+	*pins = &pinctrl->desc->pins[group].number;
+	*num_pins = 1;
+
+	return 0;
+}
+
 enum tegra_xusb_padctl_param {
 	TEGRA_XUSB_PADCTL_IDDQ,
 };

@@ -248,6 +263,7 @@ static int tegra_xusb_padctl_dt_node_to_map(struct pinctrl_dev *pinctrl,
 static const struct pinctrl_ops tegra_xusb_padctl_pinctrl_ops = {
 	.get_groups_count = tegra_xusb_padctl_get_groups_count,
 	.get_group_name = tegra_xusb_padctl_get_group_name,
+	.get_group_pins = tegra_xusb_padctl_get_group_pins,
 	.dt_node_to_map = tegra_xusb_padctl_dt_node_to_map,
 	.dt_free_map = pinctrl_utils_dt_free_map,
 };

@@ -898,6 +914,8 @@ static int tegra_xusb_padctl_probe(struct platform_device *pdev)
 
 	memset(&padctl->desc, 0, sizeof(padctl->desc));
 	padctl->desc.name = dev_name(padctl->dev);
+	padctl->desc.pins = tegra124_pins;
+	padctl->desc.npins = ARRAY_SIZE(tegra124_pins);
 	padctl->desc.pctlops = &tegra_xusb_padctl_pinctrl_ops;
 	padctl->desc.pmxops = &tegra_xusb_padctl_pinmux_ops;
 	padctl->desc.confops = &tegra_xusb_padctl_pinconf_ops;
Signature · 1 line
1.9.1

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#7 lore raw

Re: [PATCH V2 2/2] pinctrl: tegra-xusb: Fix allocation of pins

Quoted 14 lines · Jon Hunter

Commit e5b3b2d9ed20 ("pinctrl: allows not to define the get_group_pins operation") allows pin controllers not to register the get_group_pins() function. However, a side-effect of not registering this function is that pins are not allocated and potentially multiple devices could attempt to configure the same pins [1]. Although this problem exists in the pinctrl core, because only a few devices are impacted by this, fix this for tegra-xusb by adding the get_group_pins() function.

Please note that in addition to adding the get_group_pins() functions the pins/lanes for the tegra-xusb also need to be registered when calling pinctrl_register(). This also allows the current pinmux state to be viewed by the debugfs node "pinmux-pins" for the tegra-xusb pad controller.

Quoted 4 lines

[1] http://www.spinics.net/lists/linux-gpio/msg05810.html

Signed-off-by Jon Hunter <[email protected]>
Acked-by Thierry Reding <[email protected]>

Patch applied.

Yours,
Linus Walleij