perf tools: Introduce an abstraction for AUX Area and Instruction Tracing
Adrian Hunter
reviewerv6 cover perf tools: Introduce an abstraction for AUX Area and Instruction Tracing
Hi
Here is V6 patches for the introduction of an abstraction for using the AUX area and Instruction tracing. The patches for AUX area support have been applied, just leaving patches for Intel PT and Intel BTS.
The patches can also be found here:
http://git.infradead.org/users/ahunter/linux-perf.git
An example (unchanged from V3) perf.data file and build id archive can be found here:
http://git.infradead.org/~ahunter/tfr/
There is also a tar of the 3 most relevant files with debugging symbols. These need to be placed in under the correct paths in /usr/lib/debug to get symbols.
Changes in V6:
Some minor expansion of commit messages.
Patches already applied:
perf tools: Disallow PMU events intel_pt and intel_bts until there is support
perf db-export: Fix thread ref-counting
New patch
perf tools: Ensure thread-stack is flushed
New patch
perf tools: Add Intel PT support
Support thread ref-counting
perf tools: Add Intel PT decoder
Fix a bug: FUP packet in PSB to update last IP
perf tools: Take Intel PT into use
Add Overview and Quickstart sections to intel_pt.txt
perf tools: Add Intel BTS support
Add Overview to intel_bts.txt
Support thread ref-counting
perf tools: Add example call-graph script
Add documentation comments to scripts
Changes in V5:
Patches already applied:
perf report: Fix placement of itrace option in documentation perf tools: Add AUX area tracing index
perf tools: Hit all build ids when AUX area tracing
perf tools: Add build option NO_AUXTRACE to exclude AUX area tracing perf auxtrace: Add option to synthesize events for transactions perf tools: Add support for PERF_RECORD_AUX
perf tools: Add support for PERF_RECORD_ITRACE_START perf tools: Add AUX area tracing Snapshot Mode
perf record: Add AUX area tracing Snapshot Mode support
perf tools: Disallow PMU events intel_pt and intel_bts until there is support
New patch
perf tools: Add Intel PT decoder
Style improvements pointed out by Acme: aligning '=', single line initializing Make use of zalloc() not malloc / memset
Make use of zfree
Map internal error codes to fixed constants for output
Change intel_pt_error_message() to intel_pt__strerror()
perf tools: Add Intel PT support
Make use of zfree
perf tools: Take Intel PT into use
Allow "intel_pt" PMU to be selected as an event
perf tools: Add Intel BTS support
Allow "intel_bts" PMU to be selected as an event Make use of zfree
Map internal error codes to fixed constants for output Let "intel_bts" show up in 'perf list'
perf tools: Output sample flags and insn_len from intel_bts
Map internal error codes to fixed constants for output
Changes on V4:
perf tools: Amend mmap ref counting for the AUX area mmap
Dropped because already applied
perf script: Always allow fields 'addr' and 'cpu' for auxtrace
Dropped because already applied
perf report: Add Instruction Tracing support
Dropped because already applied
perf report: Fix placement of itrace option in documentation
New patch
perf tools: Add AUX area tracing index
Change size checks for more flexibility i.e.
- don't mind if an indexed auxtrace_event is bigger than struct auxtrace_event
- don't mind if the auxtrace index does not fill the whole file section
Rename 'index' variable to 'ent' to avoid build errors on older gcc
perf tools: Add build option NO_AUXTRACE to exclude AUX area tracing
Fix whitespace alignment of NO_AUXTRACE=1
Add NO_AUXTRACE=1 to make_minimal
perf tools: Add support for PERF_RECORD_AUX
Expand commit message
perf tools: Add AUX area tracing Snapshot Mode
Whitespace fixups
perf record: Add AUX area tracing Snapshot Mode support
Whitespace fixups
Don't init static variables to 0 or NULL
perf tools: Add Intel PT packet decoder
Whitespace fixups
perf tools: Add Intel PT instruction decoder
Avoid build error on older (broken) gcc by adding -Wno-override-init Avoid build errors due to funny collate sequences i.e. use LC_COLLATE=C etc
perf tools: Add Intel PT decoder
Avoid build errors initializing structures to 0
perf tools: Add Intel PT support
Avoid build errors initializing structures to 0
Allow for perf_pmu__config_terms() having an extra parameter now Allow for parse_events() having an extra parameter now Rename 'div' variable to 'd' to avoid build errors Whitespace fixup
Remove a couple of unused enums
perf tools: Add Intel BTS support
Avoid build errors initializing structures to 0 Allow for parse_events() having an extra parameter now
perf tools: Put itrace options into an asciidoc include
New patch
Changes in V3:
New patch:
perf tools: Amend mmap ref counting for the AUX area mmap
Move some code under arch:
perf tools: Add Intel PT support
perf tools: Add Intel BTS support
Updated documentation:
perf report: Add Instruction Tracing support
perf auxtrace: Add option to synthesize events for transactions perf tools: Take Intel PT into use
perf tools: Add Intel BTS support
Patches already applied:
perf header: Add AUX area tracing feature
perf evlist: Add support for mmapping an AUX area buffer
perf tools: Add user events for AUX area tracing
perf tools: Add support for AUX area recording
perf record: Add basic AUX area tracing support
perf record: Extend -m option for AUX area tracing mmap pages perf tools: Add a user event for AUX area tracing errors
perf session: Add hooks to allow transparent decoding of AUX area tracing data perf session: Add instruction tracing options
perf auxtrace: Add helpers for AUX area tracing errors
perf auxtrace: Add helpers for queuing AUX area tracing data perf auxtrace: Add a heap for sorting AUX area tracing queues perf auxtrace: Add processing for AUX area tracing events
perf auxtrace: Add a hashtable for caching
perf tools: Add member to struct dso for an instruction cache perf script: Add Instruction Tracing support
perf inject: Re-pipe AUX area tracing events
perf inject: Add Instruction Tracing support
perf script: Add field option 'flags' to print sample flags
perf tools: Add aux_watermark member of struct perf_event_attr
Changes in V2:
Get rid of MIN()
perf auxtrace: Add helpers for AUX area tracing errors perf inject: Re-pipe AUX area tracing events
perf tools: Add build option NO_AUXTRACE to exclude AUX area tracing
Intel BTS can be used on most recent Intel CPUs. Intel PT is available on Broadwell.
Examples:
Trace 'ls' with Intel BTS userspace only
perf record --per-thread -e intel_bts//u ls perf report
perf script
Trace 'ls' with Intel BTS kernel and userspace
~/libexec/perf-core/perf-with-kcore record bts-ls --per-thread -e intel_bts// -- ls ~/libexec/perf-core/perf-with-kcore report bts-ls ~/libexec/perf-core/perf-with-kcore script bts-ls
Trace 'ls' with Intel PT userspace only
perf record -e intel_pt//u ls
perf report
perf script
Trace 'ls' with Intel PT kernel and userspace
~/libexec/perf-core/perf-with-kcore record pt-ls -e intel_pt// -- ls ~/libexec/perf-core/perf-with-kcore report pt-ls ~/libexec/perf-core/perf-with-kcore script pt-ls
The abstraction has two separate aspects:
1. recording AUX area data
2. processing AUX area data
Recording consists of mmapping a separate buffer and copying the data into the perf.data file. The buffer is an AUX area buffer. The data is written preceded by a new user event PERF_RECORD_AUXTRACE. The data is too big to fit in the event but follows immediately afterward. Session processing has to skip to get to the next event header in a similar fashion to the existing PERF_RECORD_HEADER_TRACING_DATA
event. The main recording patches are:
perf evlist: Add support for mmapping an AUX area buffer perf tools: Add user events for AUX area tracing perf tools: Add support for AUX area recording perf record: Add basic AUX area tracing support
Processing consists of providing hooks in session processing to enable a decoder to see all the events and deliver synthesized events transparently into the event stream. The main processing patch is:
perf session: Add hooks to allow transparent decoding of AUX area tracing data
Adrian Hunter (17):
perf db-export: Fix thread ref-counting
perf tools: Ensure thread-stack is flushed
perf auxtrace: Add Intel PT as an AUX area tracing type perf tools: Add Intel PT packet decoder
perf tools: Add Intel PT instruction decoder
perf tools: Add Intel PT log
perf tools: Add Intel PT decoder
perf tools: Add Intel PT support
perf tools: Take Intel PT into use
perf tools: Allow auxtrace data alignment
perf tools: Add Intel BTS support
perf tools: Output sample flags and insn_len from intel_pt perf tools: Output sample flags and insn_len from intel_bts perf tools: Intel PT to always update thread stack trace number perf tools: Intel BTS to always update thread stack trace number perf tools: Put itrace options into an asciidoc include perf tools: Add example call-graph script
tools/build/Makefile.build | 2 + tools/perf/.gitignore | 2 + tools/perf/Documentation/intel-bts.txt | 86 + tools/perf/Documentation/intel-pt.txt | 588 ++++++ tools/perf/Documentation/itrace.txt | 22 + tools/perf/Documentation/perf-inject.txt | 23 +- tools/perf/Documentation/perf-report.txt | 23 +- tools/perf/Documentation/perf-script.txt | 23 +- tools/perf/Makefile.perf | 12 +- tools/perf/arch/x86/util/Build | 5 + tools/perf/arch/x86/util/auxtrace.c | 83 + tools/perf/arch/x86/util/intel-bts.c | 458 +++++ tools/perf/arch/x86/util/intel-pt.c | 752 ++++++++ tools/perf/arch/x86/util/pmu.c | 18 + .../scripts/python/call-graph-from-postgresql.py | 327 ++++ tools/perf/scripts/python/export-to-postgresql.py | 47 + tools/perf/util/Build | 3 + tools/perf/util/auxtrace.c | 16 +- tools/perf/util/auxtrace.h | 3 + tools/perf/util/db-export.c | 19 +- tools/perf/util/intel-bts.c | 921 ++++++++++ tools/perf/util/intel-bts.h | 43 + tools/perf/util/intel-pt-decoder/Build | 14 + .../perf/util/intel-pt-decoder/intel-pt-decoder.c | 1759 ++++++++++++++++++ .../perf/util/intel-pt-decoder/intel-pt-decoder.h | 102 ++ .../util/intel-pt-decoder/intel-pt-insn-decoder.c | 246 +++ .../util/intel-pt-decoder/intel-pt-insn-decoder.h | 65 + tools/perf/util/intel-pt-decoder/intel-pt-log.c | 155 ++ tools/perf/util/intel-pt-decoder/intel-pt-log.h | 52 + .../util/intel-pt-decoder/intel-pt-pkt-decoder.c | 400 +++++ .../util/intel-pt-decoder/intel-pt-pkt-decoder.h | 64 + tools/perf/util/intel-pt.c | 1895 ++++++++++++++++++++ tools/perf/util/intel-pt.h | 51 + tools/perf/util/machine.c | 21 + tools/perf/util/machine.h | 3 + tools/perf/util/pmu.c | 4 - tools/perf/util/session.c | 20 + tools/perf/util/thread-stack.c | 18 +- tools/perf/util/thread-stack.h | 1 + 39 files changed, 8259 insertions(+), 87 deletions(-) create mode 100644 tools/perf/Documentation/intel-bts.txt create mode 100644 tools/perf/Documentation/intel-pt.txt create mode 100644 tools/perf/Documentation/itrace.txt create mode 100644 tools/perf/arch/x86/util/auxtrace.c create mode 100644 tools/perf/arch/x86/util/intel-bts.c create mode 100644 tools/perf/arch/x86/util/intel-pt.c create mode 100644 tools/perf/arch/x86/util/pmu.c create mode 100644 tools/perf/scripts/python/call-graph-from-postgresql.py create mode 100644 tools/perf/util/intel-bts.c create mode 100644 tools/perf/util/intel-bts.h create mode 100644 tools/perf/util/intel-pt-decoder/Build create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-decoder.h create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-log.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-log.h create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.h create mode 100644 tools/perf/util/intel-pt.c create mode 100644 tools/perf/util/intel-pt.h
Regards
Adrian
Adrian Hunter
reviewerPATCH v6 1/17 perf db-export: Fix thread ref-counting
Thread ref-counting was not done for get_main_thread() meaning that there was a thread__get() from machine__find_thread() that was not being paired with thread__put(). Fix that.
--- tools/perf/util/db-export.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)
tools/perf/util/db-export.c +10 -9
@@ -234,7 +234,7 @@ int db_export__symbol(struct db_export *dbe, struct symbol *sym,static struct thread *get_main_thread (struct machine *machine,struct thread *thread) {if (thread->pid_ == thread->tid) -return thread; +return thread__get (thread);if (thread->pid_ ==-1 )return NULL ;
@@ -308,19 +308,18 @@ int db_export__sample(struct db_export *dbe, union perf_event *event,if (err)return err; -/* FIXME: check refcounting for get_main_thread, that calls machine__find_thread... */ main_thread =get_main_thread (al->machine, thread);if (main_thread) comm =machine__thread_exec_comm (al->machine, main_thread); err =db_export__thread (dbe, thread, al->machine, comm);if (err) -return err; + goto out_put;if (comm) { err =db_export__comm (dbe, comm, main_thread);if (err) -return err; + goto out_put; es.comm_db_id = comm->db_id; }
@@ -328,7 +327,7 @@ int db_export__sample(struct db_export *dbe, union perf_event *event, err =db_ids_from_al (dbe, al, &es.dso_db_id, &es.sym_db_id, &es.offset);if (err) -return err; + goto out_put;if ((evsel->attr.sample_type &PERF_SAMPLE_ADDR ) &&sample_addr_correlates_sym (&evsel->attr)) {
@@ -338,20 +337,22 @@ int db_export__sample(struct db_export *dbe, union perf_event *event, err =db_ids_from_al (dbe, &addr_al, &es.addr_dso_db_id, &es.addr_sym_db_id, &es.addr_offset);if (err) -return err; + goto out_put;if (dbe->crp) { err =thread_stack__process (thread, comm, sample, al, &addr_al, es.db_id, dbe->crp);if (err) -return err; + goto out_put; } }if (dbe->export_sample) -return dbe->export_sample (dbe, &es); + err = dbe->export_sample (dbe, &es); -return 0 ; +out_put: +thread__put (main_thread); +return err; } static struct {
Signature · 1 line
1.9.1
tip-bot for Adrian Hunter
merge bot[tip:perf/core] perf db-export: Fix thread ref-counting
perf db-export: Fix thread ref-counting
Commit-ID: 427cde3287f2c6349f308d0e22c9223f9ea05ef1 Gitweb: http://git.kernel.org/tip/427cde3287f2c6349f308d0e22c9223f9ea05ef1 Author: Adrian Hunter <[email protected]> AuthorDate: Fri, 29 May 2015 16:33:29 +0300 Committer: Arnaldo Carvalho de Melo <[email protected]> CommitDate: Fri, 29 May 2015 12:43:39 -0300
perf db-export: Fix thread ref-counting
Thread ref-counting was not done for get_main_thread() meaning that there was a thread__get() from machine__find_thread() that was not being paired with thread__put(). Fix that.
--- tools/perf/util/db-export.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)
tools/perf/util/db-export.c +10 -9
@@ -234,7 +234,7 @@ int db_export__symbol(struct db_export *dbe, struct symbol *sym,static struct thread *get_main_thread (struct machine *machine,struct thread *thread) {if (thread->pid_ == thread->tid) -return thread; +return thread__get (thread);if (thread->pid_ ==-1 )return NULL ;
@@ -308,19 +308,18 @@ int db_export__sample(struct db_export *dbe, union perf_event *event,if (err)return err; -/* FIXME: check refcounting for get_main_thread, that calls machine__find_thread... */ main_thread =get_main_thread (al->machine, thread);if (main_thread) comm =machine__thread_exec_comm (al->machine, main_thread); err =db_export__thread (dbe, thread, al->machine, comm);if (err) -return err; + goto out_put;if (comm) { err =db_export__comm (dbe, comm, main_thread);if (err) -return err; + goto out_put; es.comm_db_id = comm->db_id; }
@@ -328,7 +327,7 @@ int db_export__sample(struct db_export *dbe, union perf_event *event, err =db_ids_from_al (dbe, al, &es.dso_db_id, &es.sym_db_id, &es.offset);if (err) -return err; + goto out_put;if ((evsel->attr.sample_type &PERF_SAMPLE_ADDR ) &&sample_addr_correlates_sym (&evsel->attr)) {
@@ -338,20 +337,22 @@ int db_export__sample(struct db_export *dbe, union perf_event *event, err =db_ids_from_al (dbe, &addr_al, &es.addr_dso_db_id, &es.addr_sym_db_id, &es.addr_offset);if (err) -return err; + goto out_put;if (dbe->crp) { err =thread_stack__process (thread, comm, sample, al, &addr_al, es.db_id, dbe->crp);if (err) -return err; + goto out_put; } }if (dbe->export_sample) -return dbe->export_sample (dbe, &es); + err = dbe->export_sample (dbe, &es); -return 0 ; +out_put: +thread__put (main_thread); +return err; } static struct {
Adrian Hunter
reviewerPATCH v6 2/17 perf tools: Ensure thread-stack is flushed
In reply to Adrian HunterThe thread-stack represents a thread's current stack. When a thread exits there can still be many functions on the stack e.g. exit() can be called many levels deep, so all the callers will never return. To get that information output, the thread-stack must be flushed.
Previously it was assumed the thread-stack would be flushed when the struct thread was deleted. With thread ref-counting it is no longer clear when that will be, if ever. So instead explicitly flush all the thread-stacks at the end of a session.
--- tools/perf/util/machine.c | 21 +++++++++++++++++++++ tools/perf/util/machine.h | 3 +++ tools/perf/util/session.c | 20 ++++++++++++++++++++ tools/perf/util/thread-stack.c | 18 +++++++++++++----- tools/perf/util/thread-stack.h | 1 + 5 files changed, 58 insertions(+), 5 deletions(-)
tools/perf/util/machine.c +21 -0
@@ -1845,6 +1845,27 @@ int machine__for_each_thread(struct machine *machine,return rc; } +int machines__for_each_thread (struct machines *machines, +int (*fn)(struct thread *thread,void *p), +void *priv) +{ +struct rb_node *nd; +int rc =0 ; + + rc =machine__for_each_thread (&machines->host, fn, priv); +if (rc !=0 ) +return rc; + +for (nd =rb_first (&machines->guests); nd; nd =rb_next (nd)) { + struct machine *machine = rb_entry(nd, struct machine, rb_node); + + rc =machine__for_each_thread (machine, fn, priv); +if (rc !=0 ) +return rc; + } +return rc; +} +int __machine__synthesize_threads (struct machine *machine,struct perf_tool *tool,struct target *target,struct thread_map *threads,perf_event__handler_t process,bool data_mmap)
tools/perf/util/machine.h +3 -0
@@ -213,6 +213,9 @@ size_t machine__fprintf_vmlinux_path(struct machine *machine, FILE *fp);int machine__for_each_thread (struct machine *machine,int (*fn)(struct thread *thread,void *p),void *priv); +int machines__for_each_thread (struct machines *machines, +int (*fn)(struct thread *thread,void *p), +void *priv); int __machine__synthesize_threads(struct machine *machine, struct perf_tool *tool, struct target *target, struct thread_map *threads,
tools/perf/util/session.c +20 -0
@@ -16,6 +16,7 @@#include "perf_regs.h" #include "asm/bug.h" #include "auxtrace.h" +#include "thread-stack.h" static int perf_session__deliver_event(struct perf_session *session, union perf_event *event,
@@ -1320,6 +1321,19 @@ static void perf_session__warn_about_errors(const struct perf_session *session)events_stats__auxtrace_error_warn (stats); } +static int perf_session__flush_thread_stack (struct thread *thread, +void *p__maybe_unused ) +{ +return thread_stack__flush (thread); +} + +static int perf_session__flush_thread_stacks (struct perf_session *session) +{ +return machines__for_each_thread (&session->machines, + perf_session__flush_thread_stack, +NULL ); +} +volatile int session_done;static int __perf_session__process_pipe_events (struct perf_session *session)
@@ -1409,6 +1423,9 @@ done:if (err) goto out_err; err =auxtrace__flush_events (session, tool); +if (err) + goto out_err; + err =perf_session__flush_thread_stacks (session); out_err:free (buf);perf_session__warn_about_errors (session);
@@ -1559,6 +1576,9 @@ out:if (err) goto out_err; err =auxtrace__flush_events (session, tool); +if (err) + goto out_err; + err =perf_session__flush_thread_stacks (session); out_err:ui_progress__finish ();perf_session__warn_about_errors (session);
tools/perf/util/thread-stack.c +13 -5
@@ -219,7 +219,7 @@ static int thread_stack__call_return(struct thread *thread,return crp->process (&cr, crp->data); } -static int thread_stack__flush (struct thread *thread,struct thread_stack *ts) +static int __thread_stack__flush (struct thread *thread,struct thread_stack *ts) {struct call_return_processor *crp = ts->crp;int err;
@@ -242,6 +242,14 @@ static int thread_stack__flush(struct thread *thread, struct thread_stack *ts)return 0 ; } +int thread_stack__flush (struct thread *thread) +{ +if (thread->ts) +return __thread_stack__flush (thread, thread->ts); + +return 0 ; +} +int thread_stack__event (struct thread *thread,u32 flags,u64 from_ip,u64 to_ip,u16 insn_len,u64 trace_nr) {
@@ -264,7 +272,7 @@ int thread_stack__event(struct thread *thread, u32 flags, u64 from_ip,*/ if (trace_nr != thread->ts->trace_nr) {if (thread->ts->trace_nr) -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts); thread->ts->trace_nr = trace_nr; }
@@ -297,7 +305,7 @@ void thread_stack__set_trace_nr(struct thread *thread, u64 trace_nr)if (trace_nr != thread->ts->trace_nr) {if (thread->ts->trace_nr) -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts); thread->ts->trace_nr = trace_nr; } }
@@ -305,7 +313,7 @@ void thread_stack__set_trace_nr(struct thread *thread, u64 trace_nr)void thread_stack__free (struct thread *thread) {if (thread->ts) { -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts);zfree (&thread->ts->stack);zfree (&thread->ts); }
@@ -689,7 +697,7 @@ int thread_stack__process(struct thread *thread, struct comm *comm,/* Flush stack on exec */ if (ts->comm != comm && thread->pid_ == thread->tid) { - err =thread_stack__flush (thread, ts); + err =__thread_stack__flush (thread, ts);if (err)return err; ts->comm = comm;
tools/perf/util/thread-stack.h +1 -0
@@ -96,6 +96,7 @@ int thread_stack__event(struct thread *thread, u32 flags, u64 from_ip,void thread_stack__set_trace_nr (struct thread *thread,u64 trace_nr);void thread_stack__sample (struct thread *thread,struct ip_callchain *chain,size_t sz,u64 ip); +int thread_stack__flush (struct thread *thread);void thread_stack__free (struct thread *thread); struct call_return_processor *
Signature · 1 line
1.9.1
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 02/17] perf tools: Ensure thread-stack is flushed
Em Fri, May 29, 2015 at 04:33:30PM +0300, Adrian Hunter escreveu:
Quoted 9 lines
The thread-stack represents a thread's current stack. When a thread exits there can still be many functions on the stack e.g.
exit()can be called many levels deep, so all the callers will never return. To get that information output, the thread-stack must be flushed.Previously it was assumed the thread-stack would be flushed when the struct thread was deleted. With thread ref-counting it is no longer clear when that will be, if ever. So instead
It'll be when the last reference to that thread is released.
- Arnaldo
Quoted 1 line
explicitly flush all the thread-stacks at the end of a session.
If after the session ends you have no more need for those thread stacks, that is the right way to do it.
With tools like 'report', after the session ends we should have all the unreferenced threads deleted.
Previously they were not being deleted at all, i.e. they were simply moved to the dead_threads list and sat there because I didn't knew if some hist_entry, say, had a pointer to it.
So, unless I am missing something, this patch is required irrespective of thread refcounting, no?
I'm applying it to my work branch where I'm trying to test all this.
- Arnaldo
Quoted 8 lines
Signed-off-by Adrian Hunter <[email protected]>--- tools/perf/util/machine.c | 21 +++++++++++++++++++++ tools/perf/util/machine.h | 3 +++ tools/perf/util/session.c | 20 ++++++++++++++++++++ tools/perf/util/thread-stack.c | 18 +++++++++++++----- tools/perf/util/thread-stack.h | 1 + 5 files changed, 58 insertions(+), 5 deletions(-)
900380
Quoted 177 lines
tools/perf/util/machine.c +21
-0@@ -1845,6 +1845,27 @@ int machine__for_each_thread(struct machine *machine,return rc; } +int machines__for_each_thread (struct machines *machines, +int (*fn)(struct thread *thread,void *p), +void *priv) +{ +struct rb_node *nd; +int rc =0 ; + + rc =machine__for_each_thread (&machines->host, fn, priv); +if (rc !=0 ) +return rc; + +for (nd =rb_first (&machines->guests); nd; nd =rb_next (nd)) { + struct machine *machine = rb_entry(nd, struct machine, rb_node); + + rc =machine__for_each_thread (machine, fn, priv); +if (rc !=0 ) +return rc; + } +return rc; +} +int __machine__synthesize_threads (struct machine *machine,struct perf_tool *tool,struct target *target,struct thread_map *threads,perf_event__handler_t process,bool data_mmap)tools/perf/util/machine.h +3
-0@@ -213,6 +213,9 @@ size_t machine__fprintf_vmlinux_path(struct machine *machine, FILE *fp);int machine__for_each_thread (struct machine *machine,int (*fn)(struct thread *thread,void *p),void *priv); +int machines__for_each_thread (struct machines *machines, +int (*fn)(struct thread *thread,void *p), +void *priv); int __machine__synthesize_threads(struct machine *machine, struct perf_tool *tool, struct target *target, struct thread_map *threads,tools/perf/util/session.c +20
-0@@ -16,6 +16,7 @@#include "perf_regs.h" #include "asm/bug.h" #include "auxtrace.h" +#include "thread-stack.h" static int perf_session__deliver_event(struct perf_session *session, union perf_event *event,@@ -1320,6 +1321,19 @@ static void perf_session__warn_about_errors(const struct perf_session *session)events_stats__auxtrace_error_warn (stats); } +static int perf_session__flush_thread_stack (struct thread *thread, +void *p__maybe_unused ) +{ +return thread_stack__flush (thread); +} + +static int perf_session__flush_thread_stacks (struct perf_session *session) +{ +return machines__for_each_thread (&session->machines, + perf_session__flush_thread_stack, +NULL ); +} +volatile int session_done;static int __perf_session__process_pipe_events (struct perf_session *session)@@ -1409,6 +1423,9 @@ done:if (err) goto out_err; err =auxtrace__flush_events (session, tool); +if (err) + goto out_err; + err =perf_session__flush_thread_stacks (session); out_err:free (buf);perf_session__warn_about_errors (session);@@ -1559,6 +1576,9 @@ out:if (err) goto out_err; err =auxtrace__flush_events (session, tool); +if (err) + goto out_err; + err =perf_session__flush_thread_stacks (session); out_err:ui_progress__finish ();perf_session__warn_about_errors (session);tools/perf/util/thread-stack.c +13
-5@@ -219,7 +219,7 @@ static int thread_stack__call_return(struct thread *thread,return crp->process (&cr, crp->data); } -static int thread_stack__flush (struct thread *thread,struct thread_stack *ts) +static int __thread_stack__flush (struct thread *thread,struct thread_stack *ts) {struct call_return_processor *crp = ts->crp;int err;@@ -242,6 +242,14 @@ static int thread_stack__flush(struct thread *thread, struct thread_stack *ts)return 0 ; } +int thread_stack__flush (struct thread *thread) +{ +if (thread->ts) +return __thread_stack__flush (thread, thread->ts); + +return 0 ; +} +int thread_stack__event (struct thread *thread,u32 flags,u64 from_ip,u64 to_ip,u16 insn_len,u64 trace_nr) {@@ -264,7 +272,7 @@ int thread_stack__event(struct thread *thread, u32 flags, u64 from_ip,*/ if (trace_nr != thread->ts->trace_nr) {if (thread->ts->trace_nr) -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts); thread->ts->trace_nr = trace_nr; }@@ -297,7 +305,7 @@ void thread_stack__set_trace_nr(struct thread *thread, u64 trace_nr)if (trace_nr != thread->ts->trace_nr) {if (thread->ts->trace_nr) -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts); thread->ts->trace_nr = trace_nr; } }@@ -305,7 +313,7 @@ void thread_stack__set_trace_nr(struct thread *thread, u64 trace_nr)void thread_stack__free (struct thread *thread) {if (thread->ts) { -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts);zfree (&thread->ts->stack);zfree (&thread->ts); }@@ -689,7 +697,7 @@ int thread_stack__process(struct thread *thread, struct comm *comm,/* Flush stack on exec */ if (ts->comm != comm && thread->pid_ == thread->tid) { - err =thread_stack__flush (thread, ts); + err =__thread_stack__flush (thread, ts);if (err)return err; ts->comm = comm;tools/perf/util/thread-stack.h +1
-0@@ -96,6 +96,7 @@ int thread_stack__event(struct thread *thread, u32 flags, u64 from_ip,void thread_stack__set_trace_nr (struct thread *thread,u64 trace_nr);void thread_stack__sample (struct thread *thread,struct ip_callchain *chain,size_t sz,u64 ip); +int thread_stack__flush (struct thread *thread);void thread_stack__free (struct thread *thread); struct call_return_processor *Signature · 1 line
1.9.1
Adrian Hunter
reviewerRe: [PATCH V6 02/17] perf tools: Ensure thread-stack is flushed
Quoted 23 lines · Arnaldo Carvalho de Melo
Em Fri, May 29, 2015 at 04:33:30PM +0300, Adrian Hunter escreveu:
Quoted 9 lines
The thread-stack represents a thread's current stack. When a thread exits there can still be many functions on the stack e.g.
exit()can be called many levels deep, so all the callers will never return. To get that information output, the thread-stack must be flushed.Previously it was assumed the thread-stack would be flushed when the struct thread was deleted. With thread ref-counting it is no longer clear when that will be, if ever. So instead
It'll be when the last reference to that thread is released.
- Arnaldo
Quoted 1 line
explicitly flush all the thread-stacks at the end of a session.
If after the session ends you have no more need for those thread stacks, that is the right way to do it.
With tools like 'report', after the session ends we should have all the unreferenced threads deleted.
Quoted 6 lines
Previously they were not being deleted at all, i.e. they were simply moved to the
dead_threadslist and sat there because I didn't knew if somehist_entry, say, had a pointer to it.So, unless I am missing something, this patch is required irrespective of thread refcounting, no?
IIRC we used to delete all the dead threads too, but explicit flushing is better in any case.
Quoted 2 lines
I'm applying it to my work branch where I'm trying to test all this.
Thank you!
tip-bot for Adrian Hunter
merge bot[tip:perf/core] perf tools: Ensure thread-stack is flushed
In reply to Adrian Hunterperf tools: Ensure thread-stack is flushed
Commit-ID: a5499b37197ab4b5fed101370df7ccadacbb4340 Gitweb: http://git.kernel.org/tip/a5499b37197ab4b5fed101370df7ccadacbb4340 Author: Adrian Hunter <[email protected]> AuthorDate: Fri, 29 May 2015 16:33:30 +0300 Committer: Arnaldo Carvalho de Melo <[email protected]> CommitDate: Fri, 19 Jun 2015 16:03:33 -0300
perf tools: Ensure thread-stack is flushed
The thread-stack represents a thread's current stack. When a thread exits there can still be many functions on the stack e.g. exit() can be called many levels deep, so all the callers will never return. To get that information output, the thread-stack must be flushed.
Previously it was assumed the thread-stack would be flushed when the struct thread was deleted. With thread ref-counting it is no longer clear when that will be, if ever. So instead explicitly flush all the thread-stacks at the end of a session.
--- tools/perf/util/machine.c | 21 +++++++++++++++++++++ tools/perf/util/machine.h | 3 +++ tools/perf/util/session.c | 20 ++++++++++++++++++++ tools/perf/util/thread-stack.c | 18 +++++++++++++----- tools/perf/util/thread-stack.h | 1 + 5 files changed, 58 insertions(+), 5 deletions(-)
tools/perf/util/machine.c +21 -0
@@ -1890,6 +1890,27 @@ int machine__for_each_thread(struct machine *machine,return rc; } +int machines__for_each_thread (struct machines *machines, +int (*fn)(struct thread *thread,void *p), +void *priv) +{ +struct rb_node *nd; +int rc =0 ; + + rc =machine__for_each_thread (&machines->host, fn, priv); +if (rc !=0 ) +return rc; + +for (nd =rb_first (&machines->guests); nd; nd =rb_next (nd)) { + struct machine *machine = rb_entry(nd, struct machine, rb_node); + + rc =machine__for_each_thread (machine, fn, priv); +if (rc !=0 ) +return rc; + } +return rc; +} +int __machine__synthesize_threads (struct machine *machine,struct perf_tool *tool,struct target *target,struct thread_map *threads,perf_event__handler_t process,bool data_mmap)
tools/perf/util/machine.h +3 -0
@@ -216,6 +216,9 @@ size_t machine__fprintf_vmlinux_path(struct machine *machine, FILE *fp);int machine__for_each_thread (struct machine *machine,int (*fn)(struct thread *thread,void *p),void *priv); +int machines__for_each_thread (struct machines *machines, +int (*fn)(struct thread *thread,void *p), +void *priv); int __machine__synthesize_threads(struct machine *machine, struct perf_tool *tool, struct target *target, struct thread_map *threads,
tools/perf/util/session.c +20 -0
@@ -16,6 +16,7 @@#include "perf_regs.h" #include "asm/bug.h" #include "auxtrace.h" +#include "thread-stack.h" static int perf_session__deliver_event(struct perf_session *session, union perf_event *event,
@@ -1361,6 +1362,19 @@ static void perf_session__warn_about_errors(const struct perf_session *session)events_stats__auxtrace_error_warn (stats); } +static int perf_session__flush_thread_stack (struct thread *thread, +void *p__maybe_unused ) +{ +return thread_stack__flush (thread); +} + +static int perf_session__flush_thread_stacks (struct perf_session *session) +{ +return machines__for_each_thread (&session->machines, + perf_session__flush_thread_stack, +NULL ); +} +volatile int session_done;static int __perf_session__process_pipe_events (struct perf_session *session)
@@ -1450,6 +1464,9 @@ done:if (err) goto out_err; err =auxtrace__flush_events (session, tool); +if (err) + goto out_err; + err =perf_session__flush_thread_stacks (session); out_err:free (buf);perf_session__warn_about_errors (session);
@@ -1600,6 +1617,9 @@ out:if (err) goto out_err; err =auxtrace__flush_events (session, tool); +if (err) + goto out_err; + err =perf_session__flush_thread_stacks (session); out_err:ui_progress__finish ();perf_session__warn_about_errors (session);
tools/perf/util/thread-stack.c +13 -5
@@ -219,7 +219,7 @@ static int thread_stack__call_return(struct thread *thread,return crp->process (&cr, crp->data); } -static int thread_stack__flush (struct thread *thread,struct thread_stack *ts) +static int __thread_stack__flush (struct thread *thread,struct thread_stack *ts) {struct call_return_processor *crp = ts->crp;int err;
@@ -242,6 +242,14 @@ static int thread_stack__flush(struct thread *thread, struct thread_stack *ts)return 0 ; } +int thread_stack__flush (struct thread *thread) +{ +if (thread->ts) +return __thread_stack__flush (thread, thread->ts); + +return 0 ; +} +int thread_stack__event (struct thread *thread,u32 flags,u64 from_ip,u64 to_ip,u16 insn_len,u64 trace_nr) {
@@ -264,7 +272,7 @@ int thread_stack__event(struct thread *thread, u32 flags, u64 from_ip,*/ if (trace_nr != thread->ts->trace_nr) {if (thread->ts->trace_nr) -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts); thread->ts->trace_nr = trace_nr; }
@@ -297,7 +305,7 @@ void thread_stack__set_trace_nr(struct thread *thread, u64 trace_nr)if (trace_nr != thread->ts->trace_nr) {if (thread->ts->trace_nr) -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts); thread->ts->trace_nr = trace_nr; } }
@@ -305,7 +313,7 @@ void thread_stack__set_trace_nr(struct thread *thread, u64 trace_nr)void thread_stack__free (struct thread *thread) {if (thread->ts) { -thread_stack__flush (thread, thread->ts); +__thread_stack__flush (thread, thread->ts);zfree (&thread->ts->stack);zfree (&thread->ts); }
@@ -689,7 +697,7 @@ int thread_stack__process(struct thread *thread, struct comm *comm,/* Flush stack on exec */ if (ts->comm != comm && thread->pid_ == thread->tid) { - err =thread_stack__flush (thread, ts); + err =__thread_stack__flush (thread, ts);if (err)return err; ts->comm = comm;
tools/perf/util/thread-stack.h +1 -0
@@ -96,6 +96,7 @@ int thread_stack__event(struct thread *thread, u32 flags, u64 from_ip,void thread_stack__set_trace_nr (struct thread *thread,u64 trace_nr);void thread_stack__sample (struct thread *thread,struct ip_callchain *chain,size_t sz,u64 ip); +int thread_stack__flush (struct thread *thread);void thread_stack__free (struct thread *thread); struct call_return_processor *
--
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Adrian Hunter
reviewerPATCH v6 3/17 perf auxtrace: Add Intel PT as an AUX area tracing type
In reply to Adrian HunterAdd the Intel Processor Trace type constant PERF_AUXTRACE_INTEL_PT.
--- tools/perf/util/auxtrace.c | 1 + tools/perf/util/auxtrace.h | 1 + 2 files changed, 2 insertions(+)
tools/perf/util/auxtrace.c +1 -0
@@ -884,6 +884,7 @@ int perf_event__process_auxtrace_info(struct perf_tool *tool __maybe_unused,fprintf (stdout," type: %u\n" , type);switch (type) { +case PERF_AUXTRACE_INTEL_PT :case PERF_AUXTRACE_UNKNOWN :default :return -EINVAL ;
tools/perf/util/auxtrace.h +1 -0
@@ -39,6 +39,7 @@ struct events_stats;enum auxtrace_type {PERF_AUXTRACE_UNKNOWN , +PERF_AUXTRACE_INTEL_PT , };enum itrace_period_type {
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 4/17 perf tools: Add Intel PT packet decoder
In reply to Adrian HunterAdd support for decoding Intel Processor Trace packets.
This essentially provides intel_pt_get_packet() which takes a buffer of binary data and returns the decoded packet.
--- tools/perf/util/Build | 1 + tools/perf/util/intel-pt-decoder/Build | 1 + .../util/intel-pt-decoder/intel-pt-pkt-decoder.c | 400 +++++++++++++++++++++ .../util/intel-pt-decoder/intel-pt-pkt-decoder.h | 64 ++++ 4 files changed, 466 insertions(+) create mode 100644 tools/perf/util/intel-pt-decoder/Build create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.h
tools/perf/util/Build +1 -0
@@ -75,6 +75,7 @@ libperf-$(CONFIG_X86) += tsc.o libperf-y += cloexec.o libperf-y += thread-stack.o libperf-$(CONFIG_AUXTRACE) += auxtrace.o +libperf-$(CONFIG_AUXTRACE) += intel-pt-decoder/ libperf-y += parse-branch-options.o libperf-$(CONFIG_LIBELF) += symbol-elf.o
tools/perf/util/intel-pt-decoder/Build new file +1 -0
@@ -0,0 +1 @@ +libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o
tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c new file +400 -0
400 lines not on this page · raw message
tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.h new file +64 -0
64 lines not on this page · raw message
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 5/17 perf tools: Add Intel PT instruction decoder
In reply to Adrian HunterAdd support for decoding instructions for Intel Processor Trace. The kernel x86 instruction decoder is used for this.
This essentially provides intel_pt_get_insn() which takes a binary buffer, uses the kernel's x86 instruction decoder to get details of the instruction and then categorizes it for consumption by an Intel PT decoder.
--- tools/build/Makefile.build | 2 + tools/perf/.gitignore | 2 + tools/perf/Makefile.perf | 12 +- tools/perf/util/intel-pt-decoder/Build | 15 +- .../util/intel-pt-decoder/intel-pt-insn-decoder.c | 246 +++++++++++++++++++++ .../util/intel-pt-decoder/intel-pt-insn-decoder.h | 65 ++++++ 6 files changed, 339 insertions(+), 3 deletions(-) create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h
tools/build/Makefile.build +2 -0
@@ -57,6 +57,8 @@ quiet_cmd_cc_i_c = CPP $@ quiet_cmd_cc_s_c = AS $@ cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $< +quiet_cmd_gen = GEN $@ + # Link agregate command # If there's nothing to link, create empty $@ object. quiet_cmd_ld_multi = LD $@
tools/perf/.gitignore +2 -0
@@ -28,3 +28,5 @@ config.mak.autogen *-flex.* *.pyc *.pyo +util/intel-pt-decoder/inat-tables.c +util/intel-pt-decoder/inat.c
tools/perf/Makefile.perf +10 -2
@@ -76,6 +76,12 @@ include config/utilities.mak # # Define NO_AUXTRACE if you do not want AUX area tracing support +# As per kernel Makefile, avoid funny character set dependencies +unexport LC_ALL +LC_COLLATE=C +LC_NUMERIC=C +export LC_COLLATE LC_NUMERIC + ifeq ($(srctree),) srctree := $(patsubst %/,%,$(dir $(shell pwd))) srctree := $(patsubst %/,%,$(dir $(srctree)))
@@ -122,6 +128,7 @@ INSTALL = install FLEX = flex BISON = bison STRIP = strip +AWK = awk LIB_DIR = $(srctree)/tools/lib/api/ TRACE_EVENT_DIR = $(srctree)/tools/lib/traceevent/
@@ -272,7 +279,7 @@ strip: $(PROGRAMS) $(OUTPUT)perf PERF_IN := $(OUTPUT)perf-in.o -export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX +export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK build := -f $(srctree)/tools/build/Makefile.build dir=. obj $(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE
@@ -536,7 +543,8 @@ clean: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean config-clean $(Q)find . -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete $(Q)$(RM) .config-detected $(call QUIET_CLEAN, core-progs) $(RM) $(ALL_PROGRAMS) perf perf-read-vdso32 perf-read-vdsox32 - $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* + $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* \ + $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c $(QUIET_SUBDIR0)Documentation $(QUIET_SUBDIR1) clean $(python-clean)
tools/perf/util/intel-pt-decoder/Build +14 -1
@@ -1 +1,14 @@ -libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o +libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o + +inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk +inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txt + +$(OUTPUT)util/intel-pt-decoder/inat-tables.c: $(inat_tables_script) $(inat_tables_maps) + @$(call echo-cmd,gen)$(AWK) -f $(inat_tables_script) $(inat_tables_maps) > $@ || rm -f $@ + +$(OUTPUT)util/intel-pt-decoder/inat.c: + @$(call echo-cmd,gen)cp ../../arch/x86/lib/inat.c $(OUTPUT)util/intel-pt-decoder/inat.c + +$(OUTPUT)util/intel-pt-decoder/intel-pt-insn-decoder.o: $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c + +CFLAGS_intel-pt-insn-decoder.o += -I../../arch/x86/include -I$(OUTPUT)util/intel-pt-decoder -I../../arch/x86/lib -Wno-override-init
tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c new file +246 -0
246 lines not on this page · raw message
tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h new file +65 -0
65 lines not on this page · raw message
Signature · 1 line
1.9.1
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 05/17] perf tools: Add Intel PT instruction decoder
Em Fri, May 29, 2015 at 04:33:33PM +0300, Adrian Hunter escreveu:
Quoted 2 lines
Add support for decoding instructions for Intel Processor Trace. The kernel x86 instruction decoder is used for this.
Ok, but we don't access kernel header files directly, and:
[acme@zoo linux]$ find . -name "insn.h" ./arch/x86/include/asm/insn.h ./arch/arm64/include/asm/insn.h ./arch/arm/include/asm/insn.h
[acme@zoo linux]$ find /usr/include -name "insn.h" [acme@zoo linux]$
But I need to look more into this patch to figure out if this is something generated at build time, etc, but before that I found a problem:
So:
tools/perf/util/intel-pt-decoder/Build line 4
Quoted 2 lines
tools/perf/util/intel-pt-decoder/Build +2
-0+inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk +inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txt
These need to go into tools/perf/MANIFEST, so that:
[acme@zoo linux]$ make help | grep perf
perf-tar-src-pkg - Build perf-4.1.0-rc5.tar source tarball
perf-targz-src-pkg - Build perf-4.1.0-rc5.tar.gz source tarball perf-tarbz2-src-pkg - Build perf-4.1.0-rc5.tar.bz2 source tarball perf-tarxz-src-pkg - Build perf-4.1.0-rc5.tar.xz source tarball
[acme@zoo linux]$
Continue to work, in fact, there is a test for that, that will run when you do the build tests:
make -C tools/perf build-test
It is one of the last to be tested, so you may want to do it directly:
[acme@zoo linux]$ make -C tools/perf -f tests/make tarpkg
make: Entering directory '/home/git/linux/tools/perf'
- tarpkg: ./tests/perf-targz-src-pkg .
make: Leaving directory '/home/git/linux/tools/perf' [acme@zoo linux]$
After I apply this patch, I get:
Applying: perf tools: Add Intel PT instruction decoder [tmp.perf/pt 1ab14c4be64b] perf tools: Add Intel PT instruction decoder
Author: Adrian Hunter <[email protected]>
Date: Fri May 29 16:33:33 2015 +0300
6 files changed, 339 insertions(+), 3 deletions(-) rewrite tools/perf/util/intel-pt-decoder/Build (100%) create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h
[acme@zoo linux]$ fg
bash: fg: current: no such job
[acme@zoo linux]$ make -C tools/perf -f tests/make tarpkg
make: Entering directory '/home/git/linux/tools/perf'
- tarpkg: ./tests/perf-targz-src-pkg . tests/make:224: recipe for target 'tarpkg' failed
make: *** [tarpkg] Error 2
make: Leaving directory '/home/git/linux/tools/perf' [acme@zoo linux]$
Doing it manually to see what happened:
[acme@zoo linux]$ make perf-tar-src-pkg
TAR
[acme@zoo linux]$ ls -la perf-4.1.0-rc5.tar -rw-rw-r--. 1 acme acme 5027840 Jun 18 19:24 perf-4.1.0-rc5.tar [acme@zoo linux]$ mv perf-4.1.0-rc5.tar /tmp [acme@zoo linux]$ cd /tmp
[acme@zoo tmp]$ tar xf perf-4.1.0-rc5.tar
[acme@zoo tmp]$ cd perf-4.1.0-rc5/
[acme@zoo perf-4.1.0-rc5]$ make -C tools/perf
make: Entering directory '/tmp/perf-4.1.0-rc5/tools/perf'
BUILD: Doing 'make -j4' parallel build
Auto-detecting system features:
... dwarf: [ on ] ... glibc: [ on ] ... gtk2: [ on ] ... libaudit: [ on ] ... libbfd: [ on ] ... libelf: [ on ] ... libnuma: [ on ] ... libperl: [ on ] ... libpython: [ on ] ... libslang: [ on ] ... libunwind: [ on ] ... libdw-dwarf-unwind: [ on ] ... zlib: [ on ] ... lzma: [ on ]
CC util/abspath.o
CC fd/array.o
PERF_VERSION = 4.1.rc5.g1ab14c
CC fs/fs.o CC event-parse.o LD fd/libapi-in.o CC event-plugin.o CC fs/debugfs.o CC util/alias.o CC trace-seq.o <SNIP> CC util/cloexec.o CC util/thread-stack.o CC builtin-kmem.o CC builtin-lock.o CC util/auxtrace.o CC util/intel-pt-decoder/intel-pt-pkt-decoder.o
make[4]: *** No rule to make target '../../arch/x86/tools/gen-insn-attr-x86.awk', needed by 'util/intel-pt-decoder/inat-tables.c'. Stop. make[4]: *** Waiting for unfinished jobs....
GEN util/intel-pt-decoder/inat.c
cp: cannot stat ‘../../arch/x86/lib/inat.c’: No such file or directory
util/intel-pt-decoder/Build:10: recipe for target 'util/intel-pt-decoder/inat.c' failed
make[4]: *** [util/intel-pt-decoder/inat.c] Error 1/tmp/perf-4.1.0-rc5/tools/build/Makefile.build:109: recipe for target 'intel-pt-decoder' failed
make[3]: *** [intel-pt-decoder] Error 2
make[3]: *** Waiting for unfinished jobs....
CC builtin-kvm.o
CC builtin-inject.o/tmp/perf-4.1.0-rc5/tools/build/Makefile.build:109: recipe for target 'util' failed
make[2]: *** [util] Error 2
Makefile.perf:380: recipe for target 'libperf-in.o' failed
make[1]: *** [libperf-in.o] Error 2
make[1]: *** Waiting for unfinished jobs....
CC builtin-mem.o CC builtin-data.o CC builtin-trace.o
<SNIP>
LD tests/perf-in.o
LD perf-in.o
Makefile:68: recipe for target 'all' failed
make: *** [all] Error 2
make: Leaving directory '/tmp/perf-4.1.0-rc5/tools/perf' [acme@zoo perf-4.1.0-rc5]$
The patch fixed up wrt some recent changes to .gitignore and the makefiles is in my git tree at git.kernel.org, branch tmp.perf/pt.
Calling it a day, will continue on this tomorrow.
- Arnaldo
Quoted 429 lines
This essentially provides
intel_pt_get_insn()which takes a binary buffer, uses the kernel's x86 instruction decoder to get details of the instruction and then categorizes it for consumption by an Intel PT decoder.Signed-off-by Adrian Hunter <[email protected]>--- tools/build/Makefile.build | 2 + tools/perf/.gitignore | 2 + tools/perf/Makefile.perf | 12 +- tools/perf/util/intel-pt-decoder/Build | 15 +- .../util/intel-pt-decoder/intel-pt-insn-decoder.c | 246 +++++++++++++++++++++ .../util/intel-pt-decoder/intel-pt-insn-decoder.h | 65 ++++++ 6 files changed, 339 insertions(+), 3 deletions(-) create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.htools/build/Makefile.build +2
-0@@ -57,6 +57,8 @@ quiet_cmd_cc_i_c = CPP $@ quiet_cmd_cc_s_c = AS $@ cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $< +quiet_cmd_gen = GEN $@ + # Link agregate command # If there's nothing to link, create empty $@ object. quiet_cmd_ld_multi = LD $@tools/perf/.gitignore +2
-0@@ -28,3 +28,5 @@ config.mak.autogen *-flex.* *.pyc *.pyo +util/intel-pt-decoder/inat-tables.c +util/intel-pt-decoder/inat.ctools/perf/Makefile.perf +10
-2@@ -76,6 +76,12 @@ include config/utilities.mak # # Define NO_AUXTRACE if you do not want AUX area tracing support +# As per kernel Makefile, avoid funny character set dependencies +unexport LC_ALL +LC_COLLATE=C +LC_NUMERIC=C +export LC_COLLATE LC_NUMERIC + ifeq ($(srctree),) srctree := $(patsubst %/,%,$(dir $(shell pwd))) srctree := $(patsubst %/,%,$(dir $(srctree)))@@ -122,6 +128,7 @@ INSTALL = install FLEX = flex BISON = bison STRIP = strip +AWK = awk LIB_DIR = $(srctree)/tools/lib/api/ TRACE_EVENT_DIR = $(srctree)/tools/lib/traceevent/@@ -272,7 +279,7 @@ strip: $(PROGRAMS) $(OUTPUT)perf PERF_IN := $(OUTPUT)perf-in.o -export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX +export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK build := -f $(srctree)/tools/build/Makefile.build dir=. obj $(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE@@ -536,7 +543,8 @@ clean: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean config-clean $(Q)find . -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete $(Q)$(RM) .config-detected $(call QUIET_CLEAN, core-progs) $(RM) $(ALL_PROGRAMS) perf perf-read-vdso32 perf-read-vdsox32 - $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* + $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* \ + $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c $(QUIET_SUBDIR0)Documentation $(QUIET_SUBDIR1) clean $(python-clean)tools/perf/util/intel-pt-decoder/Build +14
-1@@ -1 +1,14 @@ -libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o +libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o + +inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk +inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txt + +$(OUTPUT)util/intel-pt-decoder/inat-tables.c: $(inat_tables_script) $(inat_tables_maps) + @$(call echo-cmd,gen)$(AWK) -f $(inat_tables_script) $(inat_tables_maps) > $@ || rm -f $@ + +$(OUTPUT)util/intel-pt-decoder/inat.c: + @$(call echo-cmd,gen)cp ../../arch/x86/lib/inat.c $(OUTPUT)util/intel-pt-decoder/inat.c + +$(OUTPUT)util/intel-pt-decoder/intel-pt-insn-decoder.o: $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c + +CFLAGS_intel-pt-insn-decoder.o += -I../../arch/x86/include -I$(OUTPUT)util/intel-pt-decoder -I../../arch/x86/lib -Wno-override-inittools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c new file +246
-0@@ -0,0 +1,246 @@ +/* +* intel_pt_insn_decoder.c: Intel Processor Trace support +* Copyright (c) 2013-2014, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#include <stdio.h> +#include <string.h> +#include <endian.h> +#include <byteswap.h> + +#include "event.h" + +#include <asm/insn.h> + +#include "inat.c" +#include <insn.c> + +#include "intel-pt-insn-decoder.h" + +/* Based on branch_type() from perf_event_intel_lbr.c */ +static void intel_pt_insn_decoder (struct insn *insn, +struct intel_pt_insn *intel_pt_insn) +{ +enum intel_pt_insn_op op =INTEL_PT_OP_OTHER ; +enum intel_pt_insn_branch branch =INTEL_PT_BR_NO_BRANCH ; +int ext; + +if (insn_is_avx (insn)) { + intel_pt_insn->op =INTEL_PT_OP_OTHER ; + intel_pt_insn->branch =INTEL_PT_BR_NO_BRANCH ; + intel_pt_insn->length = insn->length; +return ; + } + +switch (insn->opcode.bytes[0 ]) { +case 0xf : +switch (insn->opcode.bytes[1 ]) { +case 0x05 :/* syscall */ +case 0x34 :/* sysenter */ + op =INTEL_PT_OP_SYSCALL ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0x07 :/* sysret */ +case 0x35 :/* sysexit */ + op =INTEL_PT_OP_SYSRET ; + branch =INTEL_PT_BR_INDIRECT ; +break ; + case 0x80 ... 0x8f: /* jcc */ + op =INTEL_PT_OP_JCC ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +default : +break ; + } +break ; + case 0x70 ... 0x7f: /* jcc */ + op =INTEL_PT_OP_JCC ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +case 0xc2 :/* near ret */ +case 0xc3 :/* near ret */ +case 0xca :/* far ret */ +case 0xcb :/* far ret */ + op =INTEL_PT_OP_RET ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0xcf :/* iret */ + op =INTEL_PT_OP_IRET ; + branch =INTEL_PT_BR_INDIRECT ; +break ; + case 0xcc ... 0xce: /* int */ + op =INTEL_PT_OP_INT ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0xe8 :/* call near rel */ + op =INTEL_PT_OP_CALL ; + branch =INTEL_PT_BR_UNCONDITIONAL ; +break ; +case 0x9a :/* call far absolute */ + op =INTEL_PT_OP_CALL ; + branch =INTEL_PT_BR_INDIRECT ; +break ; + case 0xe0 ... 0xe2: /* loop */ + op =INTEL_PT_OP_LOOP ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +case 0xe3 :/* jcc */ + op =INTEL_PT_OP_JCC ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +case 0xe9 :/* jmp */ +case 0xeb :/* jmp */ + op =INTEL_PT_OP_JMP ; + branch =INTEL_PT_BR_UNCONDITIONAL ; +break ; +case 0xea :/* far jmp */ + op =INTEL_PT_OP_JMP ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0xff :/* call near absolute, call far absolute ind */ + ext = (insn->modrm.bytes[0 ] >>3 ) &0x7 ; +switch (ext) { +case 2 :/* near ind call */ +case 3 :/* far ind call */ + op =INTEL_PT_OP_CALL ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 4 : +case 5 : + op =INTEL_PT_OP_JMP ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +default : +break ; + } +break ; +default : +break ; + } + + intel_pt_insn->op = op; + intel_pt_insn->branch = branch; + intel_pt_insn->length = insn->length; + +if (branch ==INTEL_PT_BR_CONDITIONAL || + branch ==INTEL_PT_BR_UNCONDITIONAL ) { +#if __BYTE_ORDER == __BIG_ENDIAN +switch (insn->immediate.nbytes) { +case 1 : + intel_pt_insn->rel = insn->immediate.value; +break ; +case 2 : + intel_pt_insn->rel = +bswap_16 ((short )insn->immediate.value); +break ; +case 4 : + intel_pt_insn->rel =bswap_32 (insn->immediate.value); +break ; + } +#else + intel_pt_insn->rel = insn->immediate.value; +#endif + } +} + +int intel_pt_get_insn (const unsigned char *buf,size_t len,int x86_64, +struct intel_pt_insn *intel_pt_insn) +{ +struct insn insn; + +insn_init (&insn, buf, len, x86_64); +insn_get_length (&insn); +if (!insn_complete (&insn) || insn.length > len) +return -1 ; +intel_pt_insn_decoder (&insn, intel_pt_insn); +if (insn.length <INTEL_PT_INSN_DBG_BUF_SZ ) +memcpy (intel_pt_insn->buf, buf, insn.length); +else +memcpy (intel_pt_insn->buf, buf,INTEL_PT_INSN_DBG_BUF_SZ ); +return 0 ; +} + +const char *branch_name[] = { + [INTEL_PT_OP_OTHER ] ="Other" , + [INTEL_PT_OP_CALL ] ="Call" , + [INTEL_PT_OP_RET ] ="Ret" , + [INTEL_PT_OP_JCC ] ="Jcc" , + [INTEL_PT_OP_JMP ] ="Jmp" , + [INTEL_PT_OP_LOOP ] ="Loop" , + [INTEL_PT_OP_IRET ] ="IRet" , + [INTEL_PT_OP_INT ] ="Int" , + [INTEL_PT_OP_SYSCALL ] ="Syscall" , + [INTEL_PT_OP_SYSRET ] ="Sysret" , +}; + +const char *intel_pt_insn_name (enum intel_pt_insn_op op) +{ +return branch_name[op]; +} + +int intel_pt_insn_desc (const struct intel_pt_insn *intel_pt_insn,char *buf, +size_t buf_len) +{ +switch (intel_pt_insn->branch) { +case INTEL_PT_BR_CONDITIONAL : +case INTEL_PT_BR_UNCONDITIONAL : +return snprintf (buf, buf_len,"%s %s%d" , +intel_pt_insn_name (intel_pt_insn->op), + intel_pt_insn->rel >0 ?"+" :"" , + intel_pt_insn->rel); +case INTEL_PT_BR_NO_BRANCH : +case INTEL_PT_BR_INDIRECT : +return snprintf (buf, buf_len,"%s" , +intel_pt_insn_name (intel_pt_insn->op)); +default : +break ; + } +return 0 ; +} + +size_t intel_pt_insn_max_size (void ) +{ +return MAX_INSN_SIZE ; +} + +int intel_pt_insn_type (enum intel_pt_insn_op op) +{ +switch (op) { +case INTEL_PT_OP_OTHER : +return 0 ; +case INTEL_PT_OP_CALL : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL ; +case INTEL_PT_OP_RET : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_RETURN ; +case INTEL_PT_OP_JCC : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CONDITIONAL ; +case INTEL_PT_OP_JMP : +return PERF_IP_FLAG_BRANCH ; +case INTEL_PT_OP_LOOP : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CONDITIONAL ; +case INTEL_PT_OP_IRET : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_RETURN | +PERF_IP_FLAG_INTERRUPT ; +case INTEL_PT_OP_INT : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL | +PERF_IP_FLAG_INTERRUPT ; +case INTEL_PT_OP_SYSCALL : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL | +PERF_IP_FLAG_SYSCALLRET ; +case INTEL_PT_OP_SYSRET : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_RETURN | +PERF_IP_FLAG_SYSCALLRET ; +default : +return 0 ; + } +}tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h new file +65
-0@@ -0,0 +1,65 @@ +/* +* intel_pt_insn_decoder.h: Intel Processor Trace support +* Copyright (c) 2013-2014, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#ifndef INCLUDE__INTEL_PT_INSN_DECODER_H__ +#define INCLUDE__INTEL_PT_INSN_DECODER_H__ + +#include <stddef.h> +#include <stdint.h> + +#define INTEL_PT_INSN_DESC_MAX 32 +#define INTEL_PT_INSN_DBG_BUF_SZ 16 + +enum intel_pt_insn_op { +INTEL_PT_OP_OTHER , +INTEL_PT_OP_CALL , +INTEL_PT_OP_RET , +INTEL_PT_OP_JCC , +INTEL_PT_OP_JMP , +INTEL_PT_OP_LOOP , +INTEL_PT_OP_IRET , +INTEL_PT_OP_INT , +INTEL_PT_OP_SYSCALL , +INTEL_PT_OP_SYSRET , +}; + +enum intel_pt_insn_branch { +INTEL_PT_BR_NO_BRANCH , +INTEL_PT_BR_INDIRECT , +INTEL_PT_BR_CONDITIONAL , +INTEL_PT_BR_UNCONDITIONAL , +}; + +struct intel_pt_insn { +enum intel_pt_insn_op op; +enum intel_pt_insn_branch branch; +int length; +int32_t rel; +unsigned char buf[INTEL_PT_INSN_DBG_BUF_SZ ]; +}; + +int intel_pt_get_insn (const unsigned char *buf,size_t len,int x86_64, +struct intel_pt_insn *intel_pt_insn); + +const char *intel_pt_insn_name (enum intel_pt_insn_op op); + +int intel_pt_insn_desc (const struct intel_pt_insn *intel_pt_insn,char *buf, +size_t buf_len); + +size_t intel_pt_insn_max_size (void ); + +int intel_pt_insn_type (enum intel_pt_insn_op op); + +#endif Signature · 1 line
1.9.1
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 05/17] perf tools: Add Intel PT instruction decoder
Em Thu, Jun 18, 2015 at 07:29:41PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 17 lines
Em Fri, May 29, 2015 at 04:33:33PM +0300, Adrian Hunter escreveu:
Quoted 2 lines
Add support for decoding instructions for Intel Processor Trace. The kernel x86 instruction decoder is used for this.
Ok, but we don't access kernel header files directly, and:
[acme@zoo linux]$ find . -name "
insn.h"./arch/x86/include/asm/insn.h./arch/arm64/include/asm/insn.h./arch/arm/include/asm/insn.h
[acme@zoo linux]$ find/usr/include-name "insn.h" [acme@zoo linux]$But I need to look more into this patch to figure out if this is something generated at build time, etc, but before that I found a problem:
Quoted 6 lines
So:
Review
Quoted 2 lines
(quoted diff) +2
-0+inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk +inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txtThese need to go into
tools/perf/MANIFEST, so that:
So, after adding:
tools/perf/MANIFEST +7 -0
@@ -58,6 +58,13 @@ include/linux/stringify.h lib/hweight.c lib/rbtree.c include/linux/swab.h +arch/x86/lib/insn.c +arch/x86/lib/inat.c +arch/x86/include/asm/insn.h +arch/x86/include/asm/inat.h +arch/x86/include/asm/inat_types.h +arch/x86/tools/gen-insn-attr-x86.awk +arch/x86/lib/x86-opcode-map.txt arch/*/include/asm/unistd*.h arch/*/include/uapi/asm/unistd*.h arch/*/include/uapi/asm/perf_regs.h
The test passes:
[acme@zoo linux]$ make -C tools/perf -f tests/make tarpkg && echo Ok
make: Entering directory '/home/git/linux/tools/perf'
- tarpkg: ./tests/perf-targz-src-pkg .
make: Leaving directory '/home/git/linux/tools/perf'
Ok
[acme@zoo linux]$
Merging these changes with this changeset to continue testing...
Also force pushing it to the tmp.perf/pt branch.
- Arnaldo
Quoted 542 lines
[acme@zoo linux]$ make help | grep perf
perf-tar-src-pkg - Build perf-4.1.0-rc5.tar source tarball
perf-targz-src-pkg - Build perf-4.1.0-rc5.tar.gz source tarball perf-tarbz2-src-pkg - Build perf-4.1.0-rc5.tar.bz2 source tarball perf-tarxz-src-pkg - Build perf-4.1.0-rc5.tar.xz source tarball
[acme@zoo linux]$Continue to work, in fact, there is a test for that, that will run when you do the build tests:
make -C
tools/perfbuild-testIt is one of the last to be tested, so you may want to do it directly:
[acme@zoo linux]$ make -C
tools/perf-f tests/make tarpkg
make: Entering directory '/home/git/linux/tools/perf'
- tarpkg: ./tests/perf-targz-src-pkg .
make: Leaving directory '/home/git/linux/tools/perf' [acme@zoo linux]$After I apply this patch, I get:
Applying: perf tools: Add Intel PT instruction decoder [tmp.perf/pt
1ab14c4be64b] perf tools: Add Intel PT instruction decoder
Author: Adrian Hunter <[email protected]>
Date: Fri May 29 16:33:33 2015 +03006 files changed, 339 insertions(+), 3 deletions(-) rewrite tools/perf/util/intel-pt-decoder/Build (100%) create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h[acme@zoo linux]$ fg
bash: fg: current: no such job
[acme@zoo linux]$ make -Ctools/perf-f tests/make tarpkg
make: Entering directory '/home/git/linux/tools/perf'
- tarpkg: ./tests/perf-targz-src-pkg . tests/make:224: recipe for target 'tarpkg' failed
make: *** [tarpkg] Error 2
make: Leaving directory '/home/git/linux/tools/perf' [acme@zoo linux]$Doing it manually to see what happened:
[acme@zoo linux]$ make perf-tar-src-pkg
TAR
[acme@zoo linux]$ ls -la perf-4.1.0-rc5.tar -rw-rw-r--. 1 acme acme 5027840 Jun 18 19:24 perf-4.1.0-rc5.tar [acme@zoo linux]$ mv perf-4.1.0-rc5.tar /tmp [acme@zoo linux]$ cd /tmp
[acme@zoo tmp]$ tar xf perf-4.1.0-rc5.tar
[acme@zoo tmp]$ cd perf-4.1.0-rc5/
[acme@zoo perf-4.1.0-rc5]$ make -Ctools/perf
make: Entering directory '/tmp/perf-4.1.0-rc5/tools/perf'
BUILD: Doing 'make -j4' parallel buildAuto-detecting system features:
... dwarf: [ on ] ... glibc: [ on ] ... gtk2: [ on ] ... libaudit: [ on ] ... libbfd: [ on ] ... libelf: [ on ] ... libnuma: [ on ] ... libperl: [ on ] ... libpython: [ on ] ... libslang: [ on ] ... libunwind: [ on ] ... libdw-dwarf-unwind: [ on ] ... zlib: [ on ] ... lzma: [ on ]CC
util/abspath.o
CCfd/array.o
PERF_VERSION= 4.1.rc5.g1ab14cCC fs/fs.o CC event-parse.o LD fd/libapi-in.o CC event-plugin.o CC fs/debugfs.o CC util/alias.o CC trace-seq.o <SNIP> CC util/cloexec.o CC util/thread-stack.o CC builtin-kmem.o CC builtin-lock.o CC util/auxtrace.o CC util/intel-pt-decoder/intel-pt-pkt-decoder.omake[4]: *** No rule to make target '
../../arch/x86/tools/gen-insn-attr-x86.awk', needed by 'util/intel-pt-decoder/inat-tables.c'. Stop. make[4]: *** Waiting for unfinished jobs....
GENutil/intel-pt-decoder/inat.c
cp: cannot stat ‘../../arch/x86/lib/inat.c’: No such file or directory
util/intel-pt-decoder/Build:10: recipe for target 'util/intel-pt-decoder/inat.c' failed
make[4]: *** [util/intel-pt-decoder/inat.c] Error 1/tmp/perf-4.1.0-rc5/tools/build/Makefile.build:109: recipe for target 'intel-pt-decoder' failed
make[3]: *** [intel-pt-decoder] Error 2
make[3]: *** Waiting for unfinished jobs....
CC builtin-kvm.o
CC builtin-inject.o/tmp/perf-4.1.0-rc5/tools/build/Makefile.build:109: recipe for target 'util' failed
make[2]: *** [util] Error 2
Makefile.perf:380: recipe for target 'libperf-in.o' failed
make[1]: *** [libperf-in.o] Error 2
make[1]: *** Waiting for unfinished jobs....CC builtin-mem.o CC builtin-data.o CC builtin-trace.o<SNIP>
LDtests/perf-in.o
LD perf-in.o
Makefile:68: recipe for target 'all' failed
make: *** [all] Error 2
make: Leaving directory '/tmp/perf-4.1.0-rc5/tools/perf' [acme@zoo perf-4.1.0-rc5]$The patch fixed up wrt some recent changes to .gitignore and the makefiles is in my git tree at git.kernel.org, branch tmp.perf/pt.
Calling it a day, will continue on this tomorrow.
- Arnaldo
Quoted 421 lines
This essentially provides
intel_pt_get_insn()which takes a binary buffer, uses the kernel's x86 instruction decoder to get details of the instruction and then categorizes it for consumption by an Intel PT decoder.Signed-off-by Adrian Hunter <[email protected]>--- tools/build/Makefile.build | 2 + tools/perf/.gitignore | 2 + tools/perf/Makefile.perf | 12 +- tools/perf/util/intel-pt-decoder/Build | 15 +- .../util/intel-pt-decoder/intel-pt-insn-decoder.c | 246 +++++++++++++++++++++ .../util/intel-pt-decoder/intel-pt-insn-decoder.h | 65 ++++++ 6 files changed, 339 insertions(+), 3 deletions(-) create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.htools/build/Makefile.build +2
-0@@ -57,6 +57,8 @@ quiet_cmd_cc_i_c = CPP $@ quiet_cmd_cc_s_c = AS $@ cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $< +quiet_cmd_gen = GEN $@ + # Link agregate command # If there's nothing to link, create empty $@ object. quiet_cmd_ld_multi = LD $@tools/perf/.gitignore +2
-0@@ -28,3 +28,5 @@ config.mak.autogen *-flex.* *.pyc *.pyo +util/intel-pt-decoder/inat-tables.c +util/intel-pt-decoder/inat.ctools/perf/Makefile.perf +10
-2@@ -76,6 +76,12 @@ include config/utilities.mak # # Define NO_AUXTRACE if you do not want AUX area tracing support +# As per kernel Makefile, avoid funny character set dependencies +unexport LC_ALL +LC_COLLATE=C +LC_NUMERIC=C +export LC_COLLATE LC_NUMERIC + ifeq ($(srctree),) srctree := $(patsubst %/,%,$(dir $(shell pwd))) srctree := $(patsubst %/,%,$(dir $(srctree)))@@ -122,6 +128,7 @@ INSTALL = install FLEX = flex BISON = bison STRIP = strip +AWK = awk LIB_DIR = $(srctree)/tools/lib/api/ TRACE_EVENT_DIR = $(srctree)/tools/lib/traceevent/@@ -272,7 +279,7 @@ strip: $(PROGRAMS) $(OUTPUT)perf PERF_IN := $(OUTPUT)perf-in.o -export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX +export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX AWK build := -f $(srctree)/tools/build/Makefile.build dir=. obj $(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE@@ -536,7 +543,8 @@ clean: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean config-clean $(Q)find . -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete $(Q)$(RM) .config-detected $(call QUIET_CLEAN, core-progs) $(RM) $(ALL_PROGRAMS) perf perf-read-vdso32 perf-read-vdsox32 - $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* + $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* \ + $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c $(QUIET_SUBDIR0)Documentation $(QUIET_SUBDIR1) clean $(python-clean)tools/perf/util/intel-pt-decoder/Build +14
-1@@ -1 +1,14 @@ -libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o +libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o + +inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk +inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txt + +$(OUTPUT)util/intel-pt-decoder/inat-tables.c: $(inat_tables_script) $(inat_tables_maps) + @$(call echo-cmd,gen)$(AWK) -f $(inat_tables_script) $(inat_tables_maps) > $@ || rm -f $@ + +$(OUTPUT)util/intel-pt-decoder/inat.c: + @$(call echo-cmd,gen)cp ../../arch/x86/lib/inat.c $(OUTPUT)util/intel-pt-decoder/inat.c + +$(OUTPUT)util/intel-pt-decoder/intel-pt-insn-decoder.o: $(OUTPUT)util/intel-pt-decoder/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c + +CFLAGS_intel-pt-insn-decoder.o += -I../../arch/x86/include -I$(OUTPUT)util/intel-pt-decoder -I../../arch/x86/lib -Wno-override-inittools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c new file +246
-0@@ -0,0 +1,246 @@ +/* +* intel_pt_insn_decoder.c: Intel Processor Trace support +* Copyright (c) 2013-2014, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#include <stdio.h> +#include <string.h> +#include <endian.h> +#include <byteswap.h> + +#include "event.h" + +#include <asm/insn.h> + +#include "inat.c" +#include <insn.c> + +#include "intel-pt-insn-decoder.h" + +/* Based on branch_type() from perf_event_intel_lbr.c */ +static void intel_pt_insn_decoder (struct insn *insn, +struct intel_pt_insn *intel_pt_insn) +{ +enum intel_pt_insn_op op =INTEL_PT_OP_OTHER ; +enum intel_pt_insn_branch branch =INTEL_PT_BR_NO_BRANCH ; +int ext; + +if (insn_is_avx (insn)) { + intel_pt_insn->op =INTEL_PT_OP_OTHER ; + intel_pt_insn->branch =INTEL_PT_BR_NO_BRANCH ; + intel_pt_insn->length = insn->length; +return ; + } + +switch (insn->opcode.bytes[0 ]) { +case 0xf : +switch (insn->opcode.bytes[1 ]) { +case 0x05 :/* syscall */ +case 0x34 :/* sysenter */ + op =INTEL_PT_OP_SYSCALL ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0x07 :/* sysret */ +case 0x35 :/* sysexit */ + op =INTEL_PT_OP_SYSRET ; + branch =INTEL_PT_BR_INDIRECT ; +break ; + case 0x80 ... 0x8f: /* jcc */ + op =INTEL_PT_OP_JCC ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +default : +break ; + } +break ; + case 0x70 ... 0x7f: /* jcc */ + op =INTEL_PT_OP_JCC ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +case 0xc2 :/* near ret */ +case 0xc3 :/* near ret */ +case 0xca :/* far ret */ +case 0xcb :/* far ret */ + op =INTEL_PT_OP_RET ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0xcf :/* iret */ + op =INTEL_PT_OP_IRET ; + branch =INTEL_PT_BR_INDIRECT ; +break ; + case 0xcc ... 0xce: /* int */ + op =INTEL_PT_OP_INT ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0xe8 :/* call near rel */ + op =INTEL_PT_OP_CALL ; + branch =INTEL_PT_BR_UNCONDITIONAL ; +break ; +case 0x9a :/* call far absolute */ + op =INTEL_PT_OP_CALL ; + branch =INTEL_PT_BR_INDIRECT ; +break ; + case 0xe0 ... 0xe2: /* loop */ + op =INTEL_PT_OP_LOOP ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +case 0xe3 :/* jcc */ + op =INTEL_PT_OP_JCC ; + branch =INTEL_PT_BR_CONDITIONAL ; +break ; +case 0xe9 :/* jmp */ +case 0xeb :/* jmp */ + op =INTEL_PT_OP_JMP ; + branch =INTEL_PT_BR_UNCONDITIONAL ; +break ; +case 0xea :/* far jmp */ + op =INTEL_PT_OP_JMP ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 0xff :/* call near absolute, call far absolute ind */ + ext = (insn->modrm.bytes[0 ] >>3 ) &0x7 ; +switch (ext) { +case 2 :/* near ind call */ +case 3 :/* far ind call */ + op =INTEL_PT_OP_CALL ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +case 4 : +case 5 : + op =INTEL_PT_OP_JMP ; + branch =INTEL_PT_BR_INDIRECT ; +break ; +default : +break ; + } +break ; +default : +break ; + } + + intel_pt_insn->op = op; + intel_pt_insn->branch = branch; + intel_pt_insn->length = insn->length; + +if (branch ==INTEL_PT_BR_CONDITIONAL || + branch ==INTEL_PT_BR_UNCONDITIONAL ) { +#if __BYTE_ORDER == __BIG_ENDIAN +switch (insn->immediate.nbytes) { +case 1 : + intel_pt_insn->rel = insn->immediate.value; +break ; +case 2 : + intel_pt_insn->rel = +bswap_16 ((short )insn->immediate.value); +break ; +case 4 : + intel_pt_insn->rel =bswap_32 (insn->immediate.value); +break ; + } +#else + intel_pt_insn->rel = insn->immediate.value; +#endif + } +} + +int intel_pt_get_insn (const unsigned char *buf,size_t len,int x86_64, +struct intel_pt_insn *intel_pt_insn) +{ +struct insn insn; + +insn_init (&insn, buf, len, x86_64); +insn_get_length (&insn); +if (!insn_complete (&insn) || insn.length > len) +return -1 ; +intel_pt_insn_decoder (&insn, intel_pt_insn); +if (insn.length <INTEL_PT_INSN_DBG_BUF_SZ ) +memcpy (intel_pt_insn->buf, buf, insn.length); +else +memcpy (intel_pt_insn->buf, buf,INTEL_PT_INSN_DBG_BUF_SZ ); +return 0 ; +} + +const char *branch_name[] = { + [INTEL_PT_OP_OTHER ] ="Other" , + [INTEL_PT_OP_CALL ] ="Call" , + [INTEL_PT_OP_RET ] ="Ret" , + [INTEL_PT_OP_JCC ] ="Jcc" , + [INTEL_PT_OP_JMP ] ="Jmp" , + [INTEL_PT_OP_LOOP ] ="Loop" , + [INTEL_PT_OP_IRET ] ="IRet" , + [INTEL_PT_OP_INT ] ="Int" , + [INTEL_PT_OP_SYSCALL ] ="Syscall" , + [INTEL_PT_OP_SYSRET ] ="Sysret" , +}; + +const char *intel_pt_insn_name (enum intel_pt_insn_op op) +{ +return branch_name[op]; +} + +int intel_pt_insn_desc (const struct intel_pt_insn *intel_pt_insn,char *buf, +size_t buf_len) +{ +switch (intel_pt_insn->branch) { +case INTEL_PT_BR_CONDITIONAL : +case INTEL_PT_BR_UNCONDITIONAL : +return snprintf (buf, buf_len,"%s %s%d" , +intel_pt_insn_name (intel_pt_insn->op), + intel_pt_insn->rel >0 ?"+" :"" , + intel_pt_insn->rel); +case INTEL_PT_BR_NO_BRANCH : +case INTEL_PT_BR_INDIRECT : +return snprintf (buf, buf_len,"%s" , +intel_pt_insn_name (intel_pt_insn->op)); +default : +break ; + } +return 0 ; +} + +size_t intel_pt_insn_max_size (void ) +{ +return MAX_INSN_SIZE ; +} + +int intel_pt_insn_type (enum intel_pt_insn_op op) +{ +switch (op) { +case INTEL_PT_OP_OTHER : +return 0 ; +case INTEL_PT_OP_CALL : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL ; +case INTEL_PT_OP_RET : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_RETURN ; +case INTEL_PT_OP_JCC : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CONDITIONAL ; +case INTEL_PT_OP_JMP : +return PERF_IP_FLAG_BRANCH ; +case INTEL_PT_OP_LOOP : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CONDITIONAL ; +case INTEL_PT_OP_IRET : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_RETURN | +PERF_IP_FLAG_INTERRUPT ; +case INTEL_PT_OP_INT : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL | +PERF_IP_FLAG_INTERRUPT ; +case INTEL_PT_OP_SYSCALL : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL | +PERF_IP_FLAG_SYSCALLRET ; +case INTEL_PT_OP_SYSRET : +return PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_RETURN | +PERF_IP_FLAG_SYSCALLRET ; +default : +return 0 ; + } +}tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h new file +59
-0@@ -0,0 +1,65 @@ +/* +* intel_pt_insn_decoder.h: Intel Processor Trace support +* Copyright (c) 2013-2014, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#ifndef INCLUDE__INTEL_PT_INSN_DECODER_H__ +#define INCLUDE__INTEL_PT_INSN_DECODER_H__ + +#include <stddef.h> +#include <stdint.h> + +#define INTEL_PT_INSN_DESC_MAX 32 +#define INTEL_PT_INSN_DBG_BUF_SZ 16 + +enum intel_pt_insn_op { +INTEL_PT_OP_OTHER , +INTEL_PT_OP_CALL , +INTEL_PT_OP_RET , +INTEL_PT_OP_JCC , +INTEL_PT_OP_JMP , +INTEL_PT_OP_LOOP , +INTEL_PT_OP_IRET , +INTEL_PT_OP_INT , +INTEL_PT_OP_SYSCALL , +INTEL_PT_OP_SYSRET , +}; + +enum intel_pt_insn_branch { +INTEL_PT_BR_NO_BRANCH , +INTEL_PT_BR_INDIRECT , +INTEL_PT_BR_CONDITIONAL , +INTEL_PT_BR_UNCONDITIONAL , +}; + +struct intel_pt_insn { +enum intel_pt_insn_op op; +enum intel_pt_insn_branch branch; +int length; +int32_t rel; +unsigned char buf[INTEL_PT_INSN_DBG_BUF_SZ ]; +}; + +int intel_pt_get_insn (const unsigned char *buf,size_t len,int x86_64, +struct intel_pt_insn *intel_pt_insn); + +const char *intel_pt_insn_name (enum intel_pt_insn_op op); + +int intel_pt_insn_desc (const struct intel_pt_insn *intel_pt_insn,char *buf, +size_t buf_len);
Quoted 8 lines
Quoted 8 lines
tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h new file +6
-0+ +size_t intel_pt_insn_max_size (void ); + +int intel_pt_insn_type (enum intel_pt_insn_op op); + +#endif Signature · 1 line
1.9.1
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Adrian Hunter
reviewerRe: [PATCH V6 05/17] perf tools: Add Intel PT instruction decoder
Quoted 48 lines · Arnaldo Carvalho de Melo
Em Thu, Jun 18, 2015 at 07:29:41PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 17 lines
Em Fri, May 29, 2015 at 04:33:33PM +0300, Adrian Hunter escreveu:
Quoted 2 lines
Add support for decoding instructions for Intel Processor Trace. The kernel x86 instruction decoder is used for this.
Ok, but we don't access kernel header files directly, and:
[acme@zoo linux]$ find . -name "
insn.h"./arch/x86/include/asm/insn.h./arch/arm64/include/asm/insn.h./arch/arm/include/asm/insn.h
[acme@zoo linux]$ find/usr/include-name "insn.h" [acme@zoo linux]$But I need to look more into this patch to figure out if this is something generated at build time, etc, but before that I found a problem:
Quoted 6 lines
So:
Review
Quoted 2 lines
(quoted diff) +2
-0+inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk +inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txtThese need to go into
tools/perf/MANIFEST, so that:So, after adding:
tools/perf/MANIFEST +7
-0@@ -58,6 +58,13 @@ include/linux/stringify.h lib/hweight.c lib/rbtree.c include/linux/swab.h +arch/x86/lib/insn.c +arch/x86/lib/inat.c +arch/x86/include/asm/insn.h +arch/x86/include/asm/inat.h +arch/x86/include/asm/inat_types.h +arch/x86/tools/gen-insn-attr-x86.awk +arch/x86/lib/x86-opcode-map.txt arch/*/include/asm/unistd*.h arch/*/include/uapi/asm/unistd*.h arch/*/include/uapi/asm/perf_regs.hThe test passes:
Quoted 8 lines
[acme@zoo linux]$ make -C
tools/perf-f tests/make tarpkg && echo Ok
make: Entering directory '/home/git/linux/tools/perf'
- tarpkg: ./tests/perf-targz-src-pkg .
make: Leaving directory '/home/git/linux/tools/perf'
Ok
[acme@zoo linux]$Merging these changes with this changeset to continue testing...
Thank you! :-)
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Adrian Hunter
reviewerPATCH v6 6/17 perf tools: Add Intel PT log
In reply to Adrian HunterAdd a facility to log Intel Processor Trace decoding. The log is intended for debugging purposes only.
The log file name is "intel_pt.log" and is opened in the current directory. The log contains a record of all packets and instructions decoded and can get very large (10 MB would be a small one).
--- tools/perf/util/intel-pt-decoder/Build | 2 +- tools/perf/util/intel-pt-decoder/intel-pt-log.c | 155 ++++++++++++++++++++++++ tools/perf/util/intel-pt-decoder/intel-pt-log.h | 52 ++++++++ 3 files changed, 208 insertions(+), 1 deletion(-) create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-log.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-log.h
tools/perf/util/intel-pt-decoder/Build +1 -1
@@ -1,4 +1,4 @@ -libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o +libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o intel-pt-log.o inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txt
tools/perf/util/intel-pt-decoder/intel-pt-log.c new file +155 -0
155 lines not on this page · raw message
tools/perf/util/intel-pt-decoder/intel-pt-log.h new file +52 -0
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Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 7/17 perf tools: Add Intel PT decoder
In reply to Adrian HunterAdd support for decoding an Intel Processor Trace.
Intel PT trace data must be 'decoded' which involves walking the object code and matching the trace data packets.
The decoder requests a buffer of binary data via a get_trace() call-back, which it decodes using instruction information which it gets via another call-back walk_insn().
--- tools/perf/util/intel-pt-decoder/Build | 2 +- .../perf/util/intel-pt-decoder/intel-pt-decoder.c | 1759 ++++++++++++++++++++ .../perf/util/intel-pt-decoder/intel-pt-decoder.h | 102 ++ 3 files changed, 1862 insertions(+), 1 deletion(-) create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c create mode 100644 tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
tools/perf/util/intel-pt-decoder/Build +1 -1
@@ -1,4 +1,4 @@ -libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o intel-pt-log.o +libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o intel-pt-log.o intel-pt-decoder.o inat_tables_script = ../../arch/x86/tools/gen-insn-attr-x86.awk inat_tables_maps = ../../arch/x86/lib/x86-opcode-map.txt
tools/perf/util/intel-pt-decoder/intel-pt-decoder.c new file +1759 -0
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tools/perf/util/intel-pt-decoder/intel-pt-decoder.h new file +102 -0
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Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 8/17 perf tools: Add Intel PT support
In reply to Adrian HunterAdd support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
--- tools/perf/arch/x86/util/Build | 2 + tools/perf/arch/x86/util/intel-pt.c | 752 ++++++++++++++ tools/perf/util/Build | 1 + tools/perf/util/intel-pt.c | 1889 +++++++++++++++++++++++++++++++++++ tools/perf/util/intel-pt.h | 51 + 5 files changed, 2695 insertions(+) create mode 100644 tools/perf/arch/x86/util/intel-pt.c create mode 100644 tools/perf/util/intel-pt.c create mode 100644 tools/perf/util/intel-pt.h
tools/perf/arch/x86/util/Build +2 -0
@@ -6,3 +6,5 @@ libperf-$(CONFIG_DWARF) += dwarf-regs.o libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o + +libperf-$(CONFIG_AUXTRACE) += intel-pt.o
tools/perf/arch/x86/util/intel-pt.c new file +752 -0
752 lines not on this page · raw message
tools/perf/util/Build +1 -0
@@ -76,6 +76,7 @@ libperf-y += cloexec.o libperf-y += thread-stack.o libperf-$(CONFIG_AUXTRACE) += auxtrace.o libperf-$(CONFIG_AUXTRACE) += intel-pt-decoder/ +libperf-$(CONFIG_AUXTRACE) += intel-pt.o libperf-y += parse-branch-options.o libperf-$(CONFIG_LIBELF) += symbol-elf.o
tools/perf/util/intel-pt.c new file +1889 -0
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tools/perf/util/intel-pt.h new file +51 -0
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Signature · 1 line
1.9.1
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
- Arnaldo
Quoted 2,746 lines
Signed-off-by Adrian Hunter <[email protected]>--- tools/perf/arch/x86/util/Build | 2 + tools/perf/arch/x86/util/intel-pt.c | 752 ++++++++++++++ tools/perf/util/Build | 1 + tools/perf/util/intel-pt.c | 1889 +++++++++++++++++++++++++++++++++++ tools/perf/util/intel-pt.h | 51 + 5 files changed, 2695 insertions(+) create mode 100644 tools/perf/arch/x86/util/intel-pt.c create mode 100644 tools/perf/util/intel-pt.c create mode 100644 tools/perf/util/intel-pt.htools/perf/arch/x86/util/Build +2
-0@@ -6,3 +6,5 @@ libperf-$(CONFIG_DWARF) += dwarf-regs.o libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o + +libperf-$(CONFIG_AUXTRACE) += intel-pt.otools/perf/arch/x86/util/intel-pt.c new file +752
-0@@ -0,0 +1,752 @@ +/* +* intel_pt.c: Intel Processor Trace support +* Copyright (c) 2013-2015, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#include <stdbool.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/bitops.h> +#include <linux/log2.h> + +#include "../../perf.h" +#include "../../util/session.h" +#include "../../util/event.h" +#include "../../util/evlist.h" +#include "../../util/evsel.h" +#include "../../util/cpumap.h" +#include "../../util/parse-options.h" +#include "../../util/parse-events.h" +#include "../../util/pmu.h" +#include "../../util/debug.h" +#include "../../util/auxtrace.h" +#include "../../util/tsc.h" +#include "../../util/intel-pt.h" + +#define KiB (x) ((x) * 1024) +#define MiB (x) ((x) * 1024 * 1024) +#define KiB_MASK (x) (KiB(x) - 1) +#define MiB_MASK (x) (MiB(x) - 1) + +#define INTEL_PT_DEFAULT_SAMPLE_SIZE KiB(4) + +#define INTEL_PT_MAX_SAMPLE_SIZE KiB(60) + +#define INTEL_PT_PSB_PERIOD_NEAR 256 + +struct intel_pt_snapshot_ref { +void *ref_buf; +size_t ref_offset; +bool wrapped; +}; + +struct intel_pt_recording { +struct auxtrace_record itr; +struct perf_pmu *intel_pt_pmu; +int have_sched_switch; +struct perf_evlist *evlist; +bool snapshot_mode; +bool snapshot_init_done; +size_t snapshot_size; +size_t snapshot_ref_buf_size; +int snapshot_ref_cnt; +struct intel_pt_snapshot_ref *snapshot_refs; +}; + +static int intel_pt_parse_terms_with_default (struct list_head *formats, +const char *str, +u64 *config) +{ +struct list_head *terms; +struct perf_event_attr attr = { .size =0 , }; +int err; + + terms =malloc (sizeof (struct list_head )); +if (!terms) +return -ENOMEM ; + +INIT_LIST_HEAD (terms); + + err =parse_events_terms (terms, str); +if (err) + goto out_free; + + attr.config = *config; + err =perf_pmu__config_terms (formats, &attr, terms, true,NULL ); +if (err) + goto out_free; + + *config = attr.config; +out_free: +parse_events__free_terms (terms); +return err; +} + +static int intel_pt_parse_terms (struct list_head *formats,const char *str, +u64 *config) +{ + *config =0 ; +return intel_pt_parse_terms_with_default (formats, str, config); +} + +static size_t intel_pt_psb_period (struct perf_pmu *intel_pt_pmu__maybe_unused , +struct perf_evlist *evlist__maybe_unused ) +{ +return 256 ; +} + +static u64 intel_pt_default_config (struct perf_pmu *intel_pt_pmu) +{ +u64 config; + +intel_pt_parse_terms (&intel_pt_pmu->format,"tsc" , &config); +return config; +} + +static int intel_pt_parse_snapshot_options (struct auxtrace_record *itr, +struct record_opts *opts, +const char *str) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +unsigned long long snapshot_size =0 ; +char *endptr; + +if (str) { + snapshot_size =strtoull (str, &endptr,0 ); +if (*endptr || snapshot_size >SIZE_MAX ) +return -1 ; + } + + opts->auxtrace_snapshot_mode = true; + opts->auxtrace_snapshot_size = snapshot_size; + + ptr->snapshot_size = snapshot_size; + +return 0 ; +} + +struct perf_event_attr * +intel_pt_pmu_default_config (struct perf_pmu *intel_pt_pmu) +{ +struct perf_event_attr *attr; + + attr =zalloc (sizeof (struct perf_event_attr )); +if (!attr) +return NULL ; + + attr->config =intel_pt_default_config (intel_pt_pmu); + + intel_pt_pmu->selectable = true; + +return attr; +} + +static size_t intel_pt_info_priv_size (struct auxtrace_record *itr__maybe_unused ) +{ +return INTEL_PT_AUXTRACE_PRIV_SIZE ; +} + +static int intel_pt_info_fill (struct auxtrace_record *itr, +struct perf_session *session, +struct auxtrace_info_event *auxtrace_info, +size_t priv_size) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; +struct perf_event_mmap_page *pc; +struct perf_tsc_conversion tc = { .time_mult =0 , }; +bool cap_user_time_zero = false, per_cpu_mmaps; +u64 tsc_bit, noretcomp_bit; +int err; + +if (priv_size !=INTEL_PT_AUXTRACE_PRIV_SIZE ) +return -EINVAL ; + +intel_pt_parse_terms (&intel_pt_pmu->format,"tsc" , &tsc_bit); +intel_pt_parse_terms (&intel_pt_pmu->format,"noretcomp" , + &noretcomp_bit); + +if (!session->evlist->nr_mmaps) +return -EINVAL ; + + pc = session->evlist->mmap[0 ].base; +if (pc) { + err =perf_read_tsc_conversion (pc, &tc); +if (err) { +if (err != -EOPNOTSUPP ) +return err; + }else { + cap_user_time_zero = tc.time_mult !=0 ; + } +if (!cap_user_time_zero) +ui__warning ("Intel Processor Trace: TSC not available\n" ); + } + + per_cpu_mmaps = !cpu_map__empty (session->evlist->cpus); + + auxtrace_info->type =PERF_AUXTRACE_INTEL_PT ; + auxtrace_info->priv[INTEL_PT_PMU_TYPE ] = intel_pt_pmu->type; + auxtrace_info->priv[INTEL_PT_TIME_SHIFT ] = tc.time_shift; + auxtrace_info->priv[INTEL_PT_TIME_MULT ] = tc.time_mult; + auxtrace_info->priv[INTEL_PT_TIME_ZERO ] = tc.time_zero; + auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO ] = cap_user_time_zero; + auxtrace_info->priv[INTEL_PT_TSC_BIT ] = tsc_bit; + auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT ] = noretcomp_bit; + auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH ] = ptr->have_sched_switch; + auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE ] = ptr->snapshot_mode; + auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS ] = per_cpu_mmaps; + +return 0 ; +} + +static int intel_pt_track_switches (struct perf_evlist *evlist) +{ +const char *sched_switch ="sched:sched_switch" ; +struct perf_evsel *evsel; +int err; + +if (!perf_evlist__can_select_event (evlist, sched_switch)) +return -EPERM ; + + err =parse_events (evlist, sched_switch,NULL ); +if (err) { +pr_debug2 ("%s: failed to parse %s, error %d\n" , + __func__, sched_switch, err); +return err; + } + + evsel =perf_evlist__last (evlist); + +perf_evsel__set_sample_bit (evsel,CPU ); +perf_evsel__set_sample_bit (evsel,TIME ); + + evsel->system_wide = true; + evsel->no_aux_samples = true; + evsel->immediate = true; + +return 0 ; +} + +static int intel_pt_recording_options (struct auxtrace_record *itr, +struct perf_evlist *evlist, +struct record_opts *opts) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; +bool have_timing_info; +struct perf_evsel *evsel, *intel_pt_evsel =NULL ; +const struct cpu_map *cpus = evlist->cpus; +bool privileged =geteuid () ==0 ||perf_event_paranoid () <0 ; +u64 tsc_bit; + + ptr->evlist = evlist; + ptr->snapshot_mode = opts->auxtrace_snapshot_mode; + +evlist__for_each (evlist, evsel) { +if (evsel->attr.type == intel_pt_pmu->type) { +if (intel_pt_evsel) { +pr_err ("There may be only one " INTEL_PT_PMU_NAME " event\n" ); +return -EINVAL ; + } + evsel->attr.freq =0 ; + evsel->attr.sample_period =1 ; + intel_pt_evsel = evsel; + opts->full_auxtrace = true; + } + } + +if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) { +pr_err ("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n" ); +return -EINVAL ; + } + +if (opts->use_clockid) { +pr_err ("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n" ); +return -EINVAL ; + } + +if (!opts->full_auxtrace) +return 0 ; + +/* Set default sizes for snapshot mode */ +if (opts->auxtrace_snapshot_mode) { +size_t psb_period =intel_pt_psb_period (intel_pt_pmu, evlist); + +if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) { +if (privileged) { + opts->auxtrace_mmap_pages =MiB (4 ) / page_size; + }else { + opts->auxtrace_mmap_pages =KiB (128 ) / page_size; +if (opts->mmap_pages ==UINT_MAX ) + opts->mmap_pages =KiB (256 ) / page_size; + } + }else if (!opts->auxtrace_mmap_pages && !privileged && + opts->mmap_pages ==UINT_MAX ) { + opts->mmap_pages =KiB (256 ) / page_size; + } +if (!opts->auxtrace_snapshot_size) + opts->auxtrace_snapshot_size = + opts->auxtrace_mmap_pages * (size_t )page_size; +if (!opts->auxtrace_mmap_pages) { +size_t sz = opts->auxtrace_snapshot_size; + + sz =round_up (sz, page_size) / page_size; + opts->auxtrace_mmap_pages =roundup_pow_of_two (sz); + } +if (opts->auxtrace_snapshot_size > + opts->auxtrace_mmap_pages * (size_t )page_size) { +pr_err ("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n" , + opts->auxtrace_snapshot_size, + opts->auxtrace_mmap_pages * (size_t )page_size); +return -EINVAL ; + } +if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) { +pr_err ("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n" ); +return -EINVAL ; + } +pr_debug2 ("Intel PT snapshot size: %zu\n" , + opts->auxtrace_snapshot_size); +if (psb_period && + opts->auxtrace_snapshot_size <= psb_period + +INTEL_PT_PSB_PERIOD_NEAR ) +ui__warning ("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n" , + opts->auxtrace_snapshot_size, psb_period); + } + +/* Set default sizes for full trace mode */ +if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) { +if (privileged) { + opts->auxtrace_mmap_pages =MiB (4 ) / page_size; + }else { + opts->auxtrace_mmap_pages =KiB (128 ) / page_size; +if (opts->mmap_pages ==UINT_MAX ) + opts->mmap_pages =KiB (256 ) / page_size; + } + } + +/* Validate auxtrace_mmap_pages */ +if (opts->auxtrace_mmap_pages) { +size_t sz = opts->auxtrace_mmap_pages * (size_t )page_size; +size_t min_sz; + +if (opts->auxtrace_snapshot_mode) + min_sz =KiB (4 ); +else + min_sz =KiB (8 ); + +if (sz < min_sz || !is_power_of_2 (sz)) { +pr_err ("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n" , + min_sz /1024 ); +return -EINVAL ; + } + } + +intel_pt_parse_terms (&intel_pt_pmu->format,"tsc" , &tsc_bit); + +if (opts->full_auxtrace && (intel_pt_evsel->attr.config & tsc_bit)) + have_timing_info = true; +else + have_timing_info = false; + +/* +* Per-cpu recording needs sched_switch events to distinguish different +* threads. +*/ +if (have_timing_info && !cpu_map__empty (cpus)) { +int err; + + err =intel_pt_track_switches (evlist); +if (err == -EPERM ) +pr_debug2 ("Unable to select sched:sched_switch\n" ); +else if (err) +return err; +else + ptr->have_sched_switch =1 ; + } + +if (intel_pt_evsel) { +/* +* To obtain the auxtrace buffer file descriptor, the auxtrace +* event must come first. +*/ +perf_evlist__to_front (evlist, intel_pt_evsel); +/* +* In the case of per-cpu mmaps, we need the CPU on the +* AUX event. +*/ +if (!cpu_map__empty (cpus)) +perf_evsel__set_sample_bit (intel_pt_evsel,CPU ); + } + +/* Add dummy event to keep tracking */ +if (opts->full_auxtrace) { +struct perf_evsel *tracking_evsel; +int err; + + err =parse_events (evlist,"dummy:u" ,NULL ); +if (err) +return err; + + tracking_evsel =perf_evlist__last (evlist); + +perf_evlist__set_tracking_event (evlist, tracking_evsel); + + tracking_evsel->attr.freq =0 ; + tracking_evsel->attr.sample_period =1 ; + +/* In per-cpu case, always need the time of mmap events etc */ +if (!cpu_map__empty (cpus)) +perf_evsel__set_sample_bit (tracking_evsel,TIME ); + } + +/* +* Warn the user when we do not have enough information to decode i.e. +* per-cpu with no sched_switch (except workload-only). +*/ +if (!ptr->have_sched_switch && !cpu_map__empty (cpus) && + !target__none (&opts->target)) +ui__warning ("Intel Processor Trace decoding will not be possible except for kernel tracing!\n" ); + +return 0 ; +} + +static int intel_pt_snapshot_start (struct auxtrace_record *itr) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_evsel *evsel; + +evlist__for_each (ptr->evlist, evsel) { +if (evsel->attr.type == ptr->intel_pt_pmu->type) +return perf_evlist__disable_event (ptr->evlist, evsel); + } +return -EINVAL ; +} + +static int intel_pt_snapshot_finish (struct auxtrace_record *itr) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_evsel *evsel; + +evlist__for_each (ptr->evlist, evsel) { +if (evsel->attr.type == ptr->intel_pt_pmu->type) +return perf_evlist__enable_event (ptr->evlist, evsel); + } +return -EINVAL ; +} + +static int intel_pt_alloc_snapshot_refs (struct intel_pt_recording *ptr,int idx) +{ +const size_t sz =sizeof (struct intel_pt_snapshot_ref ); +int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt *2 ; +struct intel_pt_snapshot_ref *refs; + +if (!new_cnt) + new_cnt =16 ; + +while (new_cnt <= idx) + new_cnt *=2 ; + + refs =calloc (new_cnt, sz); +if (!refs) +return -ENOMEM ; + +memcpy (refs, ptr->snapshot_refs, cnt * sz); + + ptr->snapshot_refs = refs; + ptr->snapshot_ref_cnt = new_cnt; + +return 0 ; +} + +static void intel_pt_free_snapshot_refs (struct intel_pt_recording *ptr) +{ +int i; + +for (i =0 ; i < ptr->snapshot_ref_cnt; i++) +zfree (&ptr->snapshot_refs[i].ref_buf); +zfree (&ptr->snapshot_refs); +} + +static void intel_pt_recording_free (struct auxtrace_record *itr) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); + +intel_pt_free_snapshot_refs (ptr); +free (ptr); +} + +static int intel_pt_alloc_snapshot_ref (struct intel_pt_recording *ptr,int idx, +size_t snapshot_buf_size) +{ +size_t ref_buf_size = ptr->snapshot_ref_buf_size; +void *ref_buf; + + ref_buf =zalloc (ref_buf_size); +if (!ref_buf) +return -ENOMEM ; + + ptr->snapshot_refs[idx].ref_buf = ref_buf; + ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size; + +return 0 ; +} + +static size_t intel_pt_snapshot_ref_buf_size (struct intel_pt_recording *ptr, +size_t snapshot_buf_size) +{ +const size_t max_size =256 *1024 ; +size_t buf_size =0 , psb_period; + +if (ptr->snapshot_size <=64 *1024 ) +return 0 ; + + psb_period =intel_pt_psb_period (ptr->intel_pt_pmu, ptr->evlist); +if (psb_period) + buf_size = psb_period *2 ; + +if (!buf_size || buf_size > max_size) + buf_size = max_size; + +if (buf_size >= snapshot_buf_size) +return 0 ; + +if (buf_size >= ptr->snapshot_size /2 ) +return 0 ; + +return buf_size; +} + +static int intel_pt_snapshot_init (struct intel_pt_recording *ptr, +size_t snapshot_buf_size) +{ +if (ptr->snapshot_init_done) +return 0 ; + + ptr->snapshot_init_done = true; + + ptr->snapshot_ref_buf_size =intel_pt_snapshot_ref_buf_size (ptr, + snapshot_buf_size); + +return 0 ; +} + +/** +* intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer. +* @buf1: first buffer +* @compare_size: number of bytes to compare +* @buf2: second buffer (a circular buffer) +* @offs2: offset in second buffer +* @buf2_size: size of second buffer +* +* The comparison allows for the possibility that the bytes to compare in the +* circular buffer are not contiguous. It is assumed that @compare_size <= +* @buf2_size. This function returns %false if the bytes are identical, %true +* otherwise. +*/ +static bool intel_pt_compare_buffers (void *buf1,size_t compare_size, +void *buf2,size_t offs2,size_t buf2_size) +{ +size_t end2 = offs2 + compare_size, part_size; + +if (end2 <= buf2_size) +return memcmp (buf1, buf2 + offs2, compare_size); + + part_size = end2 - buf2_size; +if (memcmp (buf1, buf2 + offs2, part_size)) +return true; + + compare_size -= part_size; + +return memcmp (buf1 + part_size, buf2, compare_size); +} + +static bool intel_pt_compare_ref (void *ref_buf,size_t ref_offset, +size_t ref_size,size_t buf_size, +void *data,size_t head) +{ +size_t ref_end = ref_offset + ref_size; + +if (ref_end > buf_size) { +if (head > ref_offset || head < ref_end - buf_size) +return true; + }else if (head > ref_offset && head < ref_end) { +return true; + } + +return intel_pt_compare_buffers (ref_buf, ref_size, data, ref_offset, + buf_size); +} + +static void intel_pt_copy_ref (void *ref_buf,size_t ref_size,size_t buf_size, +void *data,size_t head) +{ +if (head >= ref_size) { +memcpy (ref_buf, data + head - ref_size, ref_size); + }else { +memcpy (ref_buf, data, head); + ref_size -= head; +memcpy (ref_buf + head, data + buf_size - ref_size, ref_size); + } +} + +static bool intel_pt_wrapped (struct intel_pt_recording *ptr,int idx, +struct auxtrace_mmap *mm,unsigned char *data, +u64 head) +{ +struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx]; +bool wrapped; + + wrapped =intel_pt_compare_ref (ref->ref_buf, ref->ref_offset, + ptr->snapshot_ref_buf_size, mm->len, + data, head); + +intel_pt_copy_ref (ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len, + data, head); + +return wrapped; +} + +static bool intel_pt_first_wrap (u64 *data,size_t buf_size) +{ +int i, a, b; + + b = buf_size >>3 ; + a = b -512 ; +if (a <0 ) + a =0 ; + +for (i = a; i < b; i++) { +if (data[i]) +return true; + } + +return false; +} + +static int intel_pt_find_snapshot (struct auxtrace_record *itr,int idx, +struct auxtrace_mmap *mm,unsigned char *data, +u64 *head,u64 *old) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +bool wrapped; +int err; + +pr_debug3 ("%s: mmap index %d old head %zu new head %zu\n" , + __func__, idx, (size_t )*old, (size_t )*head); + + err =intel_pt_snapshot_init (ptr, mm->len); +if (err) + goto out_err; + +if (idx >= ptr->snapshot_ref_cnt) { + err =intel_pt_alloc_snapshot_refs (ptr, idx); +if (err) + goto out_err; + } + +if (ptr->snapshot_ref_buf_size) { +if (!ptr->snapshot_refs[idx].ref_buf) { + err =intel_pt_alloc_snapshot_ref (ptr, idx, mm->len); +if (err) + goto out_err; + } + wrapped =intel_pt_wrapped (ptr, idx, mm, data, *head); + }else { + wrapped = ptr->snapshot_refs[idx].wrapped; +if (!wrapped &&intel_pt_first_wrap ((u64 *)data, mm->len)) { + ptr->snapshot_refs[idx].wrapped = true; + wrapped = true; + } + } + +/* +* In full trace mode 'head' continually increases. However in snapshot +* mode 'head' is an offset within the buffer. Here 'old' and 'head' +* are adjusted to match the full trace case which expects that 'old' is +* always less than 'head'. +*/ +if (wrapped) { + *old = *head; + *head += mm->len; + }else { +if (mm->mask) + *old &= mm->mask; +else + *old %= mm->len; +if (*old > *head) + *head += mm->len; + } + +pr_debug3 ("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n" , + __func__, wrapped ?"" :"not " , (size_t )*old, (size_t )*head); + +return 0 ; + +out_err: +pr_err ("%s: failed, error %d\n" , __func__, err); +return err; +} + +static u64 intel_pt_reference (struct auxtrace_record *itr__maybe_unused ) +{ +return rdtsc (); +} + +static int intel_pt_read_finish (struct auxtrace_record *itr,int idx) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_evsel *evsel; + +evlist__for_each (ptr->evlist, evsel) { +if (evsel->attr.type == ptr->intel_pt_pmu->type) +return perf_evlist__enable_event_idx (ptr->evlist, evsel, + idx); + } +return -EINVAL ; +} + +struct auxtrace_record *intel_pt_recording_init (int *err) +{ +struct perf_pmu *intel_pt_pmu =perf_pmu__find (INTEL_PT_PMU_NAME ); +struct intel_pt_recording *ptr; + +if (!intel_pt_pmu) +return NULL ; + + ptr =zalloc (sizeof (struct intel_pt_recording )); +if (!ptr) { + *err = -ENOMEM ; +return NULL ; + } + + ptr->intel_pt_pmu = intel_pt_pmu; + ptr->itr.recording_options = intel_pt_recording_options; + ptr->itr.info_priv_size = intel_pt_info_priv_size; + ptr->itr.info_fill = intel_pt_info_fill; + ptr->itr.free = intel_pt_recording_free; + ptr->itr.snapshot_start = intel_pt_snapshot_start; + ptr->itr.snapshot_finish = intel_pt_snapshot_finish; + ptr->itr.find_snapshot = intel_pt_find_snapshot; + ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options; + ptr->itr.reference = intel_pt_reference; + ptr->itr.read_finish = intel_pt_read_finish; +return &ptr->itr; +}tools/perf/util/Build +1
-0@@ -76,6 +76,7 @@ libperf-y += cloexec.o libperf-y += thread-stack.o libperf-$(CONFIG_AUXTRACE) += auxtrace.o libperf-$(CONFIG_AUXTRACE) += intel-pt-decoder/ +libperf-$(CONFIG_AUXTRACE) += intel-pt.o libperf-y += parse-branch-options.o libperf-$(CONFIG_LIBELF) += symbol-elf.otools/perf/util/intel-pt.c new file +1889
-0@@ -0,0 +1,1889 @@ +/* +* intel_pt.c: Intel Processor Trace support +* Copyright (c) 2013-2015, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#include <stdio.h> +#include <stdbool.h> +#include <errno.h> +#include <linux/kernel.h> +#include <linux/types.h> + +#include "../perf.h" +#include "session.h" +#include "machine.h" +#include "tool.h" +#include "event.h" +#include "evlist.h" +#include "evsel.h" +#include "map.h" +#include "color.h" +#include "util.h" +#include "thread.h" +#include "thread-stack.h" +#include "symbol.h" +#include "callchain.h" +#include "dso.h" +#include "debug.h" +#include "auxtrace.h" +#include "tsc.h" +#include "intel-pt.h" + +#include "intel-pt-decoder/intel-pt-log.h" +#include "intel-pt-decoder/intel-pt-decoder.h" +#include "intel-pt-decoder/intel-pt-insn-decoder.h" +#include "intel-pt-decoder/intel-pt-pkt-decoder.h" + +#define MAX_TIMESTAMP (~0ULL) + +struct intel_pt { +struct auxtrace auxtrace; +struct auxtrace_queues queues; +struct auxtrace_heap heap; +u32 auxtrace_type; +struct perf_session *session; +struct machine *machine; +struct perf_evsel *switch_evsel; +struct thread *unknown_thread; +bool timeless_decoding; +bool sampling_mode; +bool snapshot_mode; +bool per_cpu_mmaps; +bool have_tsc; +bool data_queued; +bool est_tsc; +bool sync_switch; +bool est_tsc_orig; +int have_sched_switch; +u32 pmu_type; +u64 kernel_start; +u64 switch_ip; +u64 ptss_ip; + +struct perf_tsc_conversion tc; +bool cap_user_time_zero; + +struct itrace_synth_opts synth_opts; + +bool sample_instructions; +u64 instructions_sample_type; +u64 instructions_sample_period; +u64 instructions_id; + +bool sample_branches; +u32 branches_filter; +u64 branches_sample_type; +u64 branches_id; + +bool sample_transactions; +u64 transactions_sample_type; +u64 transactions_id; + +bool synth_needs_swap; + +u64 tsc_bit; +u64 noretcomp_bit; +}; + +enum switch_state { +INTEL_PT_SS_NOT_TRACING , +INTEL_PT_SS_UNKNOWN , +INTEL_PT_SS_TRACING , +INTEL_PT_SS_EXPECTING_SWITCH_EVENT , +INTEL_PT_SS_EXPECTING_SWITCH_IP , +}; + +struct intel_pt_queue { +struct intel_pt *pt; +unsigned int queue_nr; +struct auxtrace_buffer *buffer; +void *decoder; +const struct intel_pt_state *state; +struct ip_callchain *chain; +union perf_event *event_buf; +bool on_heap; +bool stop; +bool step_through_buffers; +bool use_buffer_pid_tid; +pid_t pid, tid; +int cpu; +int switch_state; +pid_t next_tid; +struct thread *thread; +bool exclude_kernel; +bool have_sample; +u64 time; +u64 timestamp; +u32 flags; +u16 insn_len; +}; + +static void intel_pt_dump (struct intel_pt *pt__maybe_unused , +unsigned char *buf,size_t len) +{ +struct intel_pt_pkt packet; +size_t pos =0 ; +int ret, pkt_len, i; +char desc[INTEL_PT_PKT_DESC_MAX ]; +const char *color =PERF_COLOR_BLUE ; + +color_fprintf (stdout, color, +". ... Intel Processor Trace data: size %zu bytes\n" , + len); + +while (len) { + ret =intel_pt_get_packet (buf, len, &packet); +if (ret >0 ) + pkt_len = ret; +else + pkt_len =1 ; +printf ("." ); +color_fprintf (stdout, color," %08x: " , pos); +for (i =0 ; i < pkt_len; i++) +color_fprintf (stdout, color," %02x" , buf[i]); +for (; i <16 ; i++) +color_fprintf (stdout, color," " ); +if (ret >0 ) { + ret =intel_pt_pkt_desc (&packet, desc, +INTEL_PT_PKT_DESC_MAX ); +if (ret >0 ) +color_fprintf (stdout, color," %s\n" , desc); + }else { +color_fprintf (stdout, color," Bad packet!\n" ); + } + pos += pkt_len; + buf += pkt_len; + len -= pkt_len; + } +} + +static void intel_pt_dump_event (struct intel_pt *pt,unsigned char *buf, +size_t len) +{ +printf (".\n" ); +intel_pt_dump (pt, buf, len); +} + +static int intel_pt_do_fix_overlap (struct intel_pt *pt,struct auxtrace_buffer *a, +struct auxtrace_buffer *b) +{ +void *start; + + start =intel_pt_find_overlap (a->data, a->size, b->data, b->size, + pt->have_tsc); +if (!start) +return -EINVAL ; + b->use_size = b->data + b->size - start; + b->use_data = start; +return 0 ; +} + +static void intel_pt_use_buffer_pid_tid (struct intel_pt_queue *ptq, +struct auxtrace_queue *queue, +struct auxtrace_buffer *buffer) +{ +if (queue->cpu ==-1 && buffer->cpu !=-1 ) + ptq->cpu = buffer->cpu; + + ptq->pid = buffer->pid; + ptq->tid = buffer->tid; + +intel_pt_log ("queue %u cpu %d pid %d tid %d\n" , + ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid); + + ptq->thread =NULL ; + +if (ptq->tid !=-1 ) { +if (ptq->pid !=-1 ) + ptq->thread =machine__findnew_thread (ptq->pt->machine, + ptq->pid, + ptq->tid); +else + ptq->thread =machine__find_thread (ptq->pt->machine,-1 , + ptq->tid); + } +} + +/* This function assumes data is processed sequentially only */ +static int intel_pt_get_trace (struct intel_pt_buffer *b,void *data) +{ +struct intel_pt_queue *ptq = data; +struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer; +struct auxtrace_queue *queue; + +if (ptq->stop) { + b->len =0 ; +return 0 ; + } + + queue = &ptq->pt->queues.queue_array[ptq->queue_nr]; + + buffer =auxtrace_buffer__next (queue, buffer); +if (!buffer) { +if (old_buffer) +auxtrace_buffer__drop_data (old_buffer); + b->len =0 ; +return 0 ; + } + + ptq->buffer = buffer; + +if (!buffer->data) { +int fd =perf_data_file__fd (ptq->pt->session->file); + + buffer->data =auxtrace_buffer__get_data (buffer, fd); +if (!buffer->data) +return -ENOMEM ; + } + +if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer && +intel_pt_do_fix_overlap (ptq->pt, old_buffer, buffer)) +return -ENOMEM ; + +if (old_buffer) +auxtrace_buffer__drop_data (old_buffer); + +if (buffer->use_data) { + b->len = buffer->use_size; + b->buf = buffer->use_data; + }else { + b->len = buffer->size; + b->buf = buffer->data; + } + b->ref_timestamp = buffer->reference; + +if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode && + !buffer->consecutive)) { + b->consecutive = false; + b->trace_nr = buffer->buffer_nr; + }else { + b->consecutive = true; + } + +if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid || + ptq->tid != buffer->tid)) +intel_pt_use_buffer_pid_tid (ptq, queue, buffer); + +if (ptq->step_through_buffers) + ptq->stop = true; + +if (!b->len) +return intel_pt_get_trace (b, data); + +return 0 ; +} + +struct intel_pt_cache_entry { +struct auxtrace_cache_entry entry; +u64 insn_cnt; +u64 byte_cnt; +enum intel_pt_insn_op op; +enum intel_pt_insn_branch branch; +int length; +int32_t rel; +}; + +static int intel_pt_config_div (const char *var,const char *value,void *data) +{ +int *d = data; +long val; + +if (!strcmp (var,"intel-pt.cache-divisor" )) { + val =strtol (value,NULL ,0 ); +if (val >0 && val <=INT_MAX ) + *d = val; + } + +return 0 ; +} + +static int intel_pt_cache_divisor (void ) +{ +static int d; + +if (d) +return d; + +perf_config (intel_pt_config_div, &d); + +if (!d) + d =64 ; + +return d; +} + +static unsigned int intel_pt_cache_size (struct dso *dso, +struct machine *machine) +{ +off_t size; + + size =dso__data_size (dso, machine); + size /=intel_pt_cache_divisor (); +if (size <1000 ) +return 10 ; +if (size > (1 <<21 )) +return 21 ; +return 32 -__builtin_clz (size); +} + +static struct auxtrace_cache *intel_pt_cache (struct dso *dso, +struct machine *machine) +{ +struct auxtrace_cache *c; +unsigned int bits; + +if (dso->auxtrace_cache) +return dso->auxtrace_cache; + + bits =intel_pt_cache_size (dso, machine); + +/* Ignoring cache creation failure */ + c =auxtrace_cache__new (bits,sizeof (struct intel_pt_cache_entry ),200 ); + + dso->auxtrace_cache = c; + +return c; +} + +static int intel_pt_cache_add (struct dso *dso,struct machine *machine, +u64 offset,u64 insn_cnt,u64 byte_cnt, +struct intel_pt_insn *intel_pt_insn) +{ +struct auxtrace_cache *c =intel_pt_cache (dso, machine); +struct intel_pt_cache_entry *e; +int err; + +if (!c) +return -ENOMEM ; + + e =auxtrace_cache__alloc_entry (c); +if (!e) +return -ENOMEM ; + + e->insn_cnt = insn_cnt; + e->byte_cnt = byte_cnt; + e->op = intel_pt_insn->op; + e->branch = intel_pt_insn->branch; + e->length = intel_pt_insn->length; + e->rel = intel_pt_insn->rel; + + err =auxtrace_cache__add (c, offset, &e->entry); +if (err) +auxtrace_cache__free_entry (c, e); + +return err; +} + +static struct intel_pt_cache_entry * +intel_pt_cache_lookup (struct dso *dso,struct machine *machine,u64 offset) +{ +struct auxtrace_cache *c =intel_pt_cache (dso, machine); + +if (!c) +return NULL ; + +return auxtrace_cache__lookup (dso->auxtrace_cache, offset); +} + +static int intel_pt_walk_next_insn (struct intel_pt_insn *intel_pt_insn, +uint64_t *insn_cnt_ptr,uint64_t *ip, +uint64_t to_ip,uint64_t max_insn_cnt, +void *data) +{ +struct intel_pt_queue *ptq = data; +struct machine *machine = ptq->pt->machine; +struct thread *thread; +struct addr_location al; +unsigned char buf[1024 ]; +size_t bufsz; +ssize_t len; +int x86_64; +u8 cpumode; +u64 offset, start_offset, start_ip; +u64 insn_cnt =0 ; +bool one_map = true; + +if (to_ip && *ip == to_ip) + goto out_no_cache; + + bufsz =intel_pt_insn_max_size (); + +if (*ip >= ptq->pt->kernel_start) + cpumode =PERF_RECORD_MISC_KERNEL ; +else + cpumode =PERF_RECORD_MISC_USER ; + + thread = ptq->thread; +if (!thread) { +if (cpumode !=PERF_RECORD_MISC_KERNEL ) +return -EINVAL ; + thread = ptq->pt->unknown_thread; + } + +while (1 ) { +thread__find_addr_map (thread, cpumode,MAP__FUNCTION , *ip, &al); +if (!al.map || !al.map->dso) +return -EINVAL ; + +if (al.map->dso->data.status ==DSO_DATA_STATUS_ERROR && +dso__data_status_seen (al.map->dso, +DSO_DATA_STATUS_SEEN_ITRACE )) +return -ENOENT ; + + offset = al.map->map_ip (al.map, *ip); + +if (!to_ip && one_map) { +struct intel_pt_cache_entry *e; + + e =intel_pt_cache_lookup (al.map->dso, machine, offset); +if (e && + (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) { + *insn_cnt_ptr = e->insn_cnt; + *ip += e->byte_cnt; + intel_pt_insn->op = e->op; + intel_pt_insn->branch = e->branch; + intel_pt_insn->length = e->length; + intel_pt_insn->rel = e->rel; +intel_pt_log_insn_no_data (intel_pt_insn, *ip); +return 0 ; + } + } + + start_offset = offset; + start_ip = *ip; + +/* Load maps to ensure dso->is_64_bit has been updated */ +map__load (al.map, machine->symbol_filter); + + x86_64 = al.map->dso->is_64_bit; + +while (1 ) { + len =dso__data_read_offset (al.map->dso, machine, + offset, buf, bufsz); +if (len <=0 ) +return -EINVAL ; + +if (intel_pt_get_insn (buf, len, x86_64, intel_pt_insn)) +return -EINVAL ; + +intel_pt_log_insn (intel_pt_insn, *ip); + + insn_cnt +=1 ; + +if (intel_pt_insn->branch !=INTEL_PT_BR_NO_BRANCH ) + goto out; + +if (max_insn_cnt && insn_cnt >= max_insn_cnt) + goto out_no_cache; + + *ip += intel_pt_insn->length; + +if (to_ip && *ip == to_ip) + goto out_no_cache; + +if (*ip >= al.map->end) +break ; + + offset += intel_pt_insn->length; + } + one_map = false; + } +out: + *insn_cnt_ptr = insn_cnt; + +if (!one_map) + goto out_no_cache; + +/* +* Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate +* entries. +*/ +if (to_ip) { +struct intel_pt_cache_entry *e; + + e =intel_pt_cache_lookup (al.map->dso, machine, start_offset); +if (e) +return 0 ; + } + +/* Ignore cache errors */ +intel_pt_cache_add (al.map->dso, machine, start_offset, insn_cnt, + *ip - start_ip, intel_pt_insn); + +return 0 ; + +out_no_cache: + *insn_cnt_ptr = insn_cnt; +return 0 ; +} + +static bool intel_pt_get_config (struct intel_pt *pt, +struct perf_event_attr *attr,u64 *config) +{ +if (attr->type == pt->pmu_type) { +if (config) + *config = attr->config; +return true; + } + +return false; +} + +static bool intel_pt_exclude_kernel (struct intel_pt *pt) +{ +struct perf_evsel *evsel; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr,NULL ) && + !evsel->attr.exclude_kernel) +return false; + } +return true; +} + +static bool intel_pt_return_compression (struct intel_pt *pt) +{ +struct perf_evsel *evsel; +u64 config; + +if (!pt->noretcomp_bit) +return true; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr, &config) && + (config & pt->noretcomp_bit)) +return false; + } +return true; +} + +static bool intel_pt_timeless_decoding (struct intel_pt *pt) +{ +struct perf_evsel *evsel; +bool timeless_decoding = true; +u64 config; + +if (!pt->tsc_bit || !pt->cap_user_time_zero) +return true; + +evlist__for_each (pt->session->evlist, evsel) { +if (!(evsel->attr.sample_type &PERF_SAMPLE_TIME )) +return true; +if (intel_pt_get_config (pt, &evsel->attr, &config)) { +if (config & pt->tsc_bit) + timeless_decoding = false; +else +return true; + } + } +return timeless_decoding; +} + +static bool intel_pt_tracing_kernel (struct intel_pt *pt) +{ +struct perf_evsel *evsel; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr,NULL ) && + !evsel->attr.exclude_kernel) +return true; + } +return false; +} + +static bool intel_pt_have_tsc (struct intel_pt *pt) +{ +struct perf_evsel *evsel; +bool have_tsc = false; +u64 config; + +if (!pt->tsc_bit) +return false; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr, &config)) { +if (config & pt->tsc_bit) + have_tsc = true; +else +return false; + } + } +return have_tsc; +} + +static u64 intel_pt_ns_to_ticks (const struct intel_pt *pt,u64 ns) +{ +u64 quot, rem; + + quot = ns / pt->tc.time_mult; + rem = ns % pt->tc.time_mult; +return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) / + pt->tc.time_mult; +} + +static struct intel_pt_queue *intel_pt_alloc_queue (struct intel_pt *pt, +unsigned int queue_nr) +{ +struct intel_pt_params params = { .get_trace =0 , }; +struct intel_pt_queue *ptq; + + ptq =zalloc (sizeof (struct intel_pt_queue )); +if (!ptq) +return NULL ; + +if (pt->synth_opts.callchain) { +size_t sz =sizeof (struct ip_callchain ); + + sz += pt->synth_opts.callchain_sz *sizeof (u64); + ptq->chain =zalloc (sz); +if (!ptq->chain) + goto out_free; + } + + ptq->event_buf =malloc (PERF_SAMPLE_MAX_SIZE ); +if (!ptq->event_buf) + goto out_free; + + ptq->pt = pt; + ptq->queue_nr = queue_nr; + ptq->exclude_kernel =intel_pt_exclude_kernel (pt); + ptq->pid =-1 ; + ptq->tid =-1 ; + ptq->cpu =-1 ; + ptq->next_tid =-1 ; + + params.get_trace = intel_pt_get_trace; + params.walk_insn = intel_pt_walk_next_insn; + params.data = ptq; + params.return_compression =intel_pt_return_compression (pt); + +if (pt->synth_opts.instructions) { +if (pt->synth_opts.period) { +switch (pt->synth_opts.period_type) { +case PERF_ITRACE_PERIOD_INSTRUCTIONS : + params.period_type = +INTEL_PT_PERIOD_INSTRUCTIONS ; + params.period = pt->synth_opts.period; +break ; +case PERF_ITRACE_PERIOD_TICKS : + params.period_type =INTEL_PT_PERIOD_TICKS ; + params.period = pt->synth_opts.period; +break ; +case PERF_ITRACE_PERIOD_NANOSECS : + params.period_type =INTEL_PT_PERIOD_TICKS ; + params.period =intel_pt_ns_to_ticks (pt, + pt->synth_opts.period); +break ; +default : +break ; + } + } + +if (!params.period) { + params.period_type =INTEL_PT_PERIOD_INSTRUCTIONS ; + params.period =1000 ; + } + } + + ptq->decoder =intel_pt_decoder_new (¶ms); +if (!ptq->decoder) + goto out_free; + +return ptq; + +out_free: +zfree (&ptq->event_buf); +zfree (&ptq->chain); +free (ptq); +return NULL ; +} + +static void intel_pt_free_queue (void *priv) +{ +struct intel_pt_queue *ptq = priv; + +if (!ptq) +return ; +intel_pt_decoder_free (ptq->decoder); +zfree (&ptq->event_buf); +zfree (&ptq->chain); +free (ptq); +} + +static void intel_pt_set_pid_tid_cpu (struct intel_pt *pt, +struct auxtrace_queue *queue) +{ +struct intel_pt_queue *ptq = queue->priv; + +if (queue->tid ==-1 || pt->have_sched_switch) { + ptq->tid =machine__get_current_tid (pt->machine, ptq->cpu); + ptq->thread =NULL ; + } + +if (!ptq->thread && ptq->tid !=-1 ) + ptq->thread =machine__find_thread (pt->machine,-1 , ptq->tid); + +if (ptq->thread) { + ptq->pid = ptq->thread->pid_; +if (queue->cpu ==-1 ) + ptq->cpu = ptq->thread->cpu; + } +} + +static void intel_pt_sample_flags (struct intel_pt_queue *ptq) +{ +if (ptq->state->flags &INTEL_PT_ABORT_TX ) { + ptq->flags =PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_TX_ABORT ; + }else if (ptq->state->flags &INTEL_PT_ASYNC ) { +if (ptq->state->to_ip) + ptq->flags =PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL | +PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_INTERRUPT ; +else + ptq->flags =PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_TRACE_END ; + ptq->insn_len =0 ; + }else { +if (ptq->state->from_ip) + ptq->flags =intel_pt_insn_type (ptq->state->insn_op); +else + ptq->flags =PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_TRACE_BEGIN ; +if (ptq->state->flags &INTEL_PT_IN_TX ) + ptq->flags |=PERF_IP_FLAG_IN_TX ; + ptq->insn_len = ptq->state->insn_len; + } +} + +static int intel_pt_setup_queue (struct intel_pt *pt, +struct auxtrace_queue *queue, +unsigned int queue_nr) +{ +struct intel_pt_queue *ptq = queue->priv; + +if (list_empty (&queue->head)) +return 0 ; + +if (!ptq) { + ptq =intel_pt_alloc_queue (pt, queue_nr); +if (!ptq) +return -ENOMEM ; + queue->priv = ptq; + +if (queue->cpu !=-1 ) + ptq->cpu = queue->cpu; + ptq->tid = queue->tid; + +if (pt->sampling_mode) { +if (pt->timeless_decoding) + ptq->step_through_buffers = true; +if (pt->timeless_decoding || !pt->have_sched_switch) + ptq->use_buffer_pid_tid = true; + } + } + +if (!ptq->on_heap && + (!pt->sync_switch || + ptq->switch_state !=INTEL_PT_SS_EXPECTING_SWITCH_EVENT )) { +const struct intel_pt_state *state; +int ret; + +if (pt->timeless_decoding) +return 0 ; + +intel_pt_log ("queue %u getting timestamp\n" , queue_nr); +intel_pt_log ("queue %u decoding cpu %d pid %d tid %d\n" , + queue_nr, ptq->cpu, ptq->pid, ptq->tid); +while (1 ) { + state =intel_pt_decode (ptq->decoder); +if (state->err) { +if (state->err ==INTEL_PT_ERR_NODATA ) { +intel_pt_log ("queue %u has no timestamp\n" , + queue_nr); +return 0 ; + } +continue ; + } +if (state->timestamp) +break ; + } + + ptq->timestamp = state->timestamp; +intel_pt_log ("queue %u timestamp 0x%" PRIx64"\n" , + queue_nr, ptq->timestamp); + ptq->state = state; + ptq->have_sample = true; +intel_pt_sample_flags (ptq); + ret =auxtrace_heap__add (&pt->heap, queue_nr, ptq->timestamp); +if (ret) +return ret; + ptq->on_heap = true; + } + +return 0 ; +} + +static int intel_pt_setup_queues (struct intel_pt *pt) +{ +unsigned int i; +int ret; + +for (i =0 ; i < pt->queues.nr_queues; i++) { + ret =intel_pt_setup_queue (pt, &pt->queues.queue_array[i], i); +if (ret) +return ret; + } +return 0 ; +} + +static int intel_pt_inject_event (union perf_event *event, +struct perf_sample *sample,u64 type, +bool swapped) +{ + event->header.size =perf_event__sample_event_size (sample, type,0 ); +return perf_event__synthesize_sample (event, type,0 , sample, swapped); +} + +static int intel_pt_synth_branch_sample (struct intel_pt_queue *ptq) +{ +int ret; +struct intel_pt *pt = ptq->pt; +union perf_event *event = ptq->event_buf; +struct perf_sample sample = { .ip =0 , }; + + event->sample.header.type =PERF_RECORD_SAMPLE ; + event->sample.header.misc =PERF_RECORD_MISC_USER ; + event->sample.header.size =sizeof (struct perf_event_header ); + +if (!pt->timeless_decoding) + sample.time =tsc_to_perf_time (ptq->timestamp, &pt->tc); + + sample.ip = ptq->state->from_ip; + sample.pid = ptq->pid; + sample.tid = ptq->tid; + sample.addr = ptq->state->to_ip; + sample.id = ptq->pt->branches_id; + sample.stream_id = ptq->pt->branches_id; + sample.period =1 ; + sample.cpu = ptq->cpu; + +if (pt->branches_filter && !(pt->branches_filter & ptq->flags)) +return 0 ; + +if (pt->synth_opts.inject) { + ret =intel_pt_inject_event (event, &sample, + pt->branches_sample_type, + pt->synth_needs_swap); +if (ret) +return ret; + } + + ret =perf_session__deliver_synth_event (pt->session, event, &sample); +if (ret) +pr_err ("Intel Processor Trace: failed to deliver branch event, error %d\n" , + ret); + +return ret; +} + +static int intel_pt_synth_instruction_sample (struct intel_pt_queue *ptq) +{ +int ret; +struct intel_pt *pt = ptq->pt; +union perf_event *event = ptq->event_buf; +struct perf_sample sample = { .ip =0 , }; + + event->sample.header.type =PERF_RECORD_SAMPLE ; + event->sample.header.misc =PERF_RECORD_MISC_USER ; + event->sample.header.size =sizeof (struct perf_event_header ); + +if (!pt->timeless_decoding) + sample.time =tsc_to_perf_time (ptq->timestamp, &pt->tc); + + sample.ip = ptq->state->from_ip; + sample.pid = ptq->pid; + sample.tid = ptq->tid; + sample.addr = ptq->state->to_ip; + sample.id = ptq->pt->instructions_id; + sample.stream_id = ptq->pt->instructions_id; + sample.period = ptq->pt->instructions_sample_period; + sample.cpu = ptq->cpu; + +if (pt->synth_opts.callchain) { +thread_stack__sample (ptq->thread, ptq->chain, + pt->synth_opts.callchain_sz, sample.ip); + sample.callchain = ptq->chain; + } + +if (pt->synth_opts.inject) { + ret =intel_pt_inject_event (event, &sample, + pt->instructions_sample_type, + pt->synth_needs_swap); +if (ret) +return ret; + } + + ret =perf_session__deliver_synth_event (pt->session, event, &sample); +if (ret) +pr_err ("Intel Processor Trace: failed to deliver instruction event, error %d\n" , + ret); + +return ret; +} + +static int intel_pt_synth_transaction_sample (struct intel_pt_queue *ptq) +{ +int ret; +struct intel_pt *pt = ptq->pt; +union perf_event *event = ptq->event_buf; +struct perf_sample sample = { .ip =0 , }; + + event->sample.header.type =PERF_RECORD_SAMPLE ; + event->sample.header.misc =PERF_RECORD_MISC_USER ; + event->sample.header.size =sizeof (struct perf_event_header ); + +if (!pt->timeless_decoding) + sample.time =tsc_to_perf_time (ptq->timestamp, &pt->tc); + + sample.ip = ptq->state->from_ip; + sample.pid = ptq->pid; + sample.tid = ptq->tid; + sample.addr = ptq->state->to_ip; + sample.id = ptq->pt->transactions_id; + sample.stream_id = ptq->pt->transactions_id; + sample.period =1 ; + sample.cpu = ptq->cpu; + sample.flags = ptq->flags; + sample.insn_len = ptq->insn_len; + +if (pt->synth_opts.callchain) { +thread_stack__sample (ptq->thread, ptq->chain, + pt->synth_opts.callchain_sz, sample.ip); + sample.callchain = ptq->chain; + } + +if (pt->synth_opts.inject) { + ret =intel_pt_inject_event (event, &sample, + pt->transactions_sample_type, + pt->synth_needs_swap); +if (ret) +return ret; + } + + ret =perf_session__deliver_synth_event (pt->session, event, &sample); +if (ret) +pr_err ("Intel Processor Trace: failed to deliver transaction event, error %d\n" , + ret); + +return ret; +} + +static int intel_pt_synth_error (struct intel_pt *pt,int code,int cpu, +pid_t pid,pid_t tid,u64 ip) +{ +union perf_event event; +char msg[MAX_AUXTRACE_ERROR_MSG ]; +int err; + +intel_pt__strerror (code, msg,MAX_AUXTRACE_ERROR_MSG ); + +auxtrace_synth_error (&event.auxtrace_error,PERF_AUXTRACE_ERROR_ITRACE , + code, cpu, pid, tid, ip, msg); + + err =perf_session__deliver_synth_event (pt->session, &event,NULL ); +if (err) +pr_err ("Intel Processor Trace: failed to deliver error event, error %d\n" , + err); + +return err; +} + +static int intel_pt_next_tid (struct intel_pt *pt,struct intel_pt_queue *ptq) +{ +struct auxtrace_queue *queue; +pid_t tid = ptq->next_tid; +int err; + +if (tid ==-1 ) +return 0 ; + +intel_pt_log ("switch: cpu %d tid %d\n" , ptq->cpu, tid); + + err =machine__set_current_tid (pt->machine, ptq->cpu,-1 , tid); + + queue = &pt->queues.queue_array[ptq->queue_nr]; +intel_pt_set_pid_tid_cpu (pt, queue); + + ptq->next_tid =-1 ; + +return err; +} + +static inline bool intel_pt_is_switch_ip (struct intel_pt_queue *ptq,u64 ip) +{ +struct intel_pt *pt = ptq->pt; + +return ip == pt->switch_ip && + (ptq->flags &PERF_IP_FLAG_BRANCH ) && + !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL |PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_INTERRUPT |PERF_IP_FLAG_TX_ABORT )); +} + +static int intel_pt_sample (struct intel_pt_queue *ptq) +{ +const struct intel_pt_state *state = ptq->state; +struct intel_pt *pt = ptq->pt; +int err; + +if (!ptq->have_sample) +return 0 ; + + ptq->have_sample = false; + +if (pt->sample_instructions && + (state->type &INTEL_PT_INSTRUCTION )) { + err =intel_pt_synth_instruction_sample (ptq); +if (err) +return err; + } + +if (pt->sample_transactions && + (state->type &INTEL_PT_TRANSACTION )) { + err =intel_pt_synth_transaction_sample (ptq); +if (err) +return err; + } + +if (!(state->type &INTEL_PT_BRANCH )) +return 0 ; + +if (pt->synth_opts.callchain) +thread_stack__event (ptq->thread, ptq->flags, state->from_ip, + state->to_ip, ptq->insn_len, + state->trace_nr); + +if (pt->sample_branches) { + err =intel_pt_synth_branch_sample (ptq); +if (err) +return err; + } + +if (!pt->sync_switch) +return 0 ; + +if (intel_pt_is_switch_ip (ptq, state->to_ip)) { +switch (ptq->switch_state) { +case INTEL_PT_SS_UNKNOWN : +case INTEL_PT_SS_EXPECTING_SWITCH_IP : + err =intel_pt_next_tid (pt, ptq); +if (err) +return err; + ptq->switch_state =INTEL_PT_SS_TRACING ; +break ; +default : + ptq->switch_state =INTEL_PT_SS_EXPECTING_SWITCH_EVENT ; +return 1 ; + } + }else if (!state->to_ip) { + ptq->switch_state =INTEL_PT_SS_NOT_TRACING ; + }else if (ptq->switch_state ==INTEL_PT_SS_NOT_TRACING ) { + ptq->switch_state =INTEL_PT_SS_UNKNOWN ; + }else if (ptq->switch_state ==INTEL_PT_SS_UNKNOWN && + state->to_ip == pt->ptss_ip && + (ptq->flags &PERF_IP_FLAG_CALL )) { + ptq->switch_state =INTEL_PT_SS_TRACING ; + } + +return 0 ; +} + +static u64 intel_pt_switch_ip (struct machine *machine,u64 *ptss_ip) +{ +struct map *map; +struct symbol *sym, *start; +u64 ip, switch_ip =0 ; + +if (ptss_ip) + *ptss_ip =0 ; + + map =machine__kernel_map (machine,MAP__FUNCTION ); +if (!map) +return 0 ; + +if (map__load (map, machine->symbol_filter)) +return 0 ; + + start =dso__first_symbol (map->dso,MAP__FUNCTION ); + +for (sym = start; sym; sym =dso__next_symbol (sym)) { +if (sym->binding ==STB_GLOBAL && + !strcmp (sym->name,"__switch_to" )) { + ip = map->unmap_ip (map, sym->start); +if (ip >= map->start && ip < map->end) { + switch_ip = ip; +break ; + } + } + } + +if (!switch_ip || !ptss_ip) +return 0 ; + +for (sym = start; sym; sym =dso__next_symbol (sym)) { +if (!strcmp (sym->name,"perf_trace_sched_switch" )) { + ip = map->unmap_ip (map, sym->start); +if (ip >= map->start && ip < map->end) { + *ptss_ip = ip; +break ; + } + } + } + +return switch_ip; +} + +static int intel_pt_run_decoder (struct intel_pt_queue *ptq,u64 *timestamp) +{ +const struct intel_pt_state *state = ptq->state; +struct intel_pt *pt = ptq->pt; +int err; + +if (!pt->kernel_start) { + pt->kernel_start =machine__kernel_start (pt->machine); +if (pt->per_cpu_mmaps && pt->have_sched_switch && + !pt->timeless_decoding &&intel_pt_tracing_kernel (pt) && + !pt->sampling_mode) { + pt->switch_ip =intel_pt_switch_ip (pt->machine, + &pt->ptss_ip); +if (pt->switch_ip) { +intel_pt_log ("switch_ip: %" PRIx64" ptss_ip: %" PRIx64"\n" , + pt->switch_ip, pt->ptss_ip); + pt->sync_switch = true; + pt->est_tsc_orig = pt->est_tsc; + pt->est_tsc = false; + } + } + } + +intel_pt_log ("queue %u decoding cpu %d pid %d tid %d\n" , + ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid); +while (1 ) { + err =intel_pt_sample (ptq); +if (err) +return err; + + state =intel_pt_decode (ptq->decoder); +if (state->err) { +if (state->err ==INTEL_PT_ERR_NODATA ) +return 1 ; +if (pt->sync_switch && + state->from_ip >= pt->kernel_start) { + pt->sync_switch = false; + pt->est_tsc = pt->est_tsc_orig; +intel_pt_next_tid (pt, ptq); + } +if (pt->synth_opts.errors) { + err =intel_pt_synth_error (pt, state->err, + ptq->cpu, ptq->pid, + ptq->tid, + state->from_ip); +if (err) +return err; + } +continue ; + } + + ptq->state = state; + ptq->have_sample = true; +intel_pt_sample_flags (ptq); + +/* Use estimated TSC upon return to user space */ +if (pt->est_tsc) { +if (state->from_ip >= pt->kernel_start && + state->to_ip && + state->to_ip < pt->kernel_start) + ptq->timestamp = state->est_timestamp; +else if (state->timestamp > ptq->timestamp) + ptq->timestamp = state->timestamp; +/* Use estimated TSC in unknown switch state */ + }else if (pt->sync_switch && + ptq->switch_state ==INTEL_PT_SS_UNKNOWN && + state->to_ip == pt->switch_ip && + (ptq->flags &PERF_IP_FLAG_CALL ) && + ptq->next_tid ==-1 ) { + ptq->timestamp = state->est_timestamp; + }else if (state->timestamp > ptq->timestamp) { + ptq->timestamp = state->timestamp; + } + +if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) { + *timestamp = ptq->timestamp; +return 0 ; + } + } +return 0 ; +} + +static inline int intel_pt_update_queues (struct intel_pt *pt) +{ +if (pt->queues.new_data) { + pt->queues.new_data = false; +return intel_pt_setup_queues (pt); + } +return 0 ; +} + +static int intel_pt_process_queues (struct intel_pt *pt,u64 timestamp) +{ +unsigned int queue_nr; +u64 ts; +int ret; + +while (1 ) { +struct auxtrace_queue *queue; +struct intel_pt_queue *ptq; + +if (!pt->heap.heap_cnt) +return 0 ; + +if (pt->heap.heap_array[0 ].ordinal >= timestamp) +return 0 ; + + queue_nr = pt->heap.heap_array[0 ].queue_nr; + queue = &pt->queues.queue_array[queue_nr]; + ptq = queue->priv; + +intel_pt_log ("queue %u processing 0x%" PRIx64" to 0x%" PRIx64"\n" , + queue_nr, pt->heap.heap_array[0 ].ordinal, + timestamp); + +auxtrace_heap__pop (&pt->heap); + +if (pt->heap.heap_cnt) { + ts = pt->heap.heap_array[0 ].ordinal +1 ; +if (ts > timestamp) + ts = timestamp; + }else { + ts = timestamp; + } + +intel_pt_set_pid_tid_cpu (pt, queue); + + ret =intel_pt_run_decoder (ptq, &ts); + +if (ret <0 ) { +auxtrace_heap__add (&pt->heap, queue_nr, ts); +return ret; + } + +if (!ret) { + ret =auxtrace_heap__add (&pt->heap, queue_nr, ts); +if (ret <0 ) +return ret; + }else { + ptq->on_heap = false; + } + } + +return 0 ; +} + +static int intel_pt_process_timeless_queues (struct intel_pt *pt,pid_t tid, +u64 time_) +{ +struct auxtrace_queues *queues = &pt->queues; +unsigned int i; +u64 ts =0 ; + +for (i =0 ; i < queues->nr_queues; i++) { +struct auxtrace_queue *queue = &pt->queues.queue_array[i]; +struct intel_pt_queue *ptq = queue->priv; + +if (ptq && (tid ==-1 || ptq->tid == tid)) { + ptq->time = time_; +intel_pt_set_pid_tid_cpu (pt, queue); +intel_pt_run_decoder (ptq, &ts); + } + } +return 0 ; +} + +static int intel_pt_lost (struct intel_pt *pt,struct perf_sample *sample) +{ +return intel_pt_synth_error (pt,INTEL_PT_ERR_LOST , sample->cpu, + sample->pid, sample->tid,0 ); +} + +static struct intel_pt_queue *intel_pt_cpu_to_ptq (struct intel_pt *pt,int cpu) +{ +unsigned i, j; + +if (cpu <0 || !pt->queues.nr_queues) +return NULL ; + +if ((unsigned )cpu >= pt->queues.nr_queues) + i = pt->queues.nr_queues -1 ; +else + i = cpu; + +if (pt->queues.queue_array[i].cpu == cpu) +return pt->queues.queue_array[i].priv; + +for (j =0 ; i >0 ; j++) { +if (pt->queues.queue_array[--i].cpu == cpu) +return pt->queues.queue_array[i].priv; + } + +for (; j < pt->queues.nr_queues; j++) { +if (pt->queues.queue_array[j].cpu == cpu) +return pt->queues.queue_array[j].priv; + } + +return NULL ; +} + +static int intel_pt_process_switch (struct intel_pt *pt, +struct perf_sample *sample) +{ +struct intel_pt_queue *ptq; +struct perf_evsel *evsel; +pid_t tid; +int cpu, err; + + evsel =perf_evlist__id2evsel (pt->session->evlist, sample->id); +if (evsel != pt->switch_evsel) +return 0 ; + + tid =perf_evsel__intval (evsel, sample,"next_pid" ); + cpu = sample->cpu; + +intel_pt_log ("sched_switch: cpu %d tid %d time %" PRIu64" tsc %#" PRIx64"\n" , + cpu, tid, sample->time,perf_time_to_tsc (sample->time, + &pt->tc)); + +if (!pt->sync_switch) + goto out; + + ptq =intel_pt_cpu_to_ptq (pt, cpu); +if (!ptq) + goto out; + +switch (ptq->switch_state) { +case INTEL_PT_SS_NOT_TRACING : + ptq->next_tid =-1 ; +break ; +case INTEL_PT_SS_UNKNOWN : +case INTEL_PT_SS_TRACING : + ptq->next_tid = tid; + ptq->switch_state =INTEL_PT_SS_EXPECTING_SWITCH_IP ; +return 0 ; +case INTEL_PT_SS_EXPECTING_SWITCH_EVENT : +if (!ptq->on_heap) { + ptq->timestamp =perf_time_to_tsc (sample->time, + &pt->tc); + err =auxtrace_heap__add (&pt->heap, ptq->queue_nr, + ptq->timestamp); +if (err) +return err; + ptq->on_heap = true; + } + ptq->switch_state =INTEL_PT_SS_TRACING ; +break ; +case INTEL_PT_SS_EXPECTING_SWITCH_IP : + ptq->next_tid = tid; +intel_pt_log ("ERROR: cpu %d expecting switch ip\n" , cpu); +break ; +default : +break ; + } +out: +return machine__set_current_tid (pt->machine, cpu,-1 , tid); +} + +static int intel_pt_process_itrace_start (struct intel_pt *pt, +union perf_event *event, +struct perf_sample *sample) +{ +if (!pt->per_cpu_mmaps) +return 0 ; + +intel_pt_log ("itrace_start: cpu %d pid %d tid %d time %" PRIu64" tsc %#" PRIx64"\n" , + sample->cpu, event->itrace_start.pid, + event->itrace_start.tid, sample->time, +perf_time_to_tsc (sample->time, &pt->tc)); + +return machine__set_current_tid (pt->machine, sample->cpu, + event->itrace_start.pid, + event->itrace_start.tid); +} + +static int intel_pt_process_event (struct perf_session *session, +union perf_event *event, +struct perf_sample *sample, +struct perf_tool *tool) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); +u64 timestamp; +int err =0 ; + +if (dump_trace) +return 0 ; + +if (!tool->ordered_events) { +pr_err ("Intel Processor Trace requires ordered events\n" ); +return -EINVAL ; + } + +if (sample->time) + timestamp =perf_time_to_tsc (sample->time, &pt->tc); +else + timestamp =0 ; + +if (timestamp || pt->timeless_decoding) { + err =intel_pt_update_queues (pt); +if (err) +return err; + } + +if (pt->timeless_decoding) { +if (event->header.type ==PERF_RECORD_EXIT ) { + err =intel_pt_process_timeless_queues (pt, + event->comm.tid, + sample->time); + } + }else if (timestamp) { + err =intel_pt_process_queues (pt, timestamp); + } +if (err) +return err; + +if (event->header.type ==PERF_RECORD_AUX && + (event->aux.flags &PERF_AUX_FLAG_TRUNCATED ) && + pt->synth_opts.errors) + err =intel_pt_lost (pt, sample); + +if (pt->switch_evsel && event->header.type ==PERF_RECORD_SAMPLE ) + err =intel_pt_process_switch (pt, sample); +else if (event->header.type ==PERF_RECORD_ITRACE_START ) + err =intel_pt_process_itrace_start (pt, event, sample); + +return err; +} + +static int intel_pt_flush (struct perf_session *session,struct perf_tool *tool) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); +int ret; + +if (dump_trace) +return 0 ; + +if (!tool->ordered_events) +return -EINVAL ; + + ret =intel_pt_update_queues (pt); +if (ret <0 ) +return ret; + +if (pt->timeless_decoding) +return intel_pt_process_timeless_queues (pt,-1 , +MAX_TIMESTAMP -1 ); + +return intel_pt_process_queues (pt,MAX_TIMESTAMP ); +} + +static void intel_pt_free_events (struct perf_session *session) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); +struct auxtrace_queues *queues = &pt->queues; +unsigned int i; + +for (i =0 ; i < queues->nr_queues; i++) { +intel_pt_free_queue (queues->queue_array[i].priv); + queues->queue_array[i].priv =NULL ; + } +intel_pt_log_disable (); +auxtrace_queues__free (queues); +} + +static void intel_pt_free (struct perf_session *session) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); + +auxtrace_heap__free (&pt->heap); +intel_pt_free_events (session); + session->auxtrace =NULL ; +thread__delete (pt->unknown_thread); +free (pt); +} + +static int intel_pt_process_auxtrace_event (struct perf_session *session, +union perf_event *event, +struct perf_tool *tool__maybe_unused ) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); + +if (pt->sampling_mode) +return 0 ; + +if (!pt->data_queued) { +struct auxtrace_buffer *buffer; +off_t data_offset; +int fd =perf_data_file__fd (session->file); +int err; + +if (perf_data_file__is_pipe (session->file)) { + data_offset =0 ; + }else { + data_offset =lseek (fd,0 ,SEEK_CUR ); +if (data_offset ==-1 ) +return -errno; + } + + err =auxtrace_queues__add_event (&pt->queues, session, event, + data_offset, &buffer); +if (err) +return err; + +/* Dump here now we have copied a piped trace out of the pipe */ +if (dump_trace) { +if (auxtrace_buffer__get_data (buffer, fd)) { +intel_pt_dump_event (pt, buffer->data, + buffer->size); +auxtrace_buffer__put_data (buffer); + } + } + } + +return 0 ; +} + +struct intel_pt_synth { +struct perf_tool dummy_tool; +struct perf_session *session; +}; + +static int intel_pt_event_synth (struct perf_tool *tool, +union perf_event *event, +struct perf_sample *sample__maybe_unused , +struct machine *machine__maybe_unused ) +{ +struct intel_pt_synth *intel_pt_synth = + container_of(tool, struct intel_pt_synth, dummy_tool); + +return perf_session__deliver_synth_event (intel_pt_synth->session, event, +NULL ); +} + +static int intel_pt_synth_event (struct perf_session *session, +struct perf_event_attr *attr,u64 id) +{ +struct intel_pt_synth intel_pt_synth; + +memset (&intel_pt_synth,0 ,sizeof (struct intel_pt_synth )); + intel_pt_synth.session = session; + +return perf_event__synthesize_attr (&intel_pt_synth.dummy_tool, attr,1 , + &id, intel_pt_event_synth); +} + +static int intel_pt_synth_events (struct intel_pt *pt, +struct perf_session *session) +{ +struct perf_evlist *evlist = session->evlist; +struct perf_evsel *evsel; +struct perf_event_attr attr; +bool found = false; +u64 id; +int err; + +evlist__for_each (evlist, evsel) { +if (evsel->attr.type == pt->pmu_type && evsel->ids) { + found = true; +break ; + } + } + +if (!found) { +pr_debug ("There are no selected events with Intel Processor Trace data\n" ); +return 0 ; + } + +memset (&attr,0 ,sizeof (struct perf_event_attr )); + attr.size =sizeof (struct perf_event_attr ); + attr.type =PERF_TYPE_HARDWARE ; + attr.sample_type = evsel->attr.sample_type &PERF_SAMPLE_MASK ; + attr.sample_type |=PERF_SAMPLE_IP |PERF_SAMPLE_TID | +PERF_SAMPLE_PERIOD ; +if (pt->timeless_decoding) + attr.sample_type &= ~(u64 )PERF_SAMPLE_TIME ; +else + attr.sample_type |=PERF_SAMPLE_TIME ; +if (!pt->per_cpu_mmaps) + attr.sample_type &= ~(u64 )PERF_SAMPLE_CPU ; + attr.exclude_user = evsel->attr.exclude_user; + attr.exclude_kernel = evsel->attr.exclude_kernel; + attr.exclude_hv = evsel->attr.exclude_hv; + attr.exclude_host = evsel->attr.exclude_host; + attr.exclude_guest = evsel->attr.exclude_guest; + attr.sample_id_all = evsel->attr.sample_id_all; + attr.read_format = evsel->attr.read_format; + + id = evsel->id[0 ] +1000000000 ; +if (!id) + id =1 ; + +if (pt->synth_opts.instructions) { + attr.config =PERF_COUNT_HW_INSTRUCTIONS ; +if (pt->synth_opts.period_type ==PERF_ITRACE_PERIOD_NANOSECS ) + attr.sample_period = +intel_pt_ns_to_ticks (pt, pt->synth_opts.period); +else + attr.sample_period = pt->synth_opts.period; + pt->instructions_sample_period = attr.sample_period; +if (pt->synth_opts.callchain) + attr.sample_type |=PERF_SAMPLE_CALLCHAIN ; +pr_debug ("Synthesizing 'instructions' event with id %" PRIu64" sample type %#" PRIx64"\n" , + id, (u64 )attr.sample_type); + err =intel_pt_synth_event (session, &attr, id); +if (err) { +pr_err ("%s: failed to synthesize 'instructions' event type\n" , + __func__); +return err; + } + pt->sample_instructions = true; + pt->instructions_sample_type = attr.sample_type; + pt->instructions_id = id; + id +=1 ; + } + +if (pt->synth_opts.transactions) { + attr.config =PERF_COUNT_HW_INSTRUCTIONS ; + attr.sample_period =1 ; +if (pt->synth_opts.callchain) + attr.sample_type |=PERF_SAMPLE_CALLCHAIN ; +pr_debug ("Synthesizing 'transactions' event with id %" PRIu64" sample type %#" PRIx64"\n" , + id, (u64 )attr.sample_type); + err =intel_pt_synth_event (session, &attr, id); +if (err) { +pr_err ("%s: failed to synthesize 'transactions' event type\n" , + __func__); +return err; + } + pt->sample_transactions = true; + pt->transactions_id = id; + id +=1 ; +evlist__for_each (evlist, evsel) { +if (evsel->id && evsel->id[0 ] == pt->transactions_id) { +if (evsel->name) +zfree (&evsel->name); + evsel->name =strdup ("transactions" ); +break ; + } + } + } + +if (pt->synth_opts.branches) { + attr.config =PERF_COUNT_HW_BRANCH_INSTRUCTIONS ; + attr.sample_period =1 ; + attr.sample_type |=PERF_SAMPLE_ADDR ; + attr.sample_type &= ~(u64 )PERF_SAMPLE_CALLCHAIN ; +pr_debug ("Synthesizing 'branches' event with id %" PRIu64" sample type %#" PRIx64"\n" , + id, (u64 )attr.sample_type); + err =intel_pt_synth_event (session, &attr, id); +if (err) { +pr_err ("%s: failed to synthesize 'branches' event type\n" , + __func__); +return err; + } + pt->sample_branches = true; + pt->branches_sample_type = attr.sample_type; + pt->branches_id = id; + } + + pt->synth_needs_swap = evsel->needs_swap; + +return 0 ; +} + +static struct perf_evsel *intel_pt_find_sched_switch (struct perf_evlist *evlist) +{ +struct perf_evsel *evsel; + +evlist__for_each_reverse (evlist, evsel) { +const char *name =perf_evsel__name (evsel); + +if (!strcmp (name,"sched:sched_switch" )) +return evsel; + } + +return NULL ; +} + +static const char *const intel_pt_info_fmts[] = { + [INTEL_PT_PMU_TYPE ] =" PMU Type %" PRId64"\n" , + [INTEL_PT_TIME_SHIFT ] =" Time Shift %" PRIu64"\n" , + [INTEL_PT_TIME_MULT ] =" Time Muliplier %" PRIu64"\n" , + [INTEL_PT_TIME_ZERO ] =" Time Zero %" PRIu64"\n" , + [INTEL_PT_CAP_USER_TIME_ZERO ] =" Cap Time Zero %" PRId64"\n" , + [INTEL_PT_TSC_BIT ] =" TSC bit %#" PRIx64"\n" , + [INTEL_PT_NORETCOMP_BIT ] =" NoRETComp bit %#" PRIx64"\n" , + [INTEL_PT_HAVE_SCHED_SWITCH ] =" Have sched_switch %" PRId64"\n" , + [INTEL_PT_SNAPSHOT_MODE ] =" Snapshot mode %" PRId64"\n" , + [INTEL_PT_PER_CPU_MMAPS ] =" Per-cpu maps %" PRId64"\n" , +}; + +static void intel_pt_print_info (u64 *arr,int start,int finish) +{ +int i; + +if (!dump_trace) +return ; + +for (i = start; i <= finish; i++) +fprintf (stdout, intel_pt_info_fmts[i], arr[i]); +} + +int intel_pt_process_auxtrace_info (union perf_event *event, +struct perf_session *session) +{ +struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info; +size_t min_sz =sizeof (u64) *INTEL_PT_PER_CPU_MMAPS ; +struct intel_pt *pt; +int err; + +if (auxtrace_info->header.size <sizeof (struct auxtrace_info_event ) + + min_sz) +return -EINVAL ; + + pt =zalloc (sizeof (struct intel_pt )); +if (!pt) +return -ENOMEM ; + + err =auxtrace_queues__init (&pt->queues); +if (err) + goto err_free; + +intel_pt_log_set_name (INTEL_PT_PMU_NAME ); + + pt->session = session; + pt->machine = &session->machines.host;/* No kvm support */ + pt->auxtrace_type = auxtrace_info->type; + pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE ]; + pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT ]; + pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT ]; + pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO ]; + pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO ]; + pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT ]; + pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT ]; + pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH ]; + pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE ]; + pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS ]; +intel_pt_print_info (&auxtrace_info->priv[0 ],INTEL_PT_PMU_TYPE , +INTEL_PT_PER_CPU_MMAPS ); + + pt->timeless_decoding =intel_pt_timeless_decoding (pt); + pt->have_tsc =intel_pt_have_tsc (pt); + pt->sampling_mode = false; + pt->est_tsc = pt->per_cpu_mmaps && !pt->timeless_decoding; + + pt->unknown_thread =thread__new (999999999 ,999999999 ); +if (!pt->unknown_thread) { + err = -ENOMEM ; + goto err_free_queues; + } + err =thread__set_comm (pt->unknown_thread,"unknown" ,0 ); +if (err) + goto err_delete_thread; +if (thread__init_map_groups (pt->unknown_thread, pt->machine)) { + err = -ENOMEM ; + goto err_delete_thread; + } + + pt->auxtrace.process_event = intel_pt_process_event; + pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event; + pt->auxtrace.flush_events = intel_pt_flush; + pt->auxtrace.free_events = intel_pt_free_events; + pt->auxtrace.free = intel_pt_free; + session->auxtrace = &pt->auxtrace; + +if (dump_trace) +return 0 ; + +if (pt->have_sched_switch ==1 ) { + pt->switch_evsel =intel_pt_find_sched_switch (session->evlist); +if (!pt->switch_evsel) { +pr_err ("%s: missing sched_switch event\n" , __func__); + goto err_delete_thread; + } + } + +if (session->itrace_synth_opts && session->itrace_synth_opts->set) { + pt->synth_opts = *session->itrace_synth_opts; + }else { +itrace_synth_opts__set_default (&pt->synth_opts); +if (use_browser !=-1 ) { + pt->synth_opts.branches = false; + pt->synth_opts.callchain = true; + } + } + +if (pt->synth_opts.log) +intel_pt_log_enable (); + +if (pt->synth_opts.calls) + pt->branches_filter |=PERF_IP_FLAG_CALL |PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_TRACE_END ; +if (pt->synth_opts.returns) + pt->branches_filter |=PERF_IP_FLAG_RETURN | +PERF_IP_FLAG_TRACE_BEGIN ; + +if (pt->synth_opts.callchain && !symbol_conf.use_callchain) { + symbol_conf.use_callchain = true; +if (callchain_register_param (&callchain_param) <0 ) { + symbol_conf.use_callchain = false; + pt->synth_opts.callchain = false; + } + } + + err =intel_pt_synth_events (pt, session); +if (err) + goto err_delete_thread; + + err =auxtrace_queues__process_index (&pt->queues, session); +if (err) + goto err_delete_thread; + +if (pt->queues.populated) + pt->data_queued = true; + +if (pt->timeless_decoding) +pr_debug2 ("Intel PT decoding without timestamps\n" ); + +return 0 ; + +err_delete_thread: +thread__delete (pt->unknown_thread); +err_free_queues: +intel_pt_log_disable (); +auxtrace_queues__free (&pt->queues); + session->auxtrace =NULL ; +err_free: +free (pt); +return err; +}tools/perf/util/intel-pt.h new file +51
-0@@ -0,0 +1,51 @@ +/* +* intel_pt.h: Intel Processor Trace support +* Copyright (c) 2013-2015, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#ifndef INCLUDE__PERF_INTEL_PT_H__ +#define INCLUDE__PERF_INTEL_PT_H__ + +#define INTEL_PT_PMU_NAME "intel_pt" + +enum { +INTEL_PT_PMU_TYPE , +INTEL_PT_TIME_SHIFT , +INTEL_PT_TIME_MULT , +INTEL_PT_TIME_ZERO , +INTEL_PT_CAP_USER_TIME_ZERO , +INTEL_PT_TSC_BIT , +INTEL_PT_NORETCOMP_BIT , +INTEL_PT_HAVE_SCHED_SWITCH , +INTEL_PT_SNAPSHOT_MODE , +INTEL_PT_PER_CPU_MMAPS , +INTEL_PT_AUXTRACE_PRIV_MAX , +}; + +#define INTEL_PT_AUXTRACE_PRIV_SIZE (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) + +struct auxtrace_record ; +struct perf_tool ; +union perf_event ; +struct perf_session ; +struct perf_event_attr ; +struct perf_pmu ; + +struct auxtrace_record *intel_pt_recording_init (int *err); + +int intel_pt_process_auxtrace_info (union perf_event *event, +struct perf_session *session); + +struct perf_event_attr *intel_pt_pmu_default_config (struct perf_pmu *pmu); + +#endif Signature · 1 line
1.9.1
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Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Fri, Jun 19, 2015 at 01:04:51PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 10 lines
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
Quoted 7 lines
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
Trying to test something at this point:
[root@perf4 ~]# find /sys -name "*intel_pt*"/sys/bus/event_source/devices/intel_pt/sys/devices/intel_pt
[root@perf4 ~]# perf record -e intel_pt//u ls
invalid or unsupported event: 'intel_pt//u'
Run 'perf list' for a list of valid events
usage: perf record [<options>] [<command>]
or: perf record [<options>] -- <command> [<options>]
-e, --event <event> event selector. use 'perf list' to list
available events
[root@perf4 ~]# uname -a
Linux perf4 4.1.0-rc8 #1 SMP Tue Jun 16 19:47:25 EDT 2015 x86_64 x86_64 x86_64 GNU/Linux [root@perf4 ~]#
The kernel seems to have the intel_pt stuff and what I have in the tooling side is at my tmp.perf/pt branch, will continue after lunch.
- Arnaldo
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Adrian Hunter
reviewerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
In reply to Arnaldo Carvalho de MeloQuoted 10 lines · Arnaldo Carvalho de Melo
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
Quoted 7 lines
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
Actually you need the next patch "perf tools: Take Intel PT into use" to do anything.
Quoted 2,741 lines
- Arnaldo
Quoted 2,738 lines
Signed-off-by Adrian Hunter <[email protected]>--- tools/perf/arch/x86/util/Build | 2 + tools/perf/arch/x86/util/intel-pt.c | 752 ++++++++++++++ tools/perf/util/Build | 1 + tools/perf/util/intel-pt.c | 1889 +++++++++++++++++++++++++++++++++++ tools/perf/util/intel-pt.h | 51 + 5 files changed, 2695 insertions(+)create mode 100644
tools/perf/arch/x86/util/intel-pt.ccreate mode 100644tools/perf/util/intel-pt.ccreate mode 100644tools/perf/util/intel-pt.htools/perf/arch/x86/util/Build +2
-0@@ -6,3 +6,5 @@ libperf-$(CONFIG_DWARF) += dwarf-regs.o libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o + +libperf-$(CONFIG_AUXTRACE) += intel-pt.otools/perf/arch/x86/util/intel-pt.c new file +752
-0@@ -0,0 +1,752 @@ +/* +* intel_pt.c: Intel Processor Trace support +* Copyright (c) 2013-2015, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#include <stdbool.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/bitops.h> +#include <linux/log2.h> + +#include "../../perf.h" +#include "../../util/session.h" +#include "../../util/event.h" +#include "../../util/evlist.h" +#include "../../util/evsel.h" +#include "../../util/cpumap.h" +#include "../../util/parse-options.h" +#include "../../util/parse-events.h" +#include "../../util/pmu.h" +#include "../../util/debug.h" +#include "../../util/auxtrace.h" +#include "../../util/tsc.h" +#include "../../util/intel-pt.h" + +#define KiB (x) ((x) * 1024) +#define MiB (x) ((x) * 1024 * 1024) +#define KiB_MASK (x) (KiB(x) - 1) +#define MiB_MASK (x) (MiB(x) - 1) + +#define INTEL_PT_DEFAULT_SAMPLE_SIZE KiB(4) + +#define INTEL_PT_MAX_SAMPLE_SIZE KiB(60) + +#define INTEL_PT_PSB_PERIOD_NEAR 256 + +struct intel_pt_snapshot_ref { +void *ref_buf; +size_t ref_offset; +bool wrapped; +}; + +struct intel_pt_recording { +struct auxtrace_record itr; +struct perf_pmu *intel_pt_pmu; +int have_sched_switch; +struct perf_evlist *evlist; +bool snapshot_mode; +bool snapshot_init_done; +size_t snapshot_size; +size_t snapshot_ref_buf_size; +int snapshot_ref_cnt; +struct intel_pt_snapshot_ref *snapshot_refs; +}; + +static int intel_pt_parse_terms_with_default (struct list_head *formats, +const char *str, +u64 *config) +{ +struct list_head *terms; +struct perf_event_attr attr = { .size =0 , }; +int err; + + terms =malloc (sizeof (struct list_head )); +if (!terms) +return -ENOMEM ; + +INIT_LIST_HEAD (terms); + + err =parse_events_terms (terms, str); +if (err) + goto out_free; + + attr.config = *config; + err =perf_pmu__config_terms (formats, &attr, terms, true,NULL ); +if (err) + goto out_free; + + *config = attr.config; +out_free: +parse_events__free_terms (terms); +return err; +} + +static int intel_pt_parse_terms (struct list_head *formats,const char *str, +u64 *config) +{ + *config =0 ; +return intel_pt_parse_terms_with_default (formats, str, config); +} + +static size_t intel_pt_psb_period (struct perf_pmu *intel_pt_pmu__maybe_unused , +struct perf_evlist *evlist__maybe_unused ) +{ +return 256 ; +} + +static u64 intel_pt_default_config (struct perf_pmu *intel_pt_pmu) +{ +u64 config; + +intel_pt_parse_terms (&intel_pt_pmu->format,"tsc" , &config); +return config; +} + +static int intel_pt_parse_snapshot_options (struct auxtrace_record *itr, +struct record_opts *opts, +const char *str) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +unsigned long long snapshot_size =0 ; +char *endptr; + +if (str) { + snapshot_size =strtoull (str, &endptr,0 ); +if (*endptr || snapshot_size >SIZE_MAX ) +return -1 ; + } + + opts->auxtrace_snapshot_mode = true; + opts->auxtrace_snapshot_size = snapshot_size; + + ptr->snapshot_size = snapshot_size; + +return 0 ; +} + +struct perf_event_attr * +intel_pt_pmu_default_config (struct perf_pmu *intel_pt_pmu) +{ +struct perf_event_attr *attr; + + attr =zalloc (sizeof (struct perf_event_attr )); +if (!attr) +return NULL ; + + attr->config =intel_pt_default_config (intel_pt_pmu); + + intel_pt_pmu->selectable = true; + +return attr; +} + +static size_t intel_pt_info_priv_size (struct auxtrace_record *itr__maybe_unused ) +{ +return INTEL_PT_AUXTRACE_PRIV_SIZE ; +} + +static int intel_pt_info_fill (struct auxtrace_record *itr, +struct perf_session *session, +struct auxtrace_info_event *auxtrace_info, +size_t priv_size) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; +struct perf_event_mmap_page *pc; +struct perf_tsc_conversion tc = { .time_mult =0 , }; +bool cap_user_time_zero = false, per_cpu_mmaps; +u64 tsc_bit, noretcomp_bit; +int err; + +if (priv_size !=INTEL_PT_AUXTRACE_PRIV_SIZE ) +return -EINVAL ; + +intel_pt_parse_terms (&intel_pt_pmu->format,"tsc" , &tsc_bit); +intel_pt_parse_terms (&intel_pt_pmu->format,"noretcomp" , + &noretcomp_bit); + +if (!session->evlist->nr_mmaps) +return -EINVAL ; + + pc = session->evlist->mmap[0 ].base; +if (pc) { + err =perf_read_tsc_conversion (pc, &tc); +if (err) { +if (err != -EOPNOTSUPP ) +return err; + }else { + cap_user_time_zero = tc.time_mult !=0 ; + } +if (!cap_user_time_zero) +ui__warning ("Intel Processor Trace: TSC not available\n" ); + } + + per_cpu_mmaps = !cpu_map__empty (session->evlist->cpus); + + auxtrace_info->type =PERF_AUXTRACE_INTEL_PT ; + auxtrace_info->priv[INTEL_PT_PMU_TYPE ] = intel_pt_pmu->type; + auxtrace_info->priv[INTEL_PT_TIME_SHIFT ] = tc.time_shift; + auxtrace_info->priv[INTEL_PT_TIME_MULT ] = tc.time_mult; + auxtrace_info->priv[INTEL_PT_TIME_ZERO ] = tc.time_zero; + auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO ] = cap_user_time_zero; + auxtrace_info->priv[INTEL_PT_TSC_BIT ] = tsc_bit; + auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT ] = noretcomp_bit; + auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH ] = ptr->have_sched_switch; + auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE ] = ptr->snapshot_mode; + auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS ] = per_cpu_mmaps; + +return 0 ; +} + +static int intel_pt_track_switches (struct perf_evlist *evlist) +{ +const char *sched_switch ="sched:sched_switch" ; +struct perf_evsel *evsel; +int err; + +if (!perf_evlist__can_select_event (evlist, sched_switch)) +return -EPERM ; + + err =parse_events (evlist, sched_switch,NULL ); +if (err) { +pr_debug2 ("%s: failed to parse %s, error %d\n" , + __func__, sched_switch, err); +return err; + } + + evsel =perf_evlist__last (evlist); + +perf_evsel__set_sample_bit (evsel,CPU ); +perf_evsel__set_sample_bit (evsel,TIME ); + + evsel->system_wide = true; + evsel->no_aux_samples = true; + evsel->immediate = true; + +return 0 ; +} + +static int intel_pt_recording_options (struct auxtrace_record *itr, +struct perf_evlist *evlist, +struct record_opts *opts) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; +bool have_timing_info; +struct perf_evsel *evsel, *intel_pt_evsel =NULL ; +const struct cpu_map *cpus = evlist->cpus; +bool privileged =geteuid () ==0 ||perf_event_paranoid () <0 ; +u64 tsc_bit; + + ptr->evlist = evlist; + ptr->snapshot_mode = opts->auxtrace_snapshot_mode; + +evlist__for_each (evlist, evsel) { +if (evsel->attr.type == intel_pt_pmu->type) { +if (intel_pt_evsel) { +pr_err ("There may be only one " INTEL_PT_PMU_NAME " event\n" ); +return -EINVAL ; + } + evsel->attr.freq =0 ; + evsel->attr.sample_period =1 ; + intel_pt_evsel = evsel; + opts->full_auxtrace = true; + } + } + +if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) { +pr_err ("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n" ); +return -EINVAL ; + } + +if (opts->use_clockid) { +pr_err ("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n" ); +return -EINVAL ; + } + +if (!opts->full_auxtrace) +return 0 ; + +/* Set default sizes for snapshot mode */ +if (opts->auxtrace_snapshot_mode) { +size_t psb_period =intel_pt_psb_period (intel_pt_pmu, evlist); + +if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) { +if (privileged) { + opts->auxtrace_mmap_pages =MiB (4 ) / page_size; + }else { + opts->auxtrace_mmap_pages =KiB (128 ) / page_size; +if (opts->mmap_pages ==UINT_MAX ) + opts->mmap_pages =KiB (256 ) / page_size; + } + }else if (!opts->auxtrace_mmap_pages && !privileged && + opts->mmap_pages ==UINT_MAX ) { + opts->mmap_pages =KiB (256 ) / page_size; + } +if (!opts->auxtrace_snapshot_size) + opts->auxtrace_snapshot_size = + opts->auxtrace_mmap_pages * (size_t )page_size; +if (!opts->auxtrace_mmap_pages) { +size_t sz = opts->auxtrace_snapshot_size; + + sz =round_up (sz, page_size) / page_size; + opts->auxtrace_mmap_pages =roundup_pow_of_two (sz); + } +if (opts->auxtrace_snapshot_size > + opts->auxtrace_mmap_pages * (size_t )page_size) { +pr_err ("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n" , + opts->auxtrace_snapshot_size, + opts->auxtrace_mmap_pages * (size_t )page_size); +return -EINVAL ; + } +if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) { +pr_err ("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n" ); +return -EINVAL ; + } +pr_debug2 ("Intel PT snapshot size: %zu\n" , + opts->auxtrace_snapshot_size); +if (psb_period && + opts->auxtrace_snapshot_size <= psb_period + +INTEL_PT_PSB_PERIOD_NEAR ) +ui__warning ("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n" , + opts->auxtrace_snapshot_size, psb_period); + } + +/* Set default sizes for full trace mode */ +if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) { +if (privileged) { + opts->auxtrace_mmap_pages =MiB (4 ) / page_size; + }else { + opts->auxtrace_mmap_pages =KiB (128 ) / page_size; +if (opts->mmap_pages ==UINT_MAX ) + opts->mmap_pages =KiB (256 ) / page_size; + } + } + +/* Validate auxtrace_mmap_pages */ +if (opts->auxtrace_mmap_pages) { +size_t sz = opts->auxtrace_mmap_pages * (size_t )page_size; +size_t min_sz; + +if (opts->auxtrace_snapshot_mode) + min_sz =KiB (4 ); +else + min_sz =KiB (8 ); + +if (sz < min_sz || !is_power_of_2 (sz)) { +pr_err ("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n" , + min_sz /1024 ); +return -EINVAL ; + } + } + +intel_pt_parse_terms (&intel_pt_pmu->format,"tsc" , &tsc_bit); + +if (opts->full_auxtrace && (intel_pt_evsel->attr.config & tsc_bit)) + have_timing_info = true; +else + have_timing_info = false; + +/* +* Per-cpu recording needs sched_switch events to distinguish different +* threads. +*/ +if (have_timing_info && !cpu_map__empty (cpus)) { +int err; + + err =intel_pt_track_switches (evlist); +if (err == -EPERM ) +pr_debug2 ("Unable to select sched:sched_switch\n" ); +else if (err) +return err; +else + ptr->have_sched_switch =1 ; + } + +if (intel_pt_evsel) { +/* +* To obtain the auxtrace buffer file descriptor, the auxtrace +* event must come first. +*/ +perf_evlist__to_front (evlist, intel_pt_evsel); +/* +* In the case of per-cpu mmaps, we need the CPU on the +* AUX event. +*/ +if (!cpu_map__empty (cpus)) +perf_evsel__set_sample_bit (intel_pt_evsel,CPU ); + } + +/* Add dummy event to keep tracking */ +if (opts->full_auxtrace) { +struct perf_evsel *tracking_evsel; +int err; + + err =parse_events (evlist,"dummy:u" ,NULL ); +if (err) +return err; + + tracking_evsel =perf_evlist__last (evlist); + +perf_evlist__set_tracking_event (evlist, tracking_evsel); + + tracking_evsel->attr.freq =0 ; + tracking_evsel->attr.sample_period =1 ; + +/* In per-cpu case, always need the time of mmap events etc */ +if (!cpu_map__empty (cpus)) +perf_evsel__set_sample_bit (tracking_evsel,TIME ); + } + +/* +* Warn the user when we do not have enough information to decode i.e. +* per-cpu with no sched_switch (except workload-only). +*/ +if (!ptr->have_sched_switch && !cpu_map__empty (cpus) && + !target__none (&opts->target)) +ui__warning ("Intel Processor Trace decoding will not be possible except for kernel tracing!\n" ); + +return 0 ; +} + +static int intel_pt_snapshot_start (struct auxtrace_record *itr) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_evsel *evsel; + +evlist__for_each (ptr->evlist, evsel) { +if (evsel->attr.type == ptr->intel_pt_pmu->type) +return perf_evlist__disable_event (ptr->evlist, evsel); + } +return -EINVAL ; +} + +static int intel_pt_snapshot_finish (struct auxtrace_record *itr) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_evsel *evsel; + +evlist__for_each (ptr->evlist, evsel) { +if (evsel->attr.type == ptr->intel_pt_pmu->type) +return perf_evlist__enable_event (ptr->evlist, evsel); + } +return -EINVAL ; +} + +static int intel_pt_alloc_snapshot_refs (struct intel_pt_recording *ptr,int idx) +{ +const size_t sz =sizeof (struct intel_pt_snapshot_ref ); +int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt *2 ; +struct intel_pt_snapshot_ref *refs; + +if (!new_cnt) + new_cnt =16 ; + +while (new_cnt <= idx) + new_cnt *=2 ; + + refs =calloc (new_cnt, sz); +if (!refs) +return -ENOMEM ; + +memcpy (refs, ptr->snapshot_refs, cnt * sz); + + ptr->snapshot_refs = refs; + ptr->snapshot_ref_cnt = new_cnt; + +return 0 ; +} + +static void intel_pt_free_snapshot_refs (struct intel_pt_recording *ptr) +{ +int i; + +for (i =0 ; i < ptr->snapshot_ref_cnt; i++) +zfree (&ptr->snapshot_refs[i].ref_buf); +zfree (&ptr->snapshot_refs); +} + +static void intel_pt_recording_free (struct auxtrace_record *itr) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); + +intel_pt_free_snapshot_refs (ptr); +free (ptr); +} + +static int intel_pt_alloc_snapshot_ref (struct intel_pt_recording *ptr,int idx, +size_t snapshot_buf_size) +{ +size_t ref_buf_size = ptr->snapshot_ref_buf_size; +void *ref_buf; + + ref_buf =zalloc (ref_buf_size); +if (!ref_buf) +return -ENOMEM ; + + ptr->snapshot_refs[idx].ref_buf = ref_buf; + ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size; + +return 0 ; +} + +static size_t intel_pt_snapshot_ref_buf_size (struct intel_pt_recording *ptr, +size_t snapshot_buf_size) +{ +const size_t max_size =256 *1024 ; +size_t buf_size =0 , psb_period; + +if (ptr->snapshot_size <=64 *1024 ) +return 0 ; + + psb_period =intel_pt_psb_period (ptr->intel_pt_pmu, ptr->evlist); +if (psb_period) + buf_size = psb_period *2 ; + +if (!buf_size || buf_size > max_size) + buf_size = max_size; + +if (buf_size >= snapshot_buf_size) +return 0 ; + +if (buf_size >= ptr->snapshot_size /2 ) +return 0 ; + +return buf_size; +} + +static int intel_pt_snapshot_init (struct intel_pt_recording *ptr, +size_t snapshot_buf_size) +{ +if (ptr->snapshot_init_done) +return 0 ; + + ptr->snapshot_init_done = true; + + ptr->snapshot_ref_buf_size =intel_pt_snapshot_ref_buf_size (ptr, + snapshot_buf_size); + +return 0 ; +} + +/** +* intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer. +* @buf1: first buffer +* @compare_size: number of bytes to compare +* @buf2: second buffer (a circular buffer) +* @offs2: offset in second buffer +* @buf2_size: size of second buffer +* +* The comparison allows for the possibility that the bytes to compare in the +* circular buffer are not contiguous. It is assumed that @compare_size <= +* @buf2_size. This function returns %false if the bytes are identical, %true +* otherwise. +*/ +static bool intel_pt_compare_buffers (void *buf1,size_t compare_size, +void *buf2,size_t offs2,size_t buf2_size) +{ +size_t end2 = offs2 + compare_size, part_size; + +if (end2 <= buf2_size) +return memcmp (buf1, buf2 + offs2, compare_size); + + part_size = end2 - buf2_size; +if (memcmp (buf1, buf2 + offs2, part_size)) +return true; + + compare_size -= part_size; + +return memcmp (buf1 + part_size, buf2, compare_size); +} + +static bool intel_pt_compare_ref (void *ref_buf,size_t ref_offset, +size_t ref_size,size_t buf_size, +void *data,size_t head) +{ +size_t ref_end = ref_offset + ref_size; + +if (ref_end > buf_size) { +if (head > ref_offset || head < ref_end - buf_size) +return true; + }else if (head > ref_offset && head < ref_end) { +return true; + } + +return intel_pt_compare_buffers (ref_buf, ref_size, data, ref_offset, + buf_size); +} + +static void intel_pt_copy_ref (void *ref_buf,size_t ref_size,size_t buf_size, +void *data,size_t head) +{ +if (head >= ref_size) { +memcpy (ref_buf, data + head - ref_size, ref_size); + }else { +memcpy (ref_buf, data, head); + ref_size -= head; +memcpy (ref_buf + head, data + buf_size - ref_size, ref_size); + } +} + +static bool intel_pt_wrapped (struct intel_pt_recording *ptr,int idx, +struct auxtrace_mmap *mm,unsigned char *data, +u64 head) +{ +struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx]; +bool wrapped; + + wrapped =intel_pt_compare_ref (ref->ref_buf, ref->ref_offset, + ptr->snapshot_ref_buf_size, mm->len, + data, head); + +intel_pt_copy_ref (ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len, + data, head); + +return wrapped; +} + +static bool intel_pt_first_wrap (u64 *data,size_t buf_size) +{ +int i, a, b; + + b = buf_size >>3 ; + a = b -512 ; +if (a <0 ) + a =0 ; + +for (i = a; i < b; i++) { +if (data[i]) +return true; + } + +return false; +} + +static int intel_pt_find_snapshot (struct auxtrace_record *itr,int idx, +struct auxtrace_mmap *mm,unsigned char *data, +u64 *head,u64 *old) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +bool wrapped; +int err; + +pr_debug3 ("%s: mmap index %d old head %zu new head %zu\n" , + __func__, idx, (size_t )*old, (size_t )*head); + + err =intel_pt_snapshot_init (ptr, mm->len); +if (err) + goto out_err; + +if (idx >= ptr->snapshot_ref_cnt) { + err =intel_pt_alloc_snapshot_refs (ptr, idx); +if (err) + goto out_err; + } + +if (ptr->snapshot_ref_buf_size) { +if (!ptr->snapshot_refs[idx].ref_buf) { + err =intel_pt_alloc_snapshot_ref (ptr, idx, mm->len); +if (err) + goto out_err; + } + wrapped =intel_pt_wrapped (ptr, idx, mm, data, *head); + }else { + wrapped = ptr->snapshot_refs[idx].wrapped; +if (!wrapped &&intel_pt_first_wrap ((u64 *)data, mm->len)) { + ptr->snapshot_refs[idx].wrapped = true; + wrapped = true; + } + } + +/* +* In full trace mode 'head' continually increases. However in snapshot +* mode 'head' is an offset within the buffer. Here 'old' and 'head' +* are adjusted to match the full trace case which expects that 'old' is +* always less than 'head'. +*/ +if (wrapped) { + *old = *head; + *head += mm->len; + }else { +if (mm->mask) + *old &= mm->mask; +else + *old %= mm->len; +if (*old > *head) + *head += mm->len; + } + +pr_debug3 ("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n" , + __func__, wrapped ?"" :"not " , (size_t )*old, (size_t )*head); + +return 0 ; + +out_err: +pr_err ("%s: failed, error %d\n" , __func__, err); +return err; +} + +static u64 intel_pt_reference (struct auxtrace_record *itr__maybe_unused ) +{ +return rdtsc (); +} + +static int intel_pt_read_finish (struct auxtrace_record *itr,int idx) +{ +struct intel_pt_recording *ptr = + container_of(itr, struct intel_pt_recording, itr); +struct perf_evsel *evsel; + +evlist__for_each (ptr->evlist, evsel) { +if (evsel->attr.type == ptr->intel_pt_pmu->type) +return perf_evlist__enable_event_idx (ptr->evlist, evsel, + idx); + } +return -EINVAL ; +} + +struct auxtrace_record *intel_pt_recording_init (int *err) +{ +struct perf_pmu *intel_pt_pmu =perf_pmu__find (INTEL_PT_PMU_NAME ); +struct intel_pt_recording *ptr; + +if (!intel_pt_pmu) +return NULL ; + + ptr =zalloc (sizeof (struct intel_pt_recording )); +if (!ptr) { + *err = -ENOMEM ; +return NULL ; + } + + ptr->intel_pt_pmu = intel_pt_pmu; + ptr->itr.recording_options = intel_pt_recording_options; + ptr->itr.info_priv_size = intel_pt_info_priv_size; + ptr->itr.info_fill = intel_pt_info_fill; + ptr->itr.free = intel_pt_recording_free; + ptr->itr.snapshot_start = intel_pt_snapshot_start; + ptr->itr.snapshot_finish = intel_pt_snapshot_finish; + ptr->itr.find_snapshot = intel_pt_find_snapshot; + ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options; + ptr->itr.reference = intel_pt_reference; + ptr->itr.read_finish = intel_pt_read_finish; +return &ptr->itr; +}tools/perf/util/Build +1
-0@@ -76,6 +76,7 @@ libperf-y += cloexec.o libperf-y += thread-stack.o libperf-$(CONFIG_AUXTRACE) += auxtrace.o libperf-$(CONFIG_AUXTRACE) += intel-pt-decoder/ +libperf-$(CONFIG_AUXTRACE) += intel-pt.o libperf-y += parse-branch-options.o libperf-$(CONFIG_LIBELF) += symbol-elf.otools/perf/util/intel-pt.c new file +1889
-0@@ -0,0 +1,1889 @@ +/* +* intel_pt.c: Intel Processor Trace support +* Copyright (c) 2013-2015, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#include <stdio.h> +#include <stdbool.h> +#include <errno.h> +#include <linux/kernel.h> +#include <linux/types.h> + +#include "../perf.h" +#include "session.h" +#include "machine.h" +#include "tool.h" +#include "event.h" +#include "evlist.h" +#include "evsel.h" +#include "map.h" +#include "color.h" +#include "util.h" +#include "thread.h" +#include "thread-stack.h" +#include "symbol.h" +#include "callchain.h" +#include "dso.h" +#include "debug.h" +#include "auxtrace.h" +#include "tsc.h" +#include "intel-pt.h" + +#include "intel-pt-decoder/intel-pt-log.h" +#include "intel-pt-decoder/intel-pt-decoder.h" +#include "intel-pt-decoder/intel-pt-insn-decoder.h" +#include "intel-pt-decoder/intel-pt-pkt-decoder.h" + +#define MAX_TIMESTAMP (~0ULL) + +struct intel_pt { +struct auxtrace auxtrace; +struct auxtrace_queues queues; +struct auxtrace_heap heap; +u32 auxtrace_type; +struct perf_session *session; +struct machine *machine; +struct perf_evsel *switch_evsel; +struct thread *unknown_thread; +bool timeless_decoding; +bool sampling_mode; +bool snapshot_mode; +bool per_cpu_mmaps; +bool have_tsc; +bool data_queued; +bool est_tsc; +bool sync_switch; +bool est_tsc_orig; +int have_sched_switch; +u32 pmu_type; +u64 kernel_start; +u64 switch_ip; +u64 ptss_ip; + +struct perf_tsc_conversion tc; +bool cap_user_time_zero; + +struct itrace_synth_opts synth_opts; + +bool sample_instructions; +u64 instructions_sample_type; +u64 instructions_sample_period; +u64 instructions_id; + +bool sample_branches; +u32 branches_filter; +u64 branches_sample_type; +u64 branches_id; + +bool sample_transactions; +u64 transactions_sample_type; +u64 transactions_id; + +bool synth_needs_swap; + +u64 tsc_bit; +u64 noretcomp_bit; +}; + +enum switch_state { +INTEL_PT_SS_NOT_TRACING , +INTEL_PT_SS_UNKNOWN , +INTEL_PT_SS_TRACING , +INTEL_PT_SS_EXPECTING_SWITCH_EVENT , +INTEL_PT_SS_EXPECTING_SWITCH_IP , +}; + +struct intel_pt_queue { +struct intel_pt *pt; +unsigned int queue_nr; +struct auxtrace_buffer *buffer; +void *decoder; +const struct intel_pt_state *state; +struct ip_callchain *chain; +union perf_event *event_buf; +bool on_heap; +bool stop; +bool step_through_buffers; +bool use_buffer_pid_tid; +pid_t pid, tid; +int cpu; +int switch_state; +pid_t next_tid; +struct thread *thread; +bool exclude_kernel; +bool have_sample; +u64 time; +u64 timestamp; +u32 flags; +u16 insn_len; +}; + +static void intel_pt_dump (struct intel_pt *pt__maybe_unused , +unsigned char *buf,size_t len) +{ +struct intel_pt_pkt packet; +size_t pos =0 ; +int ret, pkt_len, i; +char desc[INTEL_PT_PKT_DESC_MAX ]; +const char *color =PERF_COLOR_BLUE ; + +color_fprintf (stdout, color, +". ... Intel Processor Trace data: size %zu bytes\n" , + len); + +while (len) { + ret =intel_pt_get_packet (buf, len, &packet); +if (ret >0 ) + pkt_len = ret; +else + pkt_len =1 ; +printf ("." ); +color_fprintf (stdout, color," %08x: " , pos); +for (i =0 ; i < pkt_len; i++) +color_fprintf (stdout, color," %02x" , buf[i]); +for (; i <16 ; i++) +color_fprintf (stdout, color," " ); +if (ret >0 ) { + ret =intel_pt_pkt_desc (&packet, desc, +INTEL_PT_PKT_DESC_MAX ); +if (ret >0 ) +color_fprintf (stdout, color," %s\n" , desc); + }else { +color_fprintf (stdout, color," Bad packet!\n" ); + } + pos += pkt_len; + buf += pkt_len; + len -= pkt_len; + } +} + +static void intel_pt_dump_event (struct intel_pt *pt,unsigned char *buf, +size_t len) +{ +printf (".\n" ); +intel_pt_dump (pt, buf, len); +} + +static int intel_pt_do_fix_overlap (struct intel_pt *pt,struct auxtrace_buffer *a, +struct auxtrace_buffer *b) +{ +void *start; + + start =intel_pt_find_overlap (a->data, a->size, b->data, b->size, + pt->have_tsc); +if (!start) +return -EINVAL ; + b->use_size = b->data + b->size - start; + b->use_data = start; +return 0 ; +} + +static void intel_pt_use_buffer_pid_tid (struct intel_pt_queue *ptq, +struct auxtrace_queue *queue, +struct auxtrace_buffer *buffer) +{ +if (queue->cpu ==-1 && buffer->cpu !=-1 ) + ptq->cpu = buffer->cpu; + + ptq->pid = buffer->pid; + ptq->tid = buffer->tid; + +intel_pt_log ("queue %u cpu %d pid %d tid %d\n" , + ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid); + + ptq->thread =NULL ; + +if (ptq->tid !=-1 ) { +if (ptq->pid !=-1 ) + ptq->thread =machine__findnew_thread (ptq->pt->machine, + ptq->pid, + ptq->tid); +else + ptq->thread =machine__find_thread (ptq->pt->machine,-1 , + ptq->tid); + } +} + +/* This function assumes data is processed sequentially only */ +static int intel_pt_get_trace (struct intel_pt_buffer *b,void *data) +{ +struct intel_pt_queue *ptq = data; +struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer; +struct auxtrace_queue *queue; + +if (ptq->stop) { + b->len =0 ; +return 0 ; + } + + queue = &ptq->pt->queues.queue_array[ptq->queue_nr]; + + buffer =auxtrace_buffer__next (queue, buffer); +if (!buffer) { +if (old_buffer) +auxtrace_buffer__drop_data (old_buffer); + b->len =0 ; +return 0 ; + } + + ptq->buffer = buffer; + +if (!buffer->data) { +int fd =perf_data_file__fd (ptq->pt->session->file); + + buffer->data =auxtrace_buffer__get_data (buffer, fd); +if (!buffer->data) +return -ENOMEM ; + } + +if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer && +intel_pt_do_fix_overlap (ptq->pt, old_buffer, buffer)) +return -ENOMEM ; + +if (old_buffer) +auxtrace_buffer__drop_data (old_buffer); + +if (buffer->use_data) { + b->len = buffer->use_size; + b->buf = buffer->use_data; + }else { + b->len = buffer->size; + b->buf = buffer->data; + } + b->ref_timestamp = buffer->reference; + +if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode && + !buffer->consecutive)) { + b->consecutive = false; + b->trace_nr = buffer->buffer_nr; + }else { + b->consecutive = true; + } + +if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid || + ptq->tid != buffer->tid)) +intel_pt_use_buffer_pid_tid (ptq, queue, buffer); + +if (ptq->step_through_buffers) + ptq->stop = true; + +if (!b->len) +return intel_pt_get_trace (b, data); + +return 0 ; +} + +struct intel_pt_cache_entry { +struct auxtrace_cache_entry entry; +u64 insn_cnt; +u64 byte_cnt; +enum intel_pt_insn_op op; +enum intel_pt_insn_branch branch; +int length; +int32_t rel; +}; + +static int intel_pt_config_div (const char *var,const char *value,void *data) +{ +int *d = data; +long val; + +if (!strcmp (var,"intel-pt.cache-divisor" )) { + val =strtol (value,NULL ,0 ); +if (val >0 && val <=INT_MAX ) + *d = val; + } + +return 0 ; +} + +static int intel_pt_cache_divisor (void ) +{ +static int d; + +if (d) +return d; + +perf_config (intel_pt_config_div, &d); + +if (!d) + d =64 ; + +return d; +} + +static unsigned int intel_pt_cache_size (struct dso *dso, +struct machine *machine) +{ +off_t size; + + size =dso__data_size (dso, machine); + size /=intel_pt_cache_divisor (); +if (size <1000 ) +return 10 ; +if (size > (1 <<21 )) +return 21 ; +return 32 -__builtin_clz (size); +} + +static struct auxtrace_cache *intel_pt_cache (struct dso *dso, +struct machine *machine) +{ +struct auxtrace_cache *c; +unsigned int bits; + +if (dso->auxtrace_cache) +return dso->auxtrace_cache; + + bits =intel_pt_cache_size (dso, machine); + +/* Ignoring cache creation failure */ + c =auxtrace_cache__new (bits,sizeof (struct intel_pt_cache_entry ),200 ); + + dso->auxtrace_cache = c; + +return c; +} + +static int intel_pt_cache_add (struct dso *dso,struct machine *machine, +u64 offset,u64 insn_cnt,u64 byte_cnt, +struct intel_pt_insn *intel_pt_insn) +{ +struct auxtrace_cache *c =intel_pt_cache (dso, machine); +struct intel_pt_cache_entry *e; +int err; + +if (!c) +return -ENOMEM ; + + e =auxtrace_cache__alloc_entry (c); +if (!e) +return -ENOMEM ; + + e->insn_cnt = insn_cnt; + e->byte_cnt = byte_cnt; + e->op = intel_pt_insn->op; + e->branch = intel_pt_insn->branch; + e->length = intel_pt_insn->length; + e->rel = intel_pt_insn->rel; + + err =auxtrace_cache__add (c, offset, &e->entry); +if (err) +auxtrace_cache__free_entry (c, e); + +return err; +} + +static struct intel_pt_cache_entry * +intel_pt_cache_lookup (struct dso *dso,struct machine *machine,u64 offset) +{ +struct auxtrace_cache *c =intel_pt_cache (dso, machine); + +if (!c) +return NULL ; + +return auxtrace_cache__lookup (dso->auxtrace_cache, offset); +} + +static int intel_pt_walk_next_insn (struct intel_pt_insn *intel_pt_insn, +uint64_t *insn_cnt_ptr,uint64_t *ip, +uint64_t to_ip,uint64_t max_insn_cnt, +void *data) +{ +struct intel_pt_queue *ptq = data; +struct machine *machine = ptq->pt->machine; +struct thread *thread; +struct addr_location al; +unsigned char buf[1024 ]; +size_t bufsz; +ssize_t len; +int x86_64; +u8 cpumode; +u64 offset, start_offset, start_ip; +u64 insn_cnt =0 ; +bool one_map = true; + +if (to_ip && *ip == to_ip) + goto out_no_cache; + + bufsz =intel_pt_insn_max_size (); + +if (*ip >= ptq->pt->kernel_start) + cpumode =PERF_RECORD_MISC_KERNEL ; +else + cpumode =PERF_RECORD_MISC_USER ; + + thread = ptq->thread; +if (!thread) { +if (cpumode !=PERF_RECORD_MISC_KERNEL ) +return -EINVAL ; + thread = ptq->pt->unknown_thread; + } + +while (1 ) { +thread__find_addr_map (thread, cpumode,MAP__FUNCTION , *ip, &al); +if (!al.map || !al.map->dso) +return -EINVAL ; + +if (al.map->dso->data.status ==DSO_DATA_STATUS_ERROR && +dso__data_status_seen (al.map->dso, +DSO_DATA_STATUS_SEEN_ITRACE )) +return -ENOENT ; + + offset = al.map->map_ip (al.map, *ip); + +if (!to_ip && one_map) { +struct intel_pt_cache_entry *e; + + e =intel_pt_cache_lookup (al.map->dso, machine, offset); +if (e && + (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) { + *insn_cnt_ptr = e->insn_cnt; + *ip += e->byte_cnt; + intel_pt_insn->op = e->op; + intel_pt_insn->branch = e->branch; + intel_pt_insn->length = e->length; + intel_pt_insn->rel = e->rel; +intel_pt_log_insn_no_data (intel_pt_insn, *ip); +return 0 ; + } + } + + start_offset = offset; + start_ip = *ip; + +/* Load maps to ensure dso->is_64_bit has been updated */ +map__load (al.map, machine->symbol_filter); + + x86_64 = al.map->dso->is_64_bit; + +while (1 ) { + len =dso__data_read_offset (al.map->dso, machine, + offset, buf, bufsz); +if (len <=0 ) +return -EINVAL ; + +if (intel_pt_get_insn (buf, len, x86_64, intel_pt_insn)) +return -EINVAL ; + +intel_pt_log_insn (intel_pt_insn, *ip); + + insn_cnt +=1 ; + +if (intel_pt_insn->branch !=INTEL_PT_BR_NO_BRANCH ) + goto out; + +if (max_insn_cnt && insn_cnt >= max_insn_cnt) + goto out_no_cache; + + *ip += intel_pt_insn->length; + +if (to_ip && *ip == to_ip) + goto out_no_cache; + +if (*ip >= al.map->end) +break ; + + offset += intel_pt_insn->length; + } + one_map = false; + } +out: + *insn_cnt_ptr = insn_cnt; + +if (!one_map) + goto out_no_cache; + +/* +* Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate +* entries. +*/ +if (to_ip) { +struct intel_pt_cache_entry *e; + + e =intel_pt_cache_lookup (al.map->dso, machine, start_offset); +if (e) +return 0 ; + } + +/* Ignore cache errors */ +intel_pt_cache_add (al.map->dso, machine, start_offset, insn_cnt, + *ip - start_ip, intel_pt_insn); + +return 0 ; + +out_no_cache: + *insn_cnt_ptr = insn_cnt; +return 0 ; +} + +static bool intel_pt_get_config (struct intel_pt *pt, +struct perf_event_attr *attr,u64 *config) +{ +if (attr->type == pt->pmu_type) { +if (config) + *config = attr->config; +return true; + } + +return false; +} + +static bool intel_pt_exclude_kernel (struct intel_pt *pt) +{ +struct perf_evsel *evsel; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr,NULL ) && + !evsel->attr.exclude_kernel) +return false; + } +return true; +} + +static bool intel_pt_return_compression (struct intel_pt *pt) +{ +struct perf_evsel *evsel; +u64 config; + +if (!pt->noretcomp_bit) +return true; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr, &config) && + (config & pt->noretcomp_bit)) +return false; + } +return true; +} + +static bool intel_pt_timeless_decoding (struct intel_pt *pt) +{ +struct perf_evsel *evsel; +bool timeless_decoding = true; +u64 config; + +if (!pt->tsc_bit || !pt->cap_user_time_zero) +return true; + +evlist__for_each (pt->session->evlist, evsel) { +if (!(evsel->attr.sample_type &PERF_SAMPLE_TIME )) +return true; +if (intel_pt_get_config (pt, &evsel->attr, &config)) { +if (config & pt->tsc_bit) + timeless_decoding = false; +else +return true; + } + } +return timeless_decoding; +} + +static bool intel_pt_tracing_kernel (struct intel_pt *pt) +{ +struct perf_evsel *evsel; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr,NULL ) && + !evsel->attr.exclude_kernel) +return true; + } +return false; +} + +static bool intel_pt_have_tsc (struct intel_pt *pt) +{ +struct perf_evsel *evsel; +bool have_tsc = false; +u64 config; + +if (!pt->tsc_bit) +return false; + +evlist__for_each (pt->session->evlist, evsel) { +if (intel_pt_get_config (pt, &evsel->attr, &config)) { +if (config & pt->tsc_bit) + have_tsc = true; +else +return false; + } + } +return have_tsc; +} + +static u64 intel_pt_ns_to_ticks (const struct intel_pt *pt,u64 ns) +{ +u64 quot, rem; + + quot = ns / pt->tc.time_mult; + rem = ns % pt->tc.time_mult; +return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) / + pt->tc.time_mult; +} + +static struct intel_pt_queue *intel_pt_alloc_queue (struct intel_pt *pt, +unsigned int queue_nr) +{ +struct intel_pt_params params = { .get_trace =0 , }; +struct intel_pt_queue *ptq; + + ptq =zalloc (sizeof (struct intel_pt_queue )); +if (!ptq) +return NULL ; + +if (pt->synth_opts.callchain) { +size_t sz =sizeof (struct ip_callchain ); + + sz += pt->synth_opts.callchain_sz *sizeof (u64); + ptq->chain =zalloc (sz); +if (!ptq->chain) + goto out_free; + } + + ptq->event_buf =malloc (PERF_SAMPLE_MAX_SIZE ); +if (!ptq->event_buf) + goto out_free; + + ptq->pt = pt; + ptq->queue_nr = queue_nr; + ptq->exclude_kernel =intel_pt_exclude_kernel (pt); + ptq->pid =-1 ; + ptq->tid =-1 ; + ptq->cpu =-1 ; + ptq->next_tid =-1 ; + + params.get_trace = intel_pt_get_trace; + params.walk_insn = intel_pt_walk_next_insn; + params.data = ptq; + params.return_compression =intel_pt_return_compression (pt); + +if (pt->synth_opts.instructions) { +if (pt->synth_opts.period) { +switch (pt->synth_opts.period_type) { +case PERF_ITRACE_PERIOD_INSTRUCTIONS : + params.period_type = +INTEL_PT_PERIOD_INSTRUCTIONS ; + params.period = pt->synth_opts.period; +break ; +case PERF_ITRACE_PERIOD_TICKS : + params.period_type =INTEL_PT_PERIOD_TICKS ; + params.period = pt->synth_opts.period; +break ; +case PERF_ITRACE_PERIOD_NANOSECS : + params.period_type =INTEL_PT_PERIOD_TICKS ; + params.period =intel_pt_ns_to_ticks (pt, + pt->synth_opts.period); +break ; +default : +break ; + } + } + +if (!params.period) { + params.period_type =INTEL_PT_PERIOD_INSTRUCTIONS ; + params.period =1000 ; + } + } + + ptq->decoder =intel_pt_decoder_new (¶ms); +if (!ptq->decoder) + goto out_free; + +return ptq; + +out_free: +zfree (&ptq->event_buf); +zfree (&ptq->chain); +free (ptq); +return NULL ; +} + +static void intel_pt_free_queue (void *priv) +{ +struct intel_pt_queue *ptq = priv; + +if (!ptq) +return ; +intel_pt_decoder_free (ptq->decoder); +zfree (&ptq->event_buf); +zfree (&ptq->chain); +free (ptq); +} + +static void intel_pt_set_pid_tid_cpu (struct intel_pt *pt, +struct auxtrace_queue *queue) +{ +struct intel_pt_queue *ptq = queue->priv; + +if (queue->tid ==-1 || pt->have_sched_switch) { + ptq->tid =machine__get_current_tid (pt->machine, ptq->cpu); + ptq->thread =NULL ; + } + +if (!ptq->thread && ptq->tid !=-1 ) + ptq->thread =machine__find_thread (pt->machine,-1 , ptq->tid); + +if (ptq->thread) { + ptq->pid = ptq->thread->pid_; +if (queue->cpu ==-1 ) + ptq->cpu = ptq->thread->cpu; + } +} + +static void intel_pt_sample_flags (struct intel_pt_queue *ptq) +{ +if (ptq->state->flags &INTEL_PT_ABORT_TX ) { + ptq->flags =PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_TX_ABORT ; + }else if (ptq->state->flags &INTEL_PT_ASYNC ) { +if (ptq->state->to_ip) + ptq->flags =PERF_IP_FLAG_BRANCH |PERF_IP_FLAG_CALL | +PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_INTERRUPT ; +else + ptq->flags =PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_TRACE_END ; + ptq->insn_len =0 ; + }else { +if (ptq->state->from_ip) + ptq->flags =intel_pt_insn_type (ptq->state->insn_op); +else + ptq->flags =PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_TRACE_BEGIN ; +if (ptq->state->flags &INTEL_PT_IN_TX ) + ptq->flags |=PERF_IP_FLAG_IN_TX ; + ptq->insn_len = ptq->state->insn_len; + } +} + +static int intel_pt_setup_queue (struct intel_pt *pt, +struct auxtrace_queue *queue, +unsigned int queue_nr) +{ +struct intel_pt_queue *ptq = queue->priv; + +if (list_empty (&queue->head)) +return 0 ; + +if (!ptq) { + ptq =intel_pt_alloc_queue (pt, queue_nr); +if (!ptq) +return -ENOMEM ; + queue->priv = ptq; + +if (queue->cpu !=-1 ) + ptq->cpu = queue->cpu; + ptq->tid = queue->tid; + +if (pt->sampling_mode) { +if (pt->timeless_decoding) + ptq->step_through_buffers = true; +if (pt->timeless_decoding || !pt->have_sched_switch) + ptq->use_buffer_pid_tid = true; + } + } + +if (!ptq->on_heap && + (!pt->sync_switch || + ptq->switch_state !=INTEL_PT_SS_EXPECTING_SWITCH_EVENT )) { +const struct intel_pt_state *state; +int ret; + +if (pt->timeless_decoding) +return 0 ; + +intel_pt_log ("queue %u getting timestamp\n" , queue_nr); +intel_pt_log ("queue %u decoding cpu %d pid %d tid %d\n" , + queue_nr, ptq->cpu, ptq->pid, ptq->tid); +while (1 ) { + state =intel_pt_decode (ptq->decoder); +if (state->err) { +if (state->err ==INTEL_PT_ERR_NODATA ) { +intel_pt_log ("queue %u has no timestamp\n" , + queue_nr); +return 0 ; + } +continue ; + } +if (state->timestamp) +break ; + } + + ptq->timestamp = state->timestamp; +intel_pt_log ("queue %u timestamp 0x%" PRIx64"\n" , + queue_nr, ptq->timestamp); + ptq->state = state; + ptq->have_sample = true; +intel_pt_sample_flags (ptq); + ret =auxtrace_heap__add (&pt->heap, queue_nr, ptq->timestamp); +if (ret) +return ret; + ptq->on_heap = true; + } + +return 0 ; +} + +static int intel_pt_setup_queues (struct intel_pt *pt) +{ +unsigned int i; +int ret; + +for (i =0 ; i < pt->queues.nr_queues; i++) { + ret =intel_pt_setup_queue (pt, &pt->queues.queue_array[i], i); +if (ret) +return ret; + } +return 0 ; +} + +static int intel_pt_inject_event (union perf_event *event, +struct perf_sample *sample,u64 type, +bool swapped) +{ + event->header.size =perf_event__sample_event_size (sample, type,0 ); +return perf_event__synthesize_sample (event, type,0 , sample, swapped); +} + +static int intel_pt_synth_branch_sample (struct intel_pt_queue *ptq) +{ +int ret; +struct intel_pt *pt = ptq->pt; +union perf_event *event = ptq->event_buf; +struct perf_sample sample = { .ip =0 , }; + + event->sample.header.type =PERF_RECORD_SAMPLE ; + event->sample.header.misc =PERF_RECORD_MISC_USER ; + event->sample.header.size =sizeof (struct perf_event_header ); + +if (!pt->timeless_decoding) + sample.time =tsc_to_perf_time (ptq->timestamp, &pt->tc); + + sample.ip = ptq->state->from_ip; + sample.pid = ptq->pid; + sample.tid = ptq->tid; + sample.addr = ptq->state->to_ip; + sample.id = ptq->pt->branches_id; + sample.stream_id = ptq->pt->branches_id; + sample.period =1 ; + sample.cpu = ptq->cpu; + +if (pt->branches_filter && !(pt->branches_filter & ptq->flags)) +return 0 ; + +if (pt->synth_opts.inject) { + ret =intel_pt_inject_event (event, &sample, + pt->branches_sample_type, + pt->synth_needs_swap); +if (ret) +return ret; + } + + ret =perf_session__deliver_synth_event (pt->session, event, &sample); +if (ret) +pr_err ("Intel Processor Trace: failed to deliver branch event, error %d\n" , + ret); + +return ret; +} + +static int intel_pt_synth_instruction_sample (struct intel_pt_queue *ptq) +{ +int ret; +struct intel_pt *pt = ptq->pt; +union perf_event *event = ptq->event_buf; +struct perf_sample sample = { .ip =0 , }; + + event->sample.header.type =PERF_RECORD_SAMPLE ; + event->sample.header.misc =PERF_RECORD_MISC_USER ; + event->sample.header.size =sizeof (struct perf_event_header ); + +if (!pt->timeless_decoding) + sample.time =tsc_to_perf_time (ptq->timestamp, &pt->tc); + + sample.ip = ptq->state->from_ip; + sample.pid = ptq->pid; + sample.tid = ptq->tid; + sample.addr = ptq->state->to_ip; + sample.id = ptq->pt->instructions_id; + sample.stream_id = ptq->pt->instructions_id; + sample.period = ptq->pt->instructions_sample_period; + sample.cpu = ptq->cpu; + +if (pt->synth_opts.callchain) { +thread_stack__sample (ptq->thread, ptq->chain, + pt->synth_opts.callchain_sz, sample.ip); + sample.callchain = ptq->chain; + } + +if (pt->synth_opts.inject) { + ret =intel_pt_inject_event (event, &sample, + pt->instructions_sample_type, + pt->synth_needs_swap); +if (ret) +return ret; + } + + ret =perf_session__deliver_synth_event (pt->session, event, &sample); +if (ret) +pr_err ("Intel Processor Trace: failed to deliver instruction event, error %d\n" , + ret); + +return ret; +} + +static int intel_pt_synth_transaction_sample (struct intel_pt_queue *ptq) +{ +int ret; +struct intel_pt *pt = ptq->pt; +union perf_event *event = ptq->event_buf; +struct perf_sample sample = { .ip =0 , }; + + event->sample.header.type =PERF_RECORD_SAMPLE ; + event->sample.header.misc =PERF_RECORD_MISC_USER ; + event->sample.header.size =sizeof (struct perf_event_header ); + +if (!pt->timeless_decoding) + sample.time =tsc_to_perf_time (ptq->timestamp, &pt->tc); + + sample.ip = ptq->state->from_ip; + sample.pid = ptq->pid; + sample.tid = ptq->tid; + sample.addr = ptq->state->to_ip; + sample.id = ptq->pt->transactions_id; + sample.stream_id = ptq->pt->transactions_id; + sample.period =1 ; + sample.cpu = ptq->cpu; + sample.flags = ptq->flags; + sample.insn_len = ptq->insn_len; + +if (pt->synth_opts.callchain) { +thread_stack__sample (ptq->thread, ptq->chain, + pt->synth_opts.callchain_sz, sample.ip); + sample.callchain = ptq->chain; + } + +if (pt->synth_opts.inject) { + ret =intel_pt_inject_event (event, &sample, + pt->transactions_sample_type, + pt->synth_needs_swap); +if (ret) +return ret; + } + + ret =perf_session__deliver_synth_event (pt->session, event, &sample); +if (ret) +pr_err ("Intel Processor Trace: failed to deliver transaction event, error %d\n" , + ret); + +return ret; +} + +static int intel_pt_synth_error (struct intel_pt *pt,int code,int cpu, +pid_t pid,pid_t tid,u64 ip) +{ +union perf_event event; +char msg[MAX_AUXTRACE_ERROR_MSG ]; +int err; + +intel_pt__strerror (code, msg,MAX_AUXTRACE_ERROR_MSG ); + +auxtrace_synth_error (&event.auxtrace_error,PERF_AUXTRACE_ERROR_ITRACE , + code, cpu, pid, tid, ip, msg); + + err =perf_session__deliver_synth_event (pt->session, &event,NULL ); +if (err) +pr_err ("Intel Processor Trace: failed to deliver error event, error %d\n" , + err); + +return err; +} + +static int intel_pt_next_tid (struct intel_pt *pt,struct intel_pt_queue *ptq) +{ +struct auxtrace_queue *queue; +pid_t tid = ptq->next_tid; +int err; + +if (tid ==-1 ) +return 0 ; + +intel_pt_log ("switch: cpu %d tid %d\n" , ptq->cpu, tid); + + err =machine__set_current_tid (pt->machine, ptq->cpu,-1 , tid); + + queue = &pt->queues.queue_array[ptq->queue_nr]; +intel_pt_set_pid_tid_cpu (pt, queue); + + ptq->next_tid =-1 ; + +return err; +} + +static inline bool intel_pt_is_switch_ip (struct intel_pt_queue *ptq,u64 ip) +{ +struct intel_pt *pt = ptq->pt; + +return ip == pt->switch_ip && + (ptq->flags &PERF_IP_FLAG_BRANCH ) && + !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL |PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_INTERRUPT |PERF_IP_FLAG_TX_ABORT )); +} + +static int intel_pt_sample (struct intel_pt_queue *ptq) +{ +const struct intel_pt_state *state = ptq->state; +struct intel_pt *pt = ptq->pt; +int err; + +if (!ptq->have_sample) +return 0 ; + + ptq->have_sample = false; + +if (pt->sample_instructions && + (state->type &INTEL_PT_INSTRUCTION )) { + err =intel_pt_synth_instruction_sample (ptq); +if (err) +return err; + } + +if (pt->sample_transactions && + (state->type &INTEL_PT_TRANSACTION )) { + err =intel_pt_synth_transaction_sample (ptq); +if (err) +return err; + } + +if (!(state->type &INTEL_PT_BRANCH )) +return 0 ; + +if (pt->synth_opts.callchain) +thread_stack__event (ptq->thread, ptq->flags, state->from_ip, + state->to_ip, ptq->insn_len, + state->trace_nr); + +if (pt->sample_branches) { + err =intel_pt_synth_branch_sample (ptq); +if (err) +return err; + } + +if (!pt->sync_switch) +return 0 ; + +if (intel_pt_is_switch_ip (ptq, state->to_ip)) { +switch (ptq->switch_state) { +case INTEL_PT_SS_UNKNOWN : +case INTEL_PT_SS_EXPECTING_SWITCH_IP : + err =intel_pt_next_tid (pt, ptq); +if (err) +return err; + ptq->switch_state =INTEL_PT_SS_TRACING ; +break ; +default : + ptq->switch_state =INTEL_PT_SS_EXPECTING_SWITCH_EVENT ; +return 1 ; + } + }else if (!state->to_ip) { + ptq->switch_state =INTEL_PT_SS_NOT_TRACING ; + }else if (ptq->switch_state ==INTEL_PT_SS_NOT_TRACING ) { + ptq->switch_state =INTEL_PT_SS_UNKNOWN ; + }else if (ptq->switch_state ==INTEL_PT_SS_UNKNOWN && + state->to_ip == pt->ptss_ip && + (ptq->flags &PERF_IP_FLAG_CALL )) { + ptq->switch_state =INTEL_PT_SS_TRACING ; + } + +return 0 ; +} + +static u64 intel_pt_switch_ip (struct machine *machine,u64 *ptss_ip) +{ +struct map *map; +struct symbol *sym, *start; +u64 ip, switch_ip =0 ; + +if (ptss_ip) + *ptss_ip =0 ; + + map =machine__kernel_map (machine,MAP__FUNCTION ); +if (!map) +return 0 ; + +if (map__load (map, machine->symbol_filter)) +return 0 ; + + start =dso__first_symbol (map->dso,MAP__FUNCTION ); + +for (sym = start; sym; sym =dso__next_symbol (sym)) { +if (sym->binding ==STB_GLOBAL && + !strcmp (sym->name,"__switch_to" )) { + ip = map->unmap_ip (map, sym->start); +if (ip >= map->start && ip < map->end) { + switch_ip = ip; +break ; + } + } + } + +if (!switch_ip || !ptss_ip) +return 0 ; + +for (sym = start; sym; sym =dso__next_symbol (sym)) { +if (!strcmp (sym->name,"perf_trace_sched_switch" )) { + ip = map->unmap_ip (map, sym->start); +if (ip >= map->start && ip < map->end) { + *ptss_ip = ip; +break ; + } + } + } + +return switch_ip; +} + +static int intel_pt_run_decoder (struct intel_pt_queue *ptq,u64 *timestamp) +{ +const struct intel_pt_state *state = ptq->state; +struct intel_pt *pt = ptq->pt; +int err; + +if (!pt->kernel_start) { + pt->kernel_start =machine__kernel_start (pt->machine); +if (pt->per_cpu_mmaps && pt->have_sched_switch && + !pt->timeless_decoding &&intel_pt_tracing_kernel (pt) && + !pt->sampling_mode) { + pt->switch_ip =intel_pt_switch_ip (pt->machine, + &pt->ptss_ip); +if (pt->switch_ip) { +intel_pt_log ("switch_ip: %" PRIx64" ptss_ip: %" PRIx64"\n" , + pt->switch_ip, pt->ptss_ip); + pt->sync_switch = true; + pt->est_tsc_orig = pt->est_tsc; + pt->est_tsc = false; + } + } + } + +intel_pt_log ("queue %u decoding cpu %d pid %d tid %d\n" , + ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid); +while (1 ) { + err =intel_pt_sample (ptq); +if (err) +return err; + + state =intel_pt_decode (ptq->decoder); +if (state->err) { +if (state->err ==INTEL_PT_ERR_NODATA ) +return 1 ; +if (pt->sync_switch && + state->from_ip >= pt->kernel_start) { + pt->sync_switch = false; + pt->est_tsc = pt->est_tsc_orig; +intel_pt_next_tid (pt, ptq); + } +if (pt->synth_opts.errors) { + err =intel_pt_synth_error (pt, state->err, + ptq->cpu, ptq->pid, + ptq->tid, + state->from_ip); +if (err) +return err; + } +continue ; + } + + ptq->state = state; + ptq->have_sample = true; +intel_pt_sample_flags (ptq); + +/* Use estimated TSC upon return to user space */ +if (pt->est_tsc) { +if (state->from_ip >= pt->kernel_start && + state->to_ip && + state->to_ip < pt->kernel_start) + ptq->timestamp = state->est_timestamp; +else if (state->timestamp > ptq->timestamp) + ptq->timestamp = state->timestamp; +/* Use estimated TSC in unknown switch state */ + }else if (pt->sync_switch && + ptq->switch_state ==INTEL_PT_SS_UNKNOWN && + state->to_ip == pt->switch_ip && + (ptq->flags &PERF_IP_FLAG_CALL ) && + ptq->next_tid ==-1 ) { + ptq->timestamp = state->est_timestamp; + }else if (state->timestamp > ptq->timestamp) { + ptq->timestamp = state->timestamp; + } + +if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) { + *timestamp = ptq->timestamp; +return 0 ; + } + } +return 0 ; +} + +static inline int intel_pt_update_queues (struct intel_pt *pt) +{ +if (pt->queues.new_data) { + pt->queues.new_data = false; +return intel_pt_setup_queues (pt); + } +return 0 ; +} + +static int intel_pt_process_queues (struct intel_pt *pt,u64 timestamp) +{ +unsigned int queue_nr; +u64 ts; +int ret; + +while (1 ) { +struct auxtrace_queue *queue; +struct intel_pt_queue *ptq; + +if (!pt->heap.heap_cnt) +return 0 ; + +if (pt->heap.heap_array[0 ].ordinal >= timestamp) +return 0 ; + + queue_nr = pt->heap.heap_array[0 ].queue_nr; + queue = &pt->queues.queue_array[queue_nr]; + ptq = queue->priv; + +intel_pt_log ("queue %u processing 0x%" PRIx64" to 0x%" PRIx64"\n" , + queue_nr, pt->heap.heap_array[0 ].ordinal, + timestamp); + +auxtrace_heap__pop (&pt->heap); + +if (pt->heap.heap_cnt) { + ts = pt->heap.heap_array[0 ].ordinal +1 ; +if (ts > timestamp) + ts = timestamp; + }else { + ts = timestamp; + } + +intel_pt_set_pid_tid_cpu (pt, queue); + + ret =intel_pt_run_decoder (ptq, &ts); + +if (ret <0 ) { +auxtrace_heap__add (&pt->heap, queue_nr, ts); +return ret; + } + +if (!ret) { + ret =auxtrace_heap__add (&pt->heap, queue_nr, ts); +if (ret <0 ) +return ret; + }else { + ptq->on_heap = false; + } + } + +return 0 ; +} + +static int intel_pt_process_timeless_queues (struct intel_pt *pt,pid_t tid, +u64 time_) +{ +struct auxtrace_queues *queues = &pt->queues; +unsigned int i; +u64 ts =0 ; + +for (i =0 ; i < queues->nr_queues; i++) { +struct auxtrace_queue *queue = &pt->queues.queue_array[i]; +struct intel_pt_queue *ptq = queue->priv; + +if (ptq && (tid ==-1 || ptq->tid == tid)) { + ptq->time = time_; +intel_pt_set_pid_tid_cpu (pt, queue); +intel_pt_run_decoder (ptq, &ts); + } + } +return 0 ; +} + +static int intel_pt_lost (struct intel_pt *pt,struct perf_sample *sample) +{ +return intel_pt_synth_error (pt,INTEL_PT_ERR_LOST , sample->cpu, + sample->pid, sample->tid,0 ); +} + +static struct intel_pt_queue *intel_pt_cpu_to_ptq (struct intel_pt *pt,int cpu) +{ +unsigned i, j; + +if (cpu <0 || !pt->queues.nr_queues) +return NULL ; + +if ((unsigned )cpu >= pt->queues.nr_queues) + i = pt->queues.nr_queues -1 ; +else + i = cpu; + +if (pt->queues.queue_array[i].cpu == cpu) +return pt->queues.queue_array[i].priv; + +for (j =0 ; i >0 ; j++) { +if (pt->queues.queue_array[--i].cpu == cpu) +return pt->queues.queue_array[i].priv; + } + +for (; j < pt->queues.nr_queues; j++) { +if (pt->queues.queue_array[j].cpu == cpu) +return pt->queues.queue_array[j].priv; + } + +return NULL ; +} + +static int intel_pt_process_switch (struct intel_pt *pt, +struct perf_sample *sample) +{ +struct intel_pt_queue *ptq; +struct perf_evsel *evsel; +pid_t tid; +int cpu, err; + + evsel =perf_evlist__id2evsel (pt->session->evlist, sample->id); +if (evsel != pt->switch_evsel) +return 0 ; + + tid =perf_evsel__intval (evsel, sample,"next_pid" ); + cpu = sample->cpu; + +intel_pt_log ("sched_switch: cpu %d tid %d time %" PRIu64" tsc %#" PRIx64"\n" , + cpu, tid, sample->time,perf_time_to_tsc (sample->time, + &pt->tc)); + +if (!pt->sync_switch) + goto out; + + ptq =intel_pt_cpu_to_ptq (pt, cpu); +if (!ptq) + goto out; + +switch (ptq->switch_state) { +case INTEL_PT_SS_NOT_TRACING : + ptq->next_tid =-1 ; +break ; +case INTEL_PT_SS_UNKNOWN : +case INTEL_PT_SS_TRACING : + ptq->next_tid = tid; + ptq->switch_state =INTEL_PT_SS_EXPECTING_SWITCH_IP ; +return 0 ; +case INTEL_PT_SS_EXPECTING_SWITCH_EVENT : +if (!ptq->on_heap) { + ptq->timestamp =perf_time_to_tsc (sample->time, + &pt->tc); + err =auxtrace_heap__add (&pt->heap, ptq->queue_nr, + ptq->timestamp); +if (err) +return err; + ptq->on_heap = true; + } + ptq->switch_state =INTEL_PT_SS_TRACING ; +break ; +case INTEL_PT_SS_EXPECTING_SWITCH_IP : + ptq->next_tid = tid; +intel_pt_log ("ERROR: cpu %d expecting switch ip\n" , cpu); +break ; +default : +break ; + } +out: +return machine__set_current_tid (pt->machine, cpu,-1 , tid); +} + +static int intel_pt_process_itrace_start (struct intel_pt *pt, +union perf_event *event, +struct perf_sample *sample) +{ +if (!pt->per_cpu_mmaps) +return 0 ; + +intel_pt_log ("itrace_start: cpu %d pid %d tid %d time %" PRIu64" tsc %#" PRIx64"\n" , + sample->cpu, event->itrace_start.pid, + event->itrace_start.tid, sample->time, +perf_time_to_tsc (sample->time, &pt->tc)); + +return machine__set_current_tid (pt->machine, sample->cpu, + event->itrace_start.pid, + event->itrace_start.tid); +} + +static int intel_pt_process_event (struct perf_session *session, +union perf_event *event, +struct perf_sample *sample, +struct perf_tool *tool) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); +u64 timestamp; +int err =0 ; + +if (dump_trace) +return 0 ; + +if (!tool->ordered_events) { +pr_err ("Intel Processor Trace requires ordered events\n" ); +return -EINVAL ; + } + +if (sample->time) + timestamp =perf_time_to_tsc (sample->time, &pt->tc); +else + timestamp =0 ; + +if (timestamp || pt->timeless_decoding) { + err =intel_pt_update_queues (pt); +if (err) +return err; + } + +if (pt->timeless_decoding) { +if (event->header.type ==PERF_RECORD_EXIT ) { + err =intel_pt_process_timeless_queues (pt, + event->comm.tid, + sample->time); + } + }else if (timestamp) { + err =intel_pt_process_queues (pt, timestamp); + } +if (err) +return err; + +if (event->header.type ==PERF_RECORD_AUX && + (event->aux.flags &PERF_AUX_FLAG_TRUNCATED ) && + pt->synth_opts.errors) + err =intel_pt_lost (pt, sample); + +if (pt->switch_evsel && event->header.type ==PERF_RECORD_SAMPLE ) + err =intel_pt_process_switch (pt, sample); +else if (event->header.type ==PERF_RECORD_ITRACE_START ) + err =intel_pt_process_itrace_start (pt, event, sample); + +return err; +} + +static int intel_pt_flush (struct perf_session *session,struct perf_tool *tool) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); +int ret; + +if (dump_trace) +return 0 ; + +if (!tool->ordered_events) +return -EINVAL ; + + ret =intel_pt_update_queues (pt); +if (ret <0 ) +return ret; + +if (pt->timeless_decoding) +return intel_pt_process_timeless_queues (pt,-1 , +MAX_TIMESTAMP -1 ); + +return intel_pt_process_queues (pt,MAX_TIMESTAMP ); +} + +static void intel_pt_free_events (struct perf_session *session) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); +struct auxtrace_queues *queues = &pt->queues; +unsigned int i; + +for (i =0 ; i < queues->nr_queues; i++) { +intel_pt_free_queue (queues->queue_array[i].priv); + queues->queue_array[i].priv =NULL ; + } +intel_pt_log_disable (); +auxtrace_queues__free (queues); +} + +static void intel_pt_free (struct perf_session *session) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); + +auxtrace_heap__free (&pt->heap); +intel_pt_free_events (session); + session->auxtrace =NULL ; +thread__delete (pt->unknown_thread); +free (pt); +} + +static int intel_pt_process_auxtrace_event (struct perf_session *session, +union perf_event *event, +struct perf_tool *tool__maybe_unused ) +{ + struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt, + auxtrace); + +if (pt->sampling_mode) +return 0 ; + +if (!pt->data_queued) { +struct auxtrace_buffer *buffer; +off_t data_offset; +int fd =perf_data_file__fd (session->file); +int err; + +if (perf_data_file__is_pipe (session->file)) { + data_offset =0 ; + }else { + data_offset =lseek (fd,0 ,SEEK_CUR ); +if (data_offset ==-1 ) +return -errno; + } + + err =auxtrace_queues__add_event (&pt->queues, session, event, + data_offset, &buffer); +if (err) +return err; + +/* Dump here now we have copied a piped trace out of the pipe */ +if (dump_trace) { +if (auxtrace_buffer__get_data (buffer, fd)) { +intel_pt_dump_event (pt, buffer->data, + buffer->size); +auxtrace_buffer__put_data (buffer); + } + } + } + +return 0 ; +} + +struct intel_pt_synth { +struct perf_tool dummy_tool; +struct perf_session *session; +}; + +static int intel_pt_event_synth (struct perf_tool *tool, +union perf_event *event, +struct perf_sample *sample__maybe_unused , +struct machine *machine__maybe_unused ) +{ +struct intel_pt_synth *intel_pt_synth = + container_of(tool, struct intel_pt_synth, dummy_tool); + +return perf_session__deliver_synth_event (intel_pt_synth->session, event, +NULL ); +} + +static int intel_pt_synth_event (struct perf_session *session, +struct perf_event_attr *attr,u64 id) +{ +struct intel_pt_synth intel_pt_synth; + +memset (&intel_pt_synth,0 ,sizeof (struct intel_pt_synth )); + intel_pt_synth.session = session; + +return perf_event__synthesize_attr (&intel_pt_synth.dummy_tool, attr,1 , + &id, intel_pt_event_synth); +} + +static int intel_pt_synth_events (struct intel_pt *pt, +struct perf_session *session) +{ +struct perf_evlist *evlist = session->evlist; +struct perf_evsel *evsel; +struct perf_event_attr attr; +bool found = false; +u64 id; +int err; + +evlist__for_each (evlist, evsel) { +if (evsel->attr.type == pt->pmu_type && evsel->ids) { + found = true; +break ; + } + } + +if (!found) { +pr_debug ("There are no selected events with Intel Processor Trace data\n" ); +return 0 ; + } + +memset (&attr,0 ,sizeof (struct perf_event_attr )); + attr.size =sizeof (struct perf_event_attr ); + attr.type =PERF_TYPE_HARDWARE ; + attr.sample_type = evsel->attr.sample_type &PERF_SAMPLE_MASK ; + attr.sample_type |=PERF_SAMPLE_IP |PERF_SAMPLE_TID | +PERF_SAMPLE_PERIOD ; +if (pt->timeless_decoding) + attr.sample_type &= ~(u64 )PERF_SAMPLE_TIME ; +else + attr.sample_type |=PERF_SAMPLE_TIME ; +if (!pt->per_cpu_mmaps) + attr.sample_type &= ~(u64 )PERF_SAMPLE_CPU ; + attr.exclude_user = evsel->attr.exclude_user; + attr.exclude_kernel = evsel->attr.exclude_kernel; + attr.exclude_hv = evsel->attr.exclude_hv; + attr.exclude_host = evsel->attr.exclude_host; + attr.exclude_guest = evsel->attr.exclude_guest; + attr.sample_id_all = evsel->attr.sample_id_all; + attr.read_format = evsel->attr.read_format; + + id = evsel->id[0 ] +1000000000 ; +if (!id) + id =1 ; + +if (pt->synth_opts.instructions) { + attr.config =PERF_COUNT_HW_INSTRUCTIONS ; +if (pt->synth_opts.period_type ==PERF_ITRACE_PERIOD_NANOSECS ) + attr.sample_period = +intel_pt_ns_to_ticks (pt, pt->synth_opts.period); +else + attr.sample_period = pt->synth_opts.period; + pt->instructions_sample_period = attr.sample_period; +if (pt->synth_opts.callchain) + attr.sample_type |=PERF_SAMPLE_CALLCHAIN ; +pr_debug ("Synthesizing 'instructions' event with id %" PRIu64" sample type %#" PRIx64"\n" , + id, (u64 )attr.sample_type); + err =intel_pt_synth_event (session, &attr, id); +if (err) { +pr_err ("%s: failed to synthesize 'instructions' event type\n" , + __func__); +return err; + } + pt->sample_instructions = true; + pt->instructions_sample_type = attr.sample_type; + pt->instructions_id = id; + id +=1 ; + } + +if (pt->synth_opts.transactions) { + attr.config =PERF_COUNT_HW_INSTRUCTIONS ; + attr.sample_period =1 ; +if (pt->synth_opts.callchain) + attr.sample_type |=PERF_SAMPLE_CALLCHAIN ; +pr_debug ("Synthesizing 'transactions' event with id %" PRIu64" sample type %#" PRIx64"\n" , + id, (u64 )attr.sample_type); + err =intel_pt_synth_event (session, &attr, id); +if (err) { +pr_err ("%s: failed to synthesize 'transactions' event type\n" , + __func__); +return err; + } + pt->sample_transactions = true; + pt->transactions_id = id; + id +=1 ; +evlist__for_each (evlist, evsel) { +if (evsel->id && evsel->id[0 ] == pt->transactions_id) { +if (evsel->name) +zfree (&evsel->name); + evsel->name =strdup ("transactions" ); +break ; + } + } + } + +if (pt->synth_opts.branches) { + attr.config =PERF_COUNT_HW_BRANCH_INSTRUCTIONS ; + attr.sample_period =1 ; + attr.sample_type |=PERF_SAMPLE_ADDR ; + attr.sample_type &= ~(u64 )PERF_SAMPLE_CALLCHAIN ; +pr_debug ("Synthesizing 'branches' event with id %" PRIu64" sample type %#" PRIx64"\n" , + id, (u64 )attr.sample_type); + err =intel_pt_synth_event (session, &attr, id); +if (err) { +pr_err ("%s: failed to synthesize 'branches' event type\n" , + __func__); +return err; + } + pt->sample_branches = true; + pt->branches_sample_type = attr.sample_type; + pt->branches_id = id; + } + + pt->synth_needs_swap = evsel->needs_swap; + +return 0 ; +} + +static struct perf_evsel *intel_pt_find_sched_switch (struct perf_evlist *evlist) +{ +struct perf_evsel *evsel; + +evlist__for_each_reverse (evlist, evsel) { +const char *name =perf_evsel__name (evsel); + +if (!strcmp (name,"sched:sched_switch" )) +return evsel; + } + +return NULL ; +} + +static const char *const intel_pt_info_fmts[] = { + [INTEL_PT_PMU_TYPE ] =" PMU Type %" PRId64"\n" , + [INTEL_PT_TIME_SHIFT ] =" Time Shift %" PRIu64"\n" , + [INTEL_PT_TIME_MULT ] =" Time Muliplier %" PRIu64"\n" , + [INTEL_PT_TIME_ZERO ] =" Time Zero %" PRIu64"\n" , + [INTEL_PT_CAP_USER_TIME_ZERO ] =" Cap Time Zero %" PRId64"\n" , + [INTEL_PT_TSC_BIT ] =" TSC bit %#" PRIx64"\n" , + [INTEL_PT_NORETCOMP_BIT ] =" NoRETComp bit %#" PRIx64"\n" , + [INTEL_PT_HAVE_SCHED_SWITCH ] =" Have sched_switch %" PRId64"\n" , + [INTEL_PT_SNAPSHOT_MODE ] =" Snapshot mode %" PRId64"\n" , + [INTEL_PT_PER_CPU_MMAPS ] =" Per-cpu maps %" PRId64"\n" , +}; + +static void intel_pt_print_info (u64 *arr,int start,int finish) +{ +int i; + +if (!dump_trace) +return ; + +for (i = start; i <= finish; i++) +fprintf (stdout, intel_pt_info_fmts[i], arr[i]); +} + +int intel_pt_process_auxtrace_info (union perf_event *event, +struct perf_session *session) +{ +struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info; +size_t min_sz =sizeof (u64) *INTEL_PT_PER_CPU_MMAPS ; +struct intel_pt *pt; +int err; + +if (auxtrace_info->header.size <sizeof (struct auxtrace_info_event ) + + min_sz) +return -EINVAL ; + + pt =zalloc (sizeof (struct intel_pt )); +if (!pt) +return -ENOMEM ; + + err =auxtrace_queues__init (&pt->queues); +if (err) + goto err_free; + +intel_pt_log_set_name (INTEL_PT_PMU_NAME ); + + pt->session = session; + pt->machine = &session->machines.host;/* No kvm support */ + pt->auxtrace_type = auxtrace_info->type; + pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE ]; + pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT ]; + pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT ]; + pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO ]; + pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO ]; + pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT ]; + pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT ]; + pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH ]; + pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE ]; + pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS ]; +intel_pt_print_info (&auxtrace_info->priv[0 ],INTEL_PT_PMU_TYPE , +INTEL_PT_PER_CPU_MMAPS ); + + pt->timeless_decoding =intel_pt_timeless_decoding (pt); + pt->have_tsc =intel_pt_have_tsc (pt); + pt->sampling_mode = false; + pt->est_tsc = pt->per_cpu_mmaps && !pt->timeless_decoding; + + pt->unknown_thread =thread__new (999999999 ,999999999 ); +if (!pt->unknown_thread) { + err = -ENOMEM ; + goto err_free_queues; + } + err =thread__set_comm (pt->unknown_thread,"unknown" ,0 ); +if (err) + goto err_delete_thread; +if (thread__init_map_groups (pt->unknown_thread, pt->machine)) { + err = -ENOMEM ; + goto err_delete_thread; + } + + pt->auxtrace.process_event = intel_pt_process_event; + pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event; + pt->auxtrace.flush_events = intel_pt_flush; + pt->auxtrace.free_events = intel_pt_free_events; + pt->auxtrace.free = intel_pt_free; + session->auxtrace = &pt->auxtrace; + +if (dump_trace) +return 0 ; + +if (pt->have_sched_switch ==1 ) { + pt->switch_evsel =intel_pt_find_sched_switch (session->evlist); +if (!pt->switch_evsel) { +pr_err ("%s: missing sched_switch event\n" , __func__); + goto err_delete_thread; + } + } + +if (session->itrace_synth_opts && session->itrace_synth_opts->set) { + pt->synth_opts = *session->itrace_synth_opts; + }else { +itrace_synth_opts__set_default (&pt->synth_opts); +if (use_browser !=-1 ) { + pt->synth_opts.branches = false; + pt->synth_opts.callchain = true; + } + } + +if (pt->synth_opts.log) +intel_pt_log_enable (); + +if (pt->synth_opts.calls) + pt->branches_filter |=PERF_IP_FLAG_CALL |PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_TRACE_END ; +if (pt->synth_opts.returns) + pt->branches_filter |=PERF_IP_FLAG_RETURN | +PERF_IP_FLAG_TRACE_BEGIN ; + +if (pt->synth_opts.callchain && !symbol_conf.use_callchain) { + symbol_conf.use_callchain = true; +if (callchain_register_param (&callchain_param) <0 ) { + symbol_conf.use_callchain = false; + pt->synth_opts.callchain = false; + } + } + + err =intel_pt_synth_events (pt, session); +if (err) + goto err_delete_thread; + + err =auxtrace_queues__process_index (&pt->queues, session); +if (err) + goto err_delete_thread; + +if (pt->queues.populated) + pt->data_queued = true; + +if (pt->timeless_decoding) +pr_debug2 ("Intel PT decoding without timestamps\n" ); + +return 0 ; + +err_delete_thread: +thread__delete (pt->unknown_thread); +err_free_queues: +intel_pt_log_disable (); +auxtrace_queues__free (&pt->queues); + session->auxtrace =NULL ; +err_free: +free (pt); +return err; +}tools/perf/util/intel-pt.h new file +45
-0@@ -0,0 +1,51 @@ +/* +* intel_pt.h: Intel Processor Trace support +* Copyright (c) 2013-2015, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#ifndef INCLUDE__PERF_INTEL_PT_H__ +#define INCLUDE__PERF_INTEL_PT_H__ + +#define INTEL_PT_PMU_NAME "intel_pt" + +enum { +INTEL_PT_PMU_TYPE , +INTEL_PT_TIME_SHIFT , +INTEL_PT_TIME_MULT , +INTEL_PT_TIME_ZERO , +INTEL_PT_CAP_USER_TIME_ZERO , +INTEL_PT_TSC_BIT , +INTEL_PT_NORETCOMP_BIT , +INTEL_PT_HAVE_SCHED_SWITCH , +INTEL_PT_SNAPSHOT_MODE , +INTEL_PT_PER_CPU_MMAPS , +INTEL_PT_AUXTRACE_PRIV_MAX , +}; + +#define INTEL_PT_AUXTRACE_PRIV_SIZE (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) + +struct auxtrace_record ; +struct perf_tool ; +union perf_event ; +struct perf_session ; +struct perf_event_attr ; +struct perf_pmu ; + +struct auxtrace_record *intel_pt_recording_init (int *err); +
Quoted 8 lines
Quoted 8 lines
tools/perf/util/intel-pt.h new file +6
-1+int intel_pt_process_auxtrace_info (union perf_event *event, +struct perf_session *session); + +struct perf_event_attr *intel_pt_pmu_default_config (struct perf_pmu *pmu); + +#endif --1.9.1
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Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Fri, Jun 19, 2015 at 10:33:43PM +0300, Adrian Hunter escreveu:
Quoted 16 lines · Arnaldo Carvalho de Melo
Quoted 14 lines
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Quoted 4 lines
Quoted 2 lines
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
Actually you need the next patch "perf tools: Take Intel PT into use" to do anything.
Yeah, saw that, the title of this patch fooled me into thinking that Intel PT support was added :-)
Anyway, stopping for a moment to push stuff ready to Ingo, will get back to this after that.
- Arnaldo
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Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Fri, Jun 19, 2015 at 04:41:56PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 20 lines
Em Fri, Jun 19, 2015 at 10:33:43PM +0300, Adrian Hunter escreveu:
Quoted 18 lines · Arnaldo Carvalho de Melo
Quoted 17 lines
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
Quoted 7 lines
Quoted 1 line
Actually you need the next patch "perf tools: Take Intel PT into use" to do anything.
Yeah, saw that, the title of this patch fooled me into thinking that Intel PT support was added :-)
Anyway, stopping for a moment to push stuff ready to Ingo, will get back to this after that.
So, got back to it, added that "take it into use" patch and now trying to follow that documentation:
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# perf report
[root@perf4 ~]# perf record -e intel_pt//u -a sleep 10 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.379 MB perf.data ] [root@perf4 ~]#
[root@perf4 ~]#
[root@perf4 ~]# perf report
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# uname -r
4.1.0-rc8
[root@perf4 ~]#
I am not getting any "intel_pt//u" event, ideas?
- Arnaldo
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Adrian Hunter
reviewerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Quoted 51 lines · Arnaldo Carvalho de Melo
Em Fri, Jun 19, 2015 at 04:41:56PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 20 lines
Em Fri, Jun 19, 2015 at 10:33:43PM +0300, Adrian Hunter escreveu:
Quoted 18 lines · Arnaldo Carvalho de Melo
Quoted 17 lines
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
Quoted 7 lines
Quoted 1 line
Actually you need the next patch "perf tools: Take Intel PT into use" to do anything.
Yeah, saw that, the title of this patch fooled me into thinking that Intel PT support was added :-)
Anyway, stopping for a moment to push stuff ready to Ingo, will get back to this after that.
So, got back to it, added that "take it into use" patch and now trying to follow that documentation:
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# perf report
[root@perf4 ~]# perf record -e intel_pt//u -a sleep 10 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.379 MB perf.data ] [root@perf4 ~]#
[root@perf4 ~]#
[root@perf4 ~]# perf report
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# uname -r
4.1.0-rc8
[root@perf4 ~]#
Quoted 1 line
I am not getting any "intel_pt//u" event, ideas?
Events are synthesized by the decoder. You should see 'instructions:u' events.
What does perf report --stdio give?
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Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Mon, Jun 22, 2015 at 11:26:34PM +0300, Adrian Hunter escreveu:
Quoted 52 lines · Arnaldo Carvalho de Melo
Quoted 51 lines
Em Fri, Jun 19, 2015 at 04:41:56PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 20 lines
Em Fri, Jun 19, 2015 at 10:33:43PM +0300, Adrian Hunter escreveu:
Quoted 18 lines · Arnaldo Carvalho de Melo
Quoted 17 lines
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
Quoted 7 lines
Quoted 1 line
Actually you need the next patch "perf tools: Take Intel PT into use" to do anything.
Yeah, saw that, the title of this patch fooled me into thinking that Intel PT support was added :-)
Anyway, stopping for a moment to push stuff ready to Ingo, will get back to this after that.
So, got back to it, added that "take it into use" patch and now trying to follow that documentation:
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# perf report
[root@perf4 ~]# perf record -e intel_pt//u -a sleep 10 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.379 MB perf.data ] [root@perf4 ~]#
[root@perf4 ~]#
[root@perf4 ~]# perf report
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# uname -r
4.1.0-rc8
[root@perf4 ~]#
Quoted 5 lines
Quoted 1 line
I am not getting any "intel_pt//u" event, ideas?
Events are synthesized by the decoder. You should see 'instructions:u' events.
What does perf report --stdio give?
Well, away from a Broadwell machine now, applied a few patches more and I'm now trying BTS, on this Ivy Bridge notebook (MacBook Air):
[ 0.000000] DMI: Apple Inc. MacBookAir5,1/Mac-66F35F19FE2A0D05, BIOS MBA51.88Z.00EF.B02.1211271028 11/27/2012
[ 0.116644] perf_event_intel: PMU erratum BJ122, BV98, HSD29 worked around, HT is on
[ 0.061626] TSC deadline timer enabled [ 0.061630] smpboot: CPU0: Intel(R) Core(TM) i7-3667U CPU @ 2.00GHz (fam: 06, model: 3a, stepping: 09) [ 0.061661] Performance Events: PEBS fmt1+, 16-deep LBR, IvyBridge events, full-width counters, Intel PMU driver. [ 0.061685] ... version: 3 [ 0.061686] ... bit width: 48 [ 0.061687] ... generic registers: 4 [ 0.061688] ... value mask: 0000ffffffffffff [ 0.061690] ... max period: 0000ffffffffffff [ 0.061691] ... fixed-purpose events: 3 [ 0.061692] ... event mask: 000000070000000f [ 0.062587] x86: Booting SMP configuration: [ 0.062589] .... node #0, CPUs: #1 [ 0.074078] microcode: CPU1 microcode updated early to revision 0x1b, date = 2014-05-29 [ 0.076715] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. [ 0.076825] #2 #3 [ 0.104559] x86: Booted up 1 node, 4 CPUs [ 0.104563] smpboot: Total of 4 processors activated (19953.49 BogoMIPS)
[root@zoo ~]# perf record -e intel_bts//u --per-thread sleep 5 [ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.531 MB perf.data ] [root@zoo ~]# perf evlist
intel_bts//u
dummy:u
[root@zoo ~]#
[root@zoo ~]# perf report --stdio | head -40
# To display the perf.data header info, please use --header/--header-only options. #
#
# Total Lost Samples: 0
#
# Samples: 0 of event 'intel_bts//u'
# Event count (approx.): 0
#
# Overhead Command Shared Object Symbol # ........ ....... ............. ......
#
# Samples: 0 of event 'dummy:u'
# Event count (approx.): 0
#
# Overhead Command Shared Object Symbol # ........ ....... ............. ......
#
# Samples: 22K of event 'branches:u'
# Event count (approx.): 22548
#
# Overhead Command Shared Object Symbol
# ........ ....... ................ ......................
#
9.82% sleep [unknown] [.] 0x00007f8e86c09061
8.28% sleep [unknown] [.] 0x00007f8e86ea4e7e
6.97% sleep [unknown] [.] 0x00007f8e86c09086
5.88% sleep [unknown] [.] 0x00007f8e86e95726
5.28% sleep [unknown] [.] 0x00007f8e86e9730d
4.69% sleep [unknown] [.] 0x00007f8e86b06bc1
4.48% sleep [unknown] [.] 0x00007f8e86c090c7
4.01% sleep [unknown] [.] 0x00007f8e86c09027
4.01% sleep [unknown] [.] 0x00007f8e86c0904c
2.84% sleep [unknown] [.] 0x00007f8e86c0908c
2.74% sleep [unknown] [.] 0x00007f8e86c0909d
2.74% sleep [unknown] [.] 0x00007f8e86c09037
1.20% sleep [unknown] [.] 0x00007f8e86af9c68-----------------------------------------------------------------
Ok, so it synthesized the branches:u, that don't appear on the 'perf evlist' output, that is the command I use to see what kinds of events are contained in a given perf.data file, probably we should add a note there that branches:u will be synthesized at 'report' time, trying with 'perf script':
[root@zoo ~]# perf script | head -10
:8676 8676 1 branches:u: ffffffff81799b47 [unknown] ([unknown]) => 7f8e86e8bcf0 [unknown] ([unknown]) :8676 8676 1 branches:u: ffffffff81799b47 [unknown] ([unknown]) => 7f8e86e8bcf0 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8bcf3 [unknown] ([unknown]) => 7f8e86e8f980 [unknown] ([unknown]) :8676 8676 1 branches:u: ffffffff81799b47 [unknown] ([unknown]) => 7f8e86e8f9a6 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa11 [unknown] ([unknown]) => 7f8e86e8fa2f [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa33 [unknown] ([unknown]) => 7f8e86e8fa18 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa33 [unknown] ([unknown]) => 7f8e86e8fa18 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa3f [unknown] ([unknown]) => 7f8e86e8fc18 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fc20 [unknown] ([unknown]) => 7f8e86e8fc40 [unknown] ([unknown])
The synthesized records looks sane:
[root@zoo ~]# perf report -D | grep PERF_RECORD_ | tail -150x36f8 [0x78]: PERF_RECORD_MMAP -1/0: [0xffffffffa0933000(0x5000) @ 0]: x /lib/modules/4.1.0-rc5+/kernel/net/netfilter/xt_CHECKSUM.ko 0x3770 [0x68]: PERF_RECORD_MMAP -1/0: [0xffffffffa0938000(0x18000) @ 0]: x /lib/modules/4.1.0-rc5+/kernel/fs/fuse/fuse.ko 0x37d8 [0x68]: PERF_RECORD_MMAP -1/0: [0xffffffffa0950000(0x5f6affff) @ 0]: x /lib/modules/4.1.0-rc5+/kernel/crypto/ccm.ko 0x3840 [0x20]: PERF_RECORD_ITRACE_START pid: 8676 tid: 86760x3860 [0x28]: PERF_RECORD_COMM exec: sleep:8676/86760x3888 [0x68]: PERF_RECORD_MMAP2 8676/8676: [0x400000(0x6000) @ 0 fd:01 525758 1481335351]: r-xp /usr/bin/sleep 0x38f0 [0x70]: PERF_RECORD_MMAP2 8676/8676: [0x7f8e86e8b000(0x224000) @ 0 fd:01 534148 868528687]: r-xp /usr/lib64/ld-2.20.so 0x3960 [0x60]: PERF_RECORD_MMAP2 8676/8676: [0x7ffdc21d4000(0x2000) @ 0x7ffdc21d4000 00:00 0 0]: ---p [vdso] 0x39c0 [0x70]: PERF_RECORD_MMAP2 8676/8676: [0x7f8e86ace000(0x3bd000) @ 0 fd:01 531160 868528694]: r-xp /usr/lib64/libc-2.20.so 0x3a30 [0x30]: PERF_RECORD_AUX offset: 0 size: 0x80688 flags: 0 []0x3a60 [0x30]: PERF_RECORD_EXIT(8676:8676):(8676:8676)0x3a90 [0x30]: PERF_RECORD_AUX offset: 0x80688 size: 0x3b70 flags: 0 []0x3ac0 [0x30]: PERF_RECORD_EXIT(8676:8676):(8676:8676)0x3af0 [0x30]: PERF_RECORD_AUXTRACE size: 0x841f8 offset: 0 ref: 0x531e5c6921c idx: 0 tid: 8676 cpu: -1 0x87d18 [0x8]: PERF_RECORD_FINISHED_ROUNDAggregated stats: (excludes AUX area (e.g. instruction trace) decoded / synthesized events) [root@zoo ~]#
One of those samples
Quoted 1 line
Quoted 1 line
Quoted 1 line
(
0x7f8e86e8fa3f-0x7f8e86ace000) <0x3bd000
False
After the libc-2.20.so map
Quoted 1 line
Quoted 1 line
Quoted 1 line
(
0x7f8e86e8fa3f-0x7f8e86e8b000) <0x224000
True
Ok, so a /usr/lib64/ld-2.20.so sample, and:
[root@zoo ~]# rpm -q glibc-debuginfo
glibc-debuginfo-2.20-8.fc21.x86_64
But then, it didn't even resolve the DSO, which it should, as I did manually :-/
Will continue investigating... Perhaps this is fixed in another patch? What I have test merged so far is at my tmp.perf/pt branch.
I will still update the cset comments and possibly do some other changes to preserve bisectability or some other fix so that we get more test output inserted in the changesets.
- Arnaldo
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Adrian Hunter
reviewerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Quoted 184 lines · Arnaldo Carvalho de Melo
Em Mon, Jun 22, 2015 at 11:26:34PM +0300, Adrian Hunter escreveu:
Quoted 52 lines · Arnaldo Carvalho de Melo
Quoted 51 lines
Em Fri, Jun 19, 2015 at 04:41:56PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 20 lines
Em Fri, Jun 19, 2015 at 10:33:43PM +0300, Adrian Hunter escreveu:
Quoted 18 lines · Arnaldo Carvalho de Melo
Quoted 17 lines
Em Fri, May 29, 2015 at 04:33:36PM +0300, Adrian Hunter escreveu:
Quoted 8 lines
Add support for Intel Processor Trace.
Intel PT support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel PT PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by cpu or thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
So, at this point what commands should I use to test this? I expected to be able to have some command here, in this changeset log, telling me that what has been applied so far + this "Add Intel PT support", can be used in such and such a fashion, obtaining this and that output.
Now I'll go back and look at the cover letter to see what I can do at this point and with access to a Broadwell class machine.
Quoted 7 lines
Quoted 1 line
Actually you need the next patch "perf tools: Take Intel PT into use" to do anything.
Yeah, saw that, the title of this patch fooled me into thinking that Intel PT support was added :-)
Anyway, stopping for a moment to push stuff ready to Ingo, will get back to this after that.
So, got back to it, added that "take it into use" patch and now trying to follow that documentation:
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# perf report
[root@perf4 ~]# perf record -e intel_pt//u -a sleep 10 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.379 MB perf.data ] [root@perf4 ~]#
[root@perf4 ~]#
[root@perf4 ~]# perf report
[root@perf4 ~]# perf evlist
intel_pt//u
sched:sched_switch
dummy:u
[root@perf4 ~]# uname -r
4.1.0-rc8
[root@perf4 ~]#Quoted 5 lines
Quoted 1 line
I am not getting any "intel_pt//u" event, ideas?
Events are synthesized by the decoder. You should see 'instructions:u' events.
What does perf report --stdio give?
Well, away from a Broadwell machine now, applied a few patches more and I'm now trying BTS, on this Ivy Bridge notebook (MacBook Air):
[ 0.000000] DMI: Apple Inc. MacBookAir5,1/Mac-66F35F19FE2A0D05, BIOS MBA51.88Z.00EF.B02.1211271028 11/27/2012[ 0.116644] perf_event_intel: PMU erratum BJ122, BV98, HSD29 worked around, HT is on[ 0.061626] TSC deadline timer enabled [ 0.061630] smpboot: CPU0: Intel(R) Core(TM) i7-3667U CPU @ 2.00GHz (fam: 06, model: 3a, stepping: 09) [ 0.061661] Performance Events: PEBS fmt1+, 16-deep LBR, IvyBridge events, full-width counters, Intel PMU driver. [ 0.061685] ... version: 3 [ 0.061686] ... bit width: 48 [ 0.061687] ... generic registers: 4 [ 0.061688] ... value mask: 0000ffffffffffff [ 0.061690] ... max period: 0000ffffffffffff [ 0.061691] ... fixed-purpose events: 3 [ 0.061692] ... event mask: 000000070000000f [ 0.062587] x86: Booting SMP configuration: [ 0.062589] .... node #0, CPUs: #1 [ 0.074078] microcode: CPU1 microcode updated early to revision 0x1b, date = 2014-05-29 [ 0.076715] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. [ 0.076825] #2 #3 [ 0.104559] x86: Booted up 1 node, 4 CPUs [ 0.104563] smpboot: Total of 4 processors activated (19953.49 BogoMIPS)[root@zoo ~]# perf record -e intel_bts//u --per-thread sleep 5 [ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.531 MB perf.data ] [root@zoo ~]# perf evlist
intel_bts//u
dummy:u
[root@zoo ~]#[root@zoo ~]# perf report --stdio | head -40
# To display the perf.data header info, please use --header/--header-only options. #
#
# Total Lost Samples: 0
#
# Samples: 0 of event 'intel_bts//u'
# Event count (approx.): 0
## Overhead Command Shared Object Symbol # ........ ....... ............. ......#
# Samples: 0 of event 'dummy:u'
# Event count (approx.): 0
## Overhead Command Shared Object Symbol # ........ ....... ............. ......#
# Samples: 22K of event 'branches:u'
# Event count (approx.): 22548
## Overhead Command Shared Object Symbol # ........ ....... ................ ...................... # 9.82% sleep [unknown] [.] 0x00007f8e86c09061 8.28% sleep [unknown] [.] 0x00007f8e86ea4e7e 6.97% sleep [unknown] [.] 0x00007f8e86c09086 5.88% sleep [unknown] [.] 0x00007f8e86e95726 5.28% sleep [unknown] [.] 0x00007f8e86e9730d 4.69% sleep [unknown] [.] 0x00007f8e86b06bc1 4.48% sleep [unknown] [.] 0x00007f8e86c090c7 4.01% sleep [unknown] [.] 0x00007f8e86c09027 4.01% sleep [unknown] [.] 0x00007f8e86c0904c 2.84% sleep [unknown] [.] 0x00007f8e86c0908c 2.74% sleep [unknown] [.] 0x00007f8e86c0909d 2.74% sleep [unknown] [.] 0x00007f8e86c09037 1.20% sleep [unknown] [.] 0x00007f8e86af9c68-----------------------------------------------------------------
Ok, so it synthesized the branches:u, that don't appear on the 'perf evlist' output, that is the command I use to see what kinds of events are contained in a given perf.data file, probably we should add a note there that branches:u will be synthesized at 'report' time, trying with 'perf script':
[root@zoo ~]# perf script | head -10
:8676 8676 1 branches:u: ffffffff81799b47 [unknown] ([unknown]) => 7f8e86e8bcf0 [unknown] ([unknown]) :8676 8676 1 branches:u: ffffffff81799b47 [unknown] ([unknown]) => 7f8e86e8bcf0 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8bcf3 [unknown] ([unknown]) => 7f8e86e8f980 [unknown] ([unknown]) :8676 8676 1 branches:u: ffffffff81799b47 [unknown] ([unknown]) => 7f8e86e8f9a6 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa11 [unknown] ([unknown]) => 7f8e86e8fa2f [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa33 [unknown] ([unknown]) => 7f8e86e8fa18 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa33 [unknown] ([unknown]) => 7f8e86e8fa18 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fa3f [unknown] ([unknown]) => 7f8e86e8fc18 [unknown] ([unknown]) :8676 8676 1 branches:u: 7f8e86e8fc20 [unknown] ([unknown]) => 7f8e86e8fc40 [unknown] ([unknown])The synthesized records looks sane:
[root@zoo ~]# perf report -D | grep
PERF_RECORD_| tail -150x36f8[0x78]:PERF_RECORD_MMAP-1/0: [0xffffffffa0933000(0x5000) @ 0]: x/lib/modules/4.1.0-rc5+/kernel/net/netfilter/xt_CHECKSUM.ko0x3770[0x68]:PERF_RECORD_MMAP-1/0: [0xffffffffa0938000(0x18000) @ 0]: x/lib/modules/4.1.0-rc5+/kernel/fs/fuse/fuse.ko0x37d8[0x68]:PERF_RECORD_MMAP-1/0: [0xffffffffa0950000(0x5f6affff) @ 0]: x/lib/modules/4.1.0-rc5+/kernel/crypto/ccm.ko0x3840[0x20]:PERF_RECORD_ITRACE_STARTpid: 8676 tid: 86760x3860[0x28]:PERF_RECORD_COMMexec: sleep:8676/86760x3888[0x68]:PERF_RECORD_MMAP28676/8676: [0x400000(0x6000) @ 0 fd:01 525758 1481335351]: r-xp/usr/bin/sleep0x38f0[0x70]:PERF_RECORD_MMAP28676/8676: [0x7f8e86e8b000(0x224000) @ 0 fd:01 534148 868528687]: r-xp/usr/lib64/ld-2.20.so0x3960[0x60]:PERF_RECORD_MMAP28676/8676: [0x7ffdc21d4000(0x2000) @0x7ffdc21d400000:00 0 0]: ---p [vdso]0x39c0[0x70]:PERF_RECORD_MMAP28676/8676: [0x7f8e86ace000(0x3bd000) @ 0 fd:01 531160 868528694]: r-xp/usr/lib64/libc-2.20.so0x3a30[0x30]:PERF_RECORD_AUXoffset: 0 size:0x80688flags: 0 []0x3a60[0x30]: PERF_RECORD_EXIT(8676:8676):(8676:8676)0x3a90[0x30]:PERF_RECORD_AUXoffset:0x80688size:0x3b70flags: 0 []0x3ac0[0x30]: PERF_RECORD_EXIT(8676:8676):(8676:8676)0x3af0[0x30]:PERF_RECORD_AUXTRACEsize:0x841f8offset: 0 ref:0x531e5c6921cidx: 0 tid: 8676 cpu: -10x87d18[0x8]:PERF_RECORD_FINISHED_ROUNDAggregatedstats: (excludes AUX area (e.g. instruction trace) decoded / synthesized events) [root@zoo ~]#One of those samples
Quoted 1 line
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(
0x7f8e86e8fa3f-0x7f8e86ace000) <0x3bd000False
After the libc-2.20.so map
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(
0x7f8e86e8fa3f-0x7f8e86e8b000) <0x224000True
Ok, so a
/usr/lib64/ld-2.20.sosample, and:
Quoted 7 lines
[root@zoo ~]# rpm -q glibc-debuginfo
glibc-debuginfo-2.20-8.fc21.x86_64But then, it didn't even resolve the DSO, which it should, as I did manually :-/
Will continue investigating... Perhaps this is fixed in another patch? What I have test merged so far is at my tmp.perf/pt branch.
I tried the same commands with perf tools from that branch (tmp.perf/pt) and it seemed to work fine.
One reason for not getting symbols is compiling perf tools without ELF support.
Quoted 4 lines
I will still update the cset comments and possibly do some other changes to preserve bisectability or some other fix so that we get more test output inserted in the changesets.
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Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Tue, Jun 23, 2015 at 09:29:34AM +0300, Adrian Hunter escreveu:
Quoted 6 lines · Arnaldo Carvalho de Melo
Quoted 4 lines
[root@zoo ~]# rpm -q glibc-debuginfo
glibc-debuginfo-2.20-8.fc21.x86_64But then, it didn't even resolve the DSO, which it should, as I did manually :-/
Quoted 7 lines
Quoted 2 lines
Will continue investigating... Perhaps this is fixed in another patch? What I have test merged so far is at my tmp.perf/pt branch.
I tried the same commands with perf tools from that branch (tmp.perf/pt) and it seemed to work fine.
One reason for not getting symbols is compiling perf tools without ELF support.
sure, but that is not the case here. But yeah, I'll try and triple check everything, next time will add the list of features detected to the problem report, so that you know which features were detected.
- Arnaldo
Adrian Hunter
reviewerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Quoted 10 lines · Arnaldo Carvalho de Melo
Em Tue, Jun 23, 2015 at 09:29:34AM +0300, Adrian Hunter escreveu:
Quoted 8 lines · Arnaldo Carvalho de Melo
Quoted 7 lines
[root@zoo ~]# rpm -q glibc-debuginfo
glibc-debuginfo-2.20-8.fc21.x86_64But then, it didn't even resolve the DSO, which it should, as I did manually :-/
Will continue investigating... Perhaps this is fixed in another patch? What I have test merged so far is at my tmp.perf/pt branch.
Quoted 8 lines
Quoted 4 lines
I tried the same commands with perf tools from that branch (tmp.perf/pt) and it seemed to work fine.
One reason for not getting symbols is compiling perf tools without ELF support.
sure, but that is not the case here. But yeah, I'll try and triple check everything, next time will add the list of features detected to the problem report, so that you know which features were detected.
How is it going?
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Thu, Jun 25, 2015 at 04:37:01PM +0300, Adrian Hunter escreveu:
Quoted 14 lines · Arnaldo Carvalho de Melo
Quoted 13 lines
Em Tue, Jun 23, 2015 at 09:29:34AM +0300, Adrian Hunter escreveu:
Quoted 11 lines · Arnaldo Carvalho de Melo
Quoted 7 lines
[root@zoo ~]# rpm -q glibc-debuginfo
glibc-debuginfo-2.20-8.fc21.x86_64But then, it didn't even resolve the DSO, which it should, as I did manually :-/
Will continue investigating... Perhaps this is fixed in another patch? What I have test merged so far is at my tmp.perf/pt branch.
I tried the same commands with perf tools from that branch (tmp.perf/pt) and it seemed to work fine.
Quoted 7 lines
Quoted 5 lines
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One reason for not getting symbols is compiling perf tools without ELF support.
sure, but that is not the case here. But yeah, I'll try and triple check everything, next time will add the list of features detected to the problem report, so that you know which features were detected.
How is it going?
Yesterday was a holiday here, so no progress, will let you know when I make some.
- Arnaldo
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Thu, Jun 25, 2015 at 10:45:57AM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 17 lines
Em Thu, Jun 25, 2015 at 04:37:01PM +0300, Adrian Hunter escreveu:
Quoted 16 lines · Arnaldo Carvalho de Melo
Quoted 15 lines
Em Tue, Jun 23, 2015 at 09:29:34AM +0300, Adrian Hunter escreveu:
Quoted 13 lines · Arnaldo Carvalho de Melo
Quoted 7 lines
[root@zoo ~]# rpm -q glibc-debuginfo
glibc-debuginfo-2.20-8.fc21.x86_64But then, it didn't even resolve the DSO, which it should, as I did manually :-/
Will continue investigating... Perhaps this is fixed in another patch? What I have test merged so far is at my tmp.perf/pt branch.
I tried the same commands with perf tools from that branch (tmp.perf/pt) and it seemed to work fine.
One reason for not getting symbols is compiling perf tools without ELF support.
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines
sure, but that is not the case here. But yeah, I'll try and triple check everything, next time will add the list of features detected to the problem report, so that you know which features were detected.
How is it going?
Yesterday was a holiday here, so no progress, will let you know when I make some.
So, now using the 4.1+ kernel, and the results seems to be the expected ones for intel_bts//u:
[root@zoo ~]# perf record --per-thread -e intel_bts//u ls
anaconda-ks.cfg b bin lib64 libexec new old perf.data
perf.data.old stream_test tg.run
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 1.274 MB perf.data ]
[root@zoo ~]# perf report
[root@zoo ~]# perf evlist
intel_bts//u
dummy:u
[root@zoo ~]# perf report --stdio
# To display the perf.data header info, please use --header/--header-only options. #
# Total Lost Samples: 0
#
# Samples: 0 of event 'intel_bts//u'
# Event count (approx.): 0
#
# Overhead Command Shared Object Symbol # ........ ....... ............. ......
# Samples: 0 of event 'dummy:u'
# Event count (approx.): 0
#
# Overhead Command Shared Object Symbol # ........ ....... ............. ......
# Samples: 55K of event 'branches:u'
# Event count (approx.): 55012
#
# Overhead Command Shared Object Symbol
# ........ ....... .................. ......................................
#
15.73% ls ld-2.20.so [.] strcmp
15.63% ls libc-2.20.so [.] _dl_addr
10.08% ls ld-2.20.so [.] do_lookup_x
7.00% ls ld-2.20.so [.] _dl_name_match_p
6.47% ls ld-2.20.so [.] _dl_lookup_symbol_x
4.96% ls ld-2.20.so [.] _dl_relocate_object
2.97% ls ls [.] quotearg_buffer_restyled
2.79% ls libc-2.20.so [.] getenv
1.95% ls ld-2.20.so [.] _dl_cache_libcmp
1.76% ls ld-2.20.so [.] check_match.isra.0
1.64% ls libc-2.20.so [.] __memmove_sse2
1.47% ls ld-2.20.so [.] _dl_map_object_deps
1.27% ls ld-2.20.so [.] _dl_map_object_from_fd
1.17% ls ls [.] quote_name ---------------------------------------------------------------------
Will do the same tests with intel_pt as well, on a remote machine, add examples to the changeset logs and everything going well, aim for pushing for Ingo soon,
Thanks,
- Arnaldo
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Thu, Jun 25, 2015 at 08:56:34PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 2 lines
Will do the same tests with
intel_ptas well, on a remote machine, add examples to the changeset logs and everything going well, aim for pushing for Ingo soon,
So, I asked for callchains, with:
perf record -g -e intel_bts// ls
And it got stuck somewhere, then I did a perf top to see where it was, and got to:
96.24% perf [.] intel_bts_process_queue
Annotating I get to:
1.17 │1a0:┌─→mov 0x8(%r13),%rdx
│ │ test %rdx,%rdx
98.83 │ └──je 1a0Which is an endless loop! Source code for intel_bts_process_buffer(), inlined there:
while (sz > sizeof(struct branch)) {
if (!branch->from && !branch->to)
continue;
err = intel_bts_synth_branch_sample(btsq, branch);
if (err)
break;
branch += 1;
sz -= sizeof(struct branch);
}Can you fix this, please, so that I can fold it into where it was introduced, namely:
commit 439ad895a2aecea09416206f023336297cc72efe
Author: Adrian Hunter <[email protected]> Date: Fri May 29 16:33:39 2015 +0300
perf tools: Add Intel BTS support
- Arnaldo
Adrian Hunter
reviewerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Quoted 33 lines · Arnaldo Carvalho de Melo
Em Thu, Jun 25, 2015 at 08:56:34PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 2 lines
Will do the same tests with
intel_ptas well, on a remote machine, add examples to the changeset logs and everything going well, aim for pushing for Ingo soon,So, I asked for callchains, with:
perf record -g -e intel_bts// ls
And it got stuck somewhere, then I did a perf top to see where it was, and got to:
96.24% perf [.]
intel_bts_process_queueAnnotating I get to:
1.17 │1a0:┌─→mov 0x8(%r13),%rdx │ │ test %rdx,%rdx 98.83 │ └──je 1a0Which is an endless loop! Source code for
intel_bts_process_buffer(), inlined there:while (sz > sizeof(struct branch)) { if (!branch->from && !branch->to) continue; err = intel_bts_synth_branch_sample(btsq, branch); if (err) break; branch += 1; sz -= sizeof(struct branch); }
Quoted 8 lines
Can you fix this, please, so that I can fold it into where it was introduced, namely:
commit
439ad895a2aecea09416206f023336297cc72efeAuthor: Adrian Hunter <[email protected]> Date: Fri May 29 16:33:39 2015 +0300perf tools: Add Intel BTS support
It is fixed as an unexpected side-effect of a following patch (which is probably why I didn't notice it - or perhaps I rolled the fix into the wrong patch O_o). The fix is in:
perf tools: Output sample flags and insn_len from intel_bts
intel_bts synthesizes samples. Fill in the new flags and insn_len members with instruction information.
So what you want is:
tools/perf/util/intel-bts.c +2 -4
@@ -304,7 +304,7 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq, struct auxtrace_buffer *buffer) {struct branch *branch; -size_t sz; +size_t sz, bsz =sizeof (struct branch );int err =0 ;if (buffer->use_data) {
@@ -318,14 +318,12 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq,if (!btsq->bts->sample_branches)return 0 ; -while (sz >sizeof (struct branch )) { +for (; sz > bsz; branch +=1 , sz -= bsz) {if (!branch->from && !branch->to)continue ; err =intel_bts_synth_branch_sample (btsq, branch);if (err)break ; - branch +=1 ; - sz -=sizeof (struct branch ); }return err; }
But obviously that will conflict with "perf tools: Output sample flags and insn_len from intel_bts"
Another thing, the intel_bts implementation does not support "instructions" samples because there is no timing information to use to create periodic samples. But callchains are added only to "instructions" samples so there are no callchains in 'perf report' for intel_bts. The call information is still available for db-export and the example call-graph, though.
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Fri, Jun 26, 2015 at 09:48:20AM +0300, Adrian Hunter escreveu:
Quoted 87 lines · Arnaldo Carvalho de Melo
Quoted 33 lines
Em Thu, Jun 25, 2015 at 08:56:34PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 2 lines
Will do the same tests with
intel_ptas well, on a remote machine, add examples to the changeset logs and everything going well, aim for pushing for Ingo soon,So, I asked for callchains, with:
perf record -g -e intel_bts// ls
And it got stuck somewhere, then I did a perf top to see where it was, and got to:
96.24% perf [.]
intel_bts_process_queueAnnotating I get to:
1.17 │1a0:┌─→mov 0x8(%r13),%rdx │ │ test %rdx,%rdx 98.83 │ └──je 1a0Which is an endless loop! Source code for
intel_bts_process_buffer(), inlined there:while (sz > sizeof(struct branch)) { if (!branch->from && !branch->to) continue; err = intel_bts_synth_branch_sample(btsq, branch); if (err) break; branch += 1; sz -= sizeof(struct branch); }Quoted 8 lines
Can you fix this, please, so that I can fold it into where it was introduced, namely:
commit
439ad895a2aecea09416206f023336297cc72efeAuthor: Adrian Hunter <[email protected]> Date: Fri May 29 16:33:39 2015 +0300perf tools: Add Intel BTS support
It is fixed as an unexpected side-effect of a following patch (which is probably why I didn't notice it - or perhaps I rolled the fix into the wrong patch
O_o). The fix is in:perf tools: Output sample flags and
insn_lenfromintel_bts
intel_btssynthesizes samples. Fill in the new flags andinsn_lenmembers with instruction information.Signed-off-by Adrian Hunter <[email protected]>So what you want is:
tools/perf/util/intel-bts.c +2
-4@@ -304,7 +304,7 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq, struct auxtrace_buffer *buffer) {struct branch *branch; -size_t sz; +size_t sz, bsz =sizeof (struct branch );int err =0 ;if (buffer->use_data) {@@ -318,14 +318,12 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq,if (!btsq->bts->sample_branches)return 0 ; -while (sz >sizeof (struct branch )) { +for (; sz > bsz; branch +=1 , sz -= bsz) {if (!branch->from && !branch->to)continue ; err =intel_bts_synth_branch_sample (btsq, branch);if (err)break ; - branch +=1 ; - sz -=sizeof (struct branch ); }return err; }
Quoted 1 line
But obviously that will conflict with "perf tools: Output sample flags and
insn_lenfromintel_bts"
I can fix those things up, to keep it bisectable, next time please try to do it this way :-)
Quoted 5 lines
Another thing, the
intel_btsimplementation does not support "instructions" samples because there is no timing information to use to create periodic samples. But callchains are added only to "instructions" samples so there are no callchains in 'perf report' forintel_bts. The call information is still available for
Humm, so IOW, what you say is that we should refuse to run 'record' when asking for callchains and intel_bts?
Quoted 1 line
db-export and the example call-graph, though.
- Arnaldo
Adrian Hunter
reviewerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Quoted 8 lines · Arnaldo Carvalho de Melo
Quoted 5 lines
Another thing, the
intel_btsimplementation does not support "instructions" samples because there is no timing information to use to create periodic samples. But callchains are added only to "instructions" samples so there are no callchains in 'perf report' forintel_bts. The call information is still available forHumm, so IOW, what you say is that we should refuse to run 'record' when asking for callchains and
intel_bts?
'record' can record other events at the same time which can have callchains. e.g.
perf record -g --per-thread -e intel_bts//u,branch-misses:u ls
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
Em Fri, Jun 26, 2015 at 04:47:39PM +0300, Adrian Hunter escreveu:
Quoted 7 lines · Arnaldo Carvalho de Melo
Quoted 6 lines
Quoted 5 lines
Another thing, the
intel_btsimplementation does not support "instructions" samples because there is no timing information to use to create periodic samples. But callchains are added only to "instructions" samples so there are no callchains in 'perf report' forintel_bts. The call information is still available for
Quoted 7 lines
Quoted 2 lines
Humm, so IOW, what you say is that we should refuse to run 'record' when asking for callchains and
intel_bts?'record' can record other events at the same time which can have callchains. e.g.
perf record -g --per-thread -e intel_bts//u,branch-misses:u ls
Right, what I was trying to say is that there are combinations where one can ask for a callchain in record, it will act as if it did what was asked for but then when report runs, no callchain will be available.
I guess we can check for that situation and warn the user.
- Arnaldo
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 08/17] perf tools: Add Intel PT support
In reply to Adrian HunterEm Fri, Jun 26, 2015 at 09:48:20AM +0300, Adrian Hunter escreveu:
Quoted 47 lines · Arnaldo Carvalho de Melo
Quoted 33 lines
Em Thu, Jun 25, 2015 at 08:56:34PM -0300, Arnaldo Carvalho de Melo escreveu:
Quoted 2 lines
Will do the same tests with
intel_ptas well, on a remote machine, add examples to the changeset logs and everything going well, aim for pushing for Ingo soon,So, I asked for callchains, with:
perf record -g -e intel_bts// ls
And it got stuck somewhere, then I did a perf top to see where it was, and got to:
96.24% perf [.]
intel_bts_process_queueAnnotating I get to:
1.17 │1a0:┌─→mov 0x8(%r13),%rdx │ │ test %rdx,%rdx 98.83 │ └──je 1a0Which is an endless loop! Source code for
intel_bts_process_buffer(), inlined there:while (sz > sizeof(struct branch)) { if (!branch->from && !branch->to) continue; err = intel_bts_synth_branch_sample(btsq, branch); if (err) break; branch += 1; sz -= sizeof(struct branch); }Quoted 8 lines
Can you fix this, please, so that I can fold it into where it was introduced, namely:
commit
439ad895a2aecea09416206f023336297cc72efeAuthor: Adrian Hunter <[email protected]> Date: Fri May 29 16:33:39 2015 +0300perf tools: Add Intel BTS support
It is fixed as an unexpected side-effect of a following patch (which is probably why I didn't notice it - or perhaps I rolled the fix into the wrong patch
O_o). The fix is in:perf tools: Output sample flags and
insn_lenfromintel_bts
Quoted 7 lines
intel_btssynthesizes samples. Fill in the new flags andinsn_lenmembers with instruction information.Signed-off-by Adrian Hunter <[email protected]>So what you want is:
Ok, folded that, fixed the problem, moving on...
- Arnaldo
Adrian Hunter
reviewerPATCH v6 9/17 perf tools: Take Intel PT into use
In reply to Adrian HunterTo record an AUX area, the weak function auxtrace_record__init() must be implemented.
Equally to decode an AUX area, the AUX area tracing type must be added to the perf_event__process_auxtrace_info() function.
This patch makes those two changes plus hooks up default config for the intel_pt PMU. Also some brief documentation is provided for using the tools with intel_pt.
--- tools/perf/Documentation/intel-pt.txt | 588 ++++++++++++++++++++++++++++++++++ tools/perf/arch/x86/util/Build | 2 + tools/perf/arch/x86/util/auxtrace.c | 38 +++ tools/perf/arch/x86/util/pmu.c | 15 + tools/perf/util/auxtrace.c | 5 +- tools/perf/util/pmu.c | 4 +- 6 files changed, 649 insertions(+), 3 deletions(-) create mode 100644 tools/perf/Documentation/intel-pt.txt create mode 100644 tools/perf/arch/x86/util/auxtrace.c create mode 100644 tools/perf/arch/x86/util/pmu.c
tools/perf/Documentation/intel-pt.txt new file +588 -0
@@ -0,0 +1,588 @@ +Intel Processor Trace +===================== + +Overview +======== + +Intel Processor Trace (Intel PT) is an extension of Intel Architecture that +collects information about software execution such as control flow, execution +modes and timings and formats it into highly compressed binary packets. +Technical details are documented in the Intel 64 and IA-32 Architectures +Software Developer Manuals, Chapter 36 Intel Processor Trace. + +Intel PT is first supported in Intel Core M and 5th generation Intel Core +processors that are based on the Intel micro-architecture code name Broadwell. + +Trace data is collected by 'perf record' and stored within the perf.data file. +See below for options to 'perf record'. + +Trace data must be 'decoded' which involves walking the object code and matching +the trace data packets. For example a TNT packet only tells whether a +conditional branch was taken or not taken, so to make use of that packet the +decoder must know precisely which instruction was being executed. + +Decoding is done on-the-fly. The decoder outputs samples in the same format as +samples output by perf hardware events, for example as though the "instructions" +or "branches" events had been recorded. Presently 3 tools support this: +'perf script', 'perf report' and 'perf inject'. See below for more information +on using those tools. + +The main distinguishing feature of Intel PT is that the decoder can determine +the exact flow of software execution. Intel PT can be used to understand why +and how did software get to a certain point, or behave a certain way. The +software does not have to be recompiled, so Intel PT works with debug or release +builds, however the executed images are needed - which makes use in JIT-compiled +environments, or with self-modified code, a challenge. Also symbols need to be +provided to make sense of addresses. + +A limitation of Intel PT is that it produces huge amounts of trace data +(hundreds of megabytes per second per core) which takes a long time to decode, +for example two or three orders of magnitude longer than it took to collect. +Another limitation is the performance impact of tracing, something that will +vary depending on the use-case and architecture. + + +Quickstart +========== + +It is important to start small. That is because it is easy to capture vastly +more data than can possibly be processed. + +The simplest thing to do with Intel PT is userspace profiling of small programs. +Data is captured with 'perf record' e.g. to trace 'ls' userspace-only: + + perf record -e intel_pt//u ls + +And profiled with 'perf report' e.g. + + perf report + +To also trace kernel space presents a problem, namely kernel self-modifying +code. A fairly good kernel image is available in /proc/kcore but to get an +accurate image a copy of /proc/kcore needs to be made under the same conditions +as the data capture. A script perf-with-kcore can do that, but beware that the +script makes use of 'sudo' to copy /proc/kcore. If you have perf installed +locally from the source tree you can do: + + ~/libexec/perf-core/perf-with-kcore record pt_ls -e intel_pt// -- ls + +which will create a directory named 'pt_ls' and put the perf.data file and +copies of /proc/kcore, /proc/kallsyms and /proc/modules into it. Then to use +'perf report' becomes: + + ~/libexec/perf-core/perf-with-kcore report pt_ls + +Because samples are synthesized after-the-fact, the sampling period can be +selected for reporting. e.g. sample every microsecond + + ~/libexec/perf-core/perf-with-kcore report pt_ls --itrace=i1usge + +See the sections below for more information about the --itrace option. + +Beware the smaller the period, the more samples that are produced, and the +longer it takes to process them. + +Also note that the coarseness of Intel PT timing information will start to +distort the statistical value of the sampling as the sampling period becomes +smaller. + +To represent software control flow, "branches" samples are produced. By default +a branch sample is synthesized for every single branch. To get an idea what +data is available you can use the 'perf script' tool with no parameters, which +will list all the samples. + + perf record -e intel_pt//u ls + perf script + +An interesting field that is not printed by default is 'flags' which can be +displayed as follows: + + perf script -Fcomm,tid,pid,time,cpu,event,trace,ip,sym,dso,addr,symoff,flags + +The flags are "bcrosyiABEx" which stand for branch, call, return, conditional, +system, asynchronous, interrupt, transaction abort, trace begin, trace end, and +in transaction, respectively. + +While it is possible to create scripts to analyze the data, an alternative +approach is available to export the data to a postgresql database. Refer to +script export-to-postgresql.py for more details, and to script +call-graph-from-postgresql.py for an example of using the database. + +As mentioned above, it is easy to capture too much data. One way to limit the +data captured is to use 'snapshot' mode which is explained further below. +Refer to 'new snapshot option' and 'Intel PT modes of operation' further below. + +Another problem that will be experienced is decoder errors. They can be caused +by inability to access the executed image, self-modified or JIT-ed code, or the +inability to match side-band information (such as context switches and mmaps) +which results in the decoder not knowing what code was executed. + +There is also the problem of perf not being able to copy the data fast enough, +resulting in data lost because the buffer was full. See 'Buffer handling' below +for more details. + + +perf record +=========== + +new event +--------- + +The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are +selected by providing the PMU name followed by the "config" separated by slashes. +An enhancement has been made to allow default "config" e.g. the option + + -e intel_pt// + +will use a default config value. Currently that is the same as + + -e intel_pt/tsc,noretcomp=0/ + +which is the same as + + -e intel_pt/tsc=1,noretcomp=0/ + +The config terms are listed in /sys/devices/intel_pt/format. They are bit +fields within the config member of the struct perf_event_attr which is +passed to the kernel by the perf_event_open system call. They correspond to bit +fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions: + + $ for f in `ls /sys/devices/intel_pt/format`;do + > echo $f + > cat /sys/devices/intel_pt/format/$f + > done + noretcomp + config:11 + tsc + config:10 + +Note that the default config must be overridden for each term i.e. + + -e intel_pt/noretcomp=0/ + +is the same as: + + -e intel_pt/tsc=1,noretcomp=0/ + +So, to disable TSC packets use: + + -e intel_pt/tsc=0/ + +It is also possible to specify the config value explicitly: + + -e intel_pt/config=0x400/ + +Note that, as with all events, the event is suffixed with event modifiers: + + u userspace + k kernel + h hypervisor + G guest + H host + p precise ip + +'h', 'G' and 'H' are for virtualization which is not supported by Intel PT. +'p' is also not relevant to Intel PT. So only options 'u' and 'k' are +meaningful for Intel PT. + +perf_event_attr is displayed if the -vv option is used e.g. + + ------------------------------------------------------------ + perf_event_attr: + type 6 + size 112 + config 0x400 + { sample_period, sample_freq } 1 + sample_type IP|TID|TIME|CPU|IDENTIFIER + read_format ID + disabled 1 + inherit 1 + exclude_kernel 1 + exclude_hv 1 + enable_on_exec 1 + sample_id_all 1 + ------------------------------------------------------------ + sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 + ------------------------------------------------------------ + + +new snapshot option +------------------- + +To select snapshot mode a new option has been added: + + -S + +Optionally it can be followed by the snapshot size e.g. + + -S0x100000 + +The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size +nor snapshot size is specified, then the default is 4MiB for privileged users +(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. +If an unprivileged user does not specify mmap pages, the mmap pages will be +reduced as described in the 'new auxtrace mmap size option' section below. + +The snapshot size is displayed if the option -vv is used e.g. + + Intel PT snapshot size: %zu + + +new auxtrace mmap size option +--------------------------- + +Intel PT buffer size is specified by an addition to the -m option e.g. + + -m,16 + +selects a buffer size of 16 pages i.e. 64KiB. + +Note that the existing functionality of -m is unchanged. The auxtrace mmap size +is specified by the optional addition of a comma and the value. + +The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users +(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. +If an unprivileged user does not specify mmap pages, the mmap pages will be +reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the +user is likely to get an error as they exceed their mlock limit (Max locked +memory as shown in /proc/self/limits). Note that perf does not count the first +512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu +against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus +their mlock limit (which defaults to 64KiB but is not multiplied by the number +of cpus). + +In full-trace mode, powers of two are allowed for buffer size, with a minimum +size of 2 pages. In snapshot mode, it is the same but the minimum size is +1 page. + +The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g. + + mmap length 528384 + auxtrace mmap length 4198400 + + +Intel PT modes of operation +--------------------------- + +Intel PT can be used in 2 modes: + full-trace mode + snapshot mode + +Full-trace mode traces continuously e.g. + + perf record -e intel_pt//u uname + +Snapshot mode captures the available data when a signal is sent e.g. + + perf record -v -e intel_pt//u -S ./loopy 1000000000 & + [1] 11435 + kill -USR2 11435 + Recording AUX area tracing snapshot + +Note that the signal sent is SIGUSR2. +Note that "Recording AUX area tracing snapshot" is displayed because the -v +option is used. + +The 2 modes cannot be used together. + + +Buffer handling +--------------- + +There may be buffer limitations (i.e. single ToPa entry) which means that actual +buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to +provide other sizes, and in particular an arbitrarily large size, multiple +buffers are logically concatenated. However an interrupt must be used to switch +between buffers. That has two potential problems: + a) the interrupt may not be handled in time so that the current buffer + becomes full and some trace data is lost. + b) the interrupts may slow the system and affect the performance + results. + +If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event +which the tools report as an error. + +In full-trace mode, the driver waits for data to be copied out before allowing +the (logical) buffer to wrap-around. If data is not copied out quickly enough, +again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to +wait, the intel_pt event gets disabled. Because it is difficult to know when +that happens, perf tools always re-enable the intel_pt event after copying out +data. + + +Intel PT and build ids +---------------------- + +By default "perf record" post-processes the event stream to find all build ids +for executables for all addresses sampled. Deliberately, Intel PT is not +decoded for that purpose (it would take too long). Instead the build ids for +all executables encountered (due to mmap, comm or task events) are included +in the perf.data file. + +To see buildids included in the perf.data file use the command: + + perf buildid-list + +If the perf.data file contains Intel PT data, that is the same as: + + perf buildid-list --with-hits + + +Snapshot mode and event disabling +--------------------------------- + +In order to make a snapshot, the intel_pt event is disabled using an IOCTL, +namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the +collection of side-band information. In order to prevent that, a dummy +software event has been introduced that permits tracking events (like mmaps) to +continue to be recorded while intel_pt is disabled. That is important to ensure +there is complete side-band information to allow the decoding of subsequent +snapshots. + +A test has been created for that. To find the test: + + perf test list + ... + 23: Test using a dummy software event to keep tracking + +To run the test: + + perf test 23 + 23: Test using a dummy software event to keep tracking : Ok + + +perf record modes (nothing new here) +------------------------------------ + +perf record essentially operates in one of three modes: + per thread + per cpu + workload only + +"per thread" mode is selected by -t or by --per-thread (with -p or -u or just a +workload). +"per cpu" is selected by -C or -a. +"workload only" mode is selected by not using the other options but providing a +command to run (i.e. the workload). + +In per-thread mode an exact list of threads is traced. There is no inheritance. +Each thread has its own event buffer. + +In per-cpu mode all processes (or processes from the selected cgroup i.e. -G +option, or processes selected with -p or -u) are traced. Each cpu has its own +buffer. Inheritance is allowed. + +In workload-only mode, the workload is traced but with per-cpu buffers. +Inheritance is allowed. Note that you can now trace a workload in per-thread +mode by using the --per-thread option. + + +Privileged vs non-privileged users +---------------------------------- + +Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users +have memory limits imposed upon them. That affects what buffer sizes they can +have as outlined above. + +Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are +not permitted to use tracepoints which means there is insufficient side-band +information to decode Intel PT in per-cpu mode, and potentially workload-only +mode too if the workload creates new processes. + +Note also, that to use tracepoints, read-access to debugfs is required. So if +debugfs is not mounted or the user does not have read-access, it will again not +be possible to decode Intel PT in per-cpu mode. + + +sched_switch tracepoint +----------------------- + +The sched_switch tracepoint is used to provide side-band data for Intel PT +decoding. sched_switch events are automatically added. e.g. the second event +shown below + + $ perf record -vv -e intel_pt//u uname + ------------------------------------------------------------ + perf_event_attr: + type 6 + size 112 + config 0x400 + { sample_period, sample_freq } 1 + sample_type IP|TID|TIME|CPU|IDENTIFIER + read_format ID + disabled 1 + inherit 1 + exclude_kernel 1 + exclude_hv 1 + enable_on_exec 1 + sample_id_all 1 + ------------------------------------------------------------ + sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 + ------------------------------------------------------------ + perf_event_attr: + type 2 + size 112 + config 0x108 + { sample_period, sample_freq } 1 + sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER + read_format ID + inherit 1 + sample_id_all 1 + exclude_guest 1 + ------------------------------------------------------------ + sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8 + sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8 + sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8 + sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8 + ------------------------------------------------------------ + perf_event_attr: + type 1 + size 112 + config 0x9 + { sample_period, sample_freq } 1 + sample_type IP|TID|TIME|IDENTIFIER + read_format ID + disabled 1 + inherit 1 + exclude_kernel 1 + exclude_hv 1 + mmap 1 + comm 1 + enable_on_exec 1 + task 1 + sample_id_all 1 + mmap2 1 + comm_exec 1 + ------------------------------------------------------------ + sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 + sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 + mmap size 528384B + AUX area mmap length 4194304 + perf event ring buffer mmapped per cpu + Synthesizing auxtrace information + Linux + [ perf record: Woken up 1 times to write data ] + [ perf record: Captured and wrote 0.042 MB perf.data ] + +Note, the sched_switch event is only added if the user is permitted to use it +and only in per-cpu mode. + +Note also, the sched_switch event is only added if TSC packets are requested. +That is because, in the absence of timing information, the sched_switch events +cannot be matched against the Intel PT trace. + + +perf script +=========== + +By default, perf script will decode trace data found in the perf.data file. +This can be further controlled by new option --itrace. + + +New --itrace option +------------------- + +Having no option is the same as + + --itrace + +which, in turn, is the same as + + --itrace=ibxe + +The letters are: + + i synthesize "instructions" events + b synthesize "branches" events + x synthesize "transactions" events + c synthesize branches events (calls only) + r synthesize branches events (returns only) + e synthesize tracing error events + d create a debug log + g synthesize a call chain (use with i or x) + +"Instructions" events look like they were recorded by "perf record -e +instructions". + +"Branches" events look like they were recorded by "perf record -e branches". "c" +and "r" can be combined to get calls and returns. + +"Transactions" events correspond to the start or end of transactions. The +'flags' field can be used in perf script to determine whether the event is a +tranasaction start, commit or abort. + +Error events are new. They show where the decoder lost the trace. Error events +are quite important. Users must know if what they are seeing is a complete +picture or not. + +The "d" option will cause the creation of a file "intel_pt.log" containing all +decoded packets and instructions. Note that this option slows down the decoder +and that the resulting file may be very large. + +In addition, the period of the "instructions" event can be specified. e.g. + + --itrace=i10us + +sets the period to 10us i.e. one instruction sample is synthesized for each 10 +microseconds of trace. Alternatives to "us" are "ms" (milliseconds), +"ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions). + +"ms", "us" and "ns" are converted to TSC ticks. + +The timing information included with Intel PT does not give the time of every +instruction. Consequently, for the purpose of sampling, the decoder estimates +the time since the last timing packet based on 1 tick per instruction. The time +on the sample is *not* adjusted and reflects the last known value of TSC. + +For Intel PT, the default period is 100us. + +Also the call chain size (default 16, max. 1024) for instructions or +transactions events can be specified. e.g. + + --itrace=ig32 + --itrace=xg32 + +To disable trace decoding entirely, use the option --no-itrace. + + +dump option +----------- + +perf script has an option (-D) to "dump" the events i.e. display the binary +data. + +When -D is used, Intel PT packets are displayed. The packet decoder does not +pay attention to PSB packets, but just decodes the bytes - so the packets seen +by the actual decoder may not be identical in places where the data is corrupt. +One example of that would be when the buffer-switching interrupt has been too +slow, and the buffer has been filled completely. In that case, the last packet +in the buffer might be truncated and immediately followed by a PSB as the trace +continues in the next buffer. + +To disable the display of Intel PT packets, combine the -D option with +--no-itrace. + + +perf report +=========== + +By default, perf report will decode trace data found in the perf.data file. +This can be further controlled by new option --itrace exactly the same as +perf script, with the exception that the default is --itrace=igxe. + + +perf inject +=========== + +perf inject also accepts the --itrace option in which case tracing data is +removed and replaced with the synthesized events. e.g. + + perf inject --itrace -i perf.data -o perf.data.new
tools/perf/arch/x86/util/Build +2 -0
@@ -1,5 +1,6 @@ libperf-y += header.o libperf-y += tsc.o +libperf-y += pmu.o libperf-y += kvm-stat.o libperf-$(CONFIG_DWARF) += dwarf-regs.o
@@ -7,4 +8,5 @@ libperf-$(CONFIG_DWARF) += dwarf-regs.o libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o +libperf-$(CONFIG_AUXTRACE) += auxtrace.o libperf-$(CONFIG_AUXTRACE) += intel-pt.o
tools/perf/arch/x86/util/auxtrace.c new file +38 -0
@@ -0,0 +1,38 @@ +/* +* auxtrace.c: AUX area tracing support +* Copyright (c) 2013-2014, Intel Corporation. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +*/ + +#include "../../util/header.h" +#include "../../util/auxtrace.h" +#include "../../util/intel-pt.h" + +struct auxtrace_record *auxtrace_record__init (struct perf_evlist *evlist__maybe_unused , +int *err) +{ +char buffer[64 ]; +int ret; + + *err =0 ; + + ret =get_cpuid (buffer,sizeof (buffer)); +if (ret) { + *err = ret; +return NULL ; + } + +if (!strncmp (buffer,"GenuineIntel," ,13 )) +return intel_pt_recording_init (err); + +return NULL ; +}
tools/perf/arch/x86/util/pmu.c new file +15 -0
@@ -0,0 +1,15 @@ +#include <string.h> + +#include <linux/perf_event.h> + +#include "../../util/intel-pt.h" +#include "../../util/pmu.h" + +struct perf_event_attr *perf_pmu__get_default_config (struct perf_pmu *pmu__maybe_unused ) +{ +#ifdef HAVE_AUXTRACE_SUPPORT +if (!strcmp (pmu->name,INTEL_PT_PMU_NAME )) +return intel_pt_pmu_default_config (pmu); +#endif +return NULL ; +}
tools/perf/util/auxtrace.c +4 -1
@@ -47,6 +47,8 @@#include "debug.h" #include "parse-options.h" +#include "intel-pt.h" +int auxtrace_mmap__mmap (struct auxtrace_mmap *mm,struct auxtrace_mmap_params *mp,void *userpg,int fd)
@@ -876,7 +878,7 @@ static bool auxtrace__dont_decode(struct perf_session *session)int perf_event__process_auxtrace_info (struct perf_tool *tool__maybe_unused ,union perf_event *event, -struct perf_session *session__maybe_unused ) +struct perf_session *session) {enum auxtrace_type type = event->auxtrace_info.type;
@@ -885,6 +887,7 @@ int perf_event__process_auxtrace_info(struct perf_tool *tool __maybe_unused,switch (type) {case PERF_AUXTRACE_INTEL_PT : +return intel_pt_process_auxtrace_info (event, session);case PERF_AUXTRACE_UNKNOWN :default :return -EINVAL ;
tools/perf/util/pmu.c +2 -2
@@ -442,8 +442,8 @@ static struct perf_pmu *pmu_lookup(const char *name)LIST_HEAD (aliases);__u32 type; -/* No support for intel_bts or intel_pt so disallow them */ -if (!strcmp (name,"intel_bts" ) || !strcmp (name,"intel_pt" )) +/* No support for intel_bts so disallow it */ +if (!strcmp (name,"intel_bts" ))return NULL ;/*
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 10/17 perf tools: Allow auxtrace data alignment
In reply to Adrian HunterAllow auxtrace data to be a multiple of something other than page size. That is needed for BTS where the buffer contains 24-byte records.
--- tools/perf/util/auxtrace.c | 7 +++++++ tools/perf/util/auxtrace.h | 1 + 2 files changed, 8 insertions(+)
tools/perf/util/auxtrace.c +7 -0
@@ -1186,6 +1186,13 @@ static int __auxtrace_mmap__read(struct auxtrace_mmap *mm, data2 =NULL ; } +if (itr->alignment) { +unsigned int unwanted = len1 % itr->alignment; + + len1 -= unwanted; + size -= unwanted; + } +/* padding must be written by fn() e.g. record__process_auxtrace() */ padding = size &7 ;if (padding)
tools/perf/util/auxtrace.h +1 -0
@@ -304,6 +304,7 @@ struct auxtrace_record { const char *str);u64 (*reference)(struct auxtrace_record *itr);int (*read_finish)(struct auxtrace_record *itr,int idx); +unsigned int alignment; };#ifdef HAVE_AUXTRACE_SUPPORT
Signature · 1 line
1.9.1
tip-bot for Adrian Hunter
merge bot[tip:perf/core] perf tools: Allow auxtrace data alignment
perf tools: Allow auxtrace data alignment
Commit-ID: 83b2ea257eb1d43e52f76d756722aeb899a2852c Gitweb: http://git.kernel.org/tip/83b2ea257eb1d43e52f76d756722aeb899a2852c Author: Adrian Hunter <[email protected]> AuthorDate: Fri, 29 May 2015 16:33:38 +0300 Committer: Arnaldo Carvalho de Melo <[email protected]> CommitDate: Tue, 23 Jun 2015 18:28:37 -0300
perf tools: Allow auxtrace data alignment
Allow auxtrace data to be a multiple of something other than page size. That is needed for BTS where the buffer contains 24-byte records.
--- tools/perf/util/auxtrace.c | 7 +++++++ tools/perf/util/auxtrace.h | 1 + 2 files changed, 8 insertions(+)
tools/perf/util/auxtrace.c +7 -0
@@ -1182,6 +1182,13 @@ static int __auxtrace_mmap__read(struct auxtrace_mmap *mm, data2 =NULL ; } +if (itr->alignment) { +unsigned int unwanted = len1 % itr->alignment; + + len1 -= unwanted; + size -= unwanted; + } +/* padding must be written by fn() e.g. record__process_auxtrace() */ padding = size &7 ;if (padding)
tools/perf/util/auxtrace.h +1 -0
@@ -303,6 +303,7 @@ struct auxtrace_record { const char *str);u64 (*reference)(struct auxtrace_record *itr);int (*read_finish)(struct auxtrace_record *itr,int idx); +unsigned int alignment; };#ifdef HAVE_AUXTRACE_SUPPORT
Adrian Hunter
reviewerPATCH v6 11/17 perf tools: Add Intel BTS support
In reply to Adrian HunterIntel BTS support fits within the new auxtrace infrastructure. Recording is supporting by identifying the Intel BTS PMU, parsing options and setting up events. Decoding is supported by queuing up trace data by thread and then decoding synchronously delivering synthesized event samples into the session processing for tools to consume.
--- tools/perf/Documentation/intel-bts.txt | 86 ++++ tools/perf/arch/x86/util/Build | 1 + tools/perf/arch/x86/util/auxtrace.c | 49 +- tools/perf/arch/x86/util/intel-bts.c | 458 +++++++++++++++++++ tools/perf/arch/x86/util/pmu.c | 3 + tools/perf/util/Build | 1 + tools/perf/util/auxtrace.c | 3 + tools/perf/util/auxtrace.h | 1 + tools/perf/util/intel-bts.c | 793 +++++++++++++++++++++++++++++++++ tools/perf/util/intel-bts.h | 43 ++ tools/perf/util/pmu.c | 4 - 11 files changed, 1436 insertions(+), 6 deletions(-) create mode 100644 tools/perf/Documentation/intel-bts.txt create mode 100644 tools/perf/arch/x86/util/intel-bts.c create mode 100644 tools/perf/util/intel-bts.c create mode 100644 tools/perf/util/intel-bts.h
tools/perf/Documentation/intel-bts.txt new file +86 -0
@@ -0,0 +1,86 @@ +Intel Branch Trace Store +======================== + +Overview +======== + +Intel BTS could be regarded as a predecessor to Intel PT and has some +similarities because it can also identify every branch a program takes. A +notable difference is that Intel BTS has no timing information and as a +consequence the present implementation is limited to per-thread recording. + +While decoding Intel BTS does not require walking the object code, the object +code is still needed to pair up calls and returns correctly, consequently much +of the Intel PT documentation applies also to Intel BTS. Refer to the Intel PT +documentation and consider that the PMU 'intel_bts' can usually be used in +place of 'intel_pt' in the examples provided, with the proviso that per-thread +recording must also be stipulated i.e. the --per-thread option for +'perf record'. + + +perf record +=========== + +new event +--------- + +The Intel BTS kernel driver creates a new PMU for Intel BTS. The perf record +option is: + + -e intel_bts// + +Currently Intel BTS is limited to per-thread tracing so the --per-thread option +is also needed. + + +snapshot option +--------------- + +The snapshot option is the same as Intel PT (refer Intel PT documentation). + + +auxtrace mmap size option +----------------------- + +The mmap size option is the same as Intel PT (refer Intel PT documentation). + + +perf script +=========== + +By default, perf script will decode trace data found in the perf.data file. +This can be further controlled by option --itrace. The --itrace option is +the same as Intel PT (refer Intel PT documentation) except that neither +"instructions" events nor "transactions" events (and consequently call +chains) are supported. + +To disable trace decoding entirely, use the option --no-itrace. + + +dump option +----------- + +perf script has an option (-D) to "dump" the events i.e. display the binary +data. + +When -D is used, Intel BTS packets are displayed. + +To disable the display of Intel BTS packets, combine the -D option with +--no-itrace. + + +perf report +=========== + +By default, perf report will decode trace data found in the perf.data file. +This can be further controlled by new option --itrace exactly the same as +perf script. + + +perf inject +=========== + +perf inject also accepts the --itrace option in which case tracing data is +removed and replaced with the synthesized events. e.g. + + perf inject --itrace -i perf.data -o perf.data.new
tools/perf/arch/x86/util/Build +1 -0
@@ -10,3 +10,4 @@ libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o libperf-$(CONFIG_AUXTRACE) += auxtrace.o libperf-$(CONFIG_AUXTRACE) += intel-pt.o +libperf-$(CONFIG_AUXTRACE) += intel-bts.o
tools/perf/arch/x86/util/auxtrace.c +47 -2
65 lines not on this page · raw message
tools/perf/arch/x86/util/intel-bts.c new file +458 -0
458 lines not on this page · raw message
tools/perf/arch/x86/util/pmu.c +3 -0
@@ -3,6 +3,7 @@#include <linux/perf_event.h> #include "../../util/intel-pt.h" +#include "../../util/intel-bts.h" #include "../../util/pmu.h" struct perf_event_attr *perf_pmu__get_default_config (struct perf_pmu *pmu__maybe_unused )
@@ -10,6 +11,8 @@ struct perf_event_attr *perf_pmu__get_default_config(struct perf_pmu *pmu __mayb#ifdef HAVE_AUXTRACE_SUPPORT if (!strcmp (pmu->name,INTEL_PT_PMU_NAME ))return intel_pt_pmu_default_config (pmu); +if (!strcmp (pmu->name,INTEL_BTS_PMU_NAME )) + pmu->selectable = true;#endif return NULL ; }
tools/perf/util/Build +1 -0
@@ -77,6 +77,7 @@ libperf-y += thread-stack.o libperf-$(CONFIG_AUXTRACE) += auxtrace.o libperf-$(CONFIG_AUXTRACE) += intel-pt-decoder/ libperf-$(CONFIG_AUXTRACE) += intel-pt.o +libperf-$(CONFIG_AUXTRACE) += intel-bts.o libperf-y += parse-branch-options.o libperf-$(CONFIG_LIBELF) += symbol-elf.o
tools/perf/util/auxtrace.c +3 -0
@@ -48,6 +48,7 @@#include "parse-options.h" #include "intel-pt.h" +#include "intel-bts.h" int auxtrace_mmap__mmap(struct auxtrace_mmap *mm, struct auxtrace_mmap_params *mp,
@@ -888,6 +889,8 @@ int perf_event__process_auxtrace_info(struct perf_tool *tool __maybe_unused,switch (type) {case PERF_AUXTRACE_INTEL_PT :return intel_pt_process_auxtrace_info (event, session); +case PERF_AUXTRACE_INTEL_BTS : +return intel_bts_process_auxtrace_info (event, session);case PERF_AUXTRACE_UNKNOWN :default :return -EINVAL ;
tools/perf/util/auxtrace.h +1 -0
@@ -40,6 +40,7 @@ struct events_stats;enum auxtrace_type {PERF_AUXTRACE_UNKNOWN ,PERF_AUXTRACE_INTEL_PT , +PERF_AUXTRACE_INTEL_BTS , };enum itrace_period_type {
tools/perf/util/intel-bts.c new file +793 -0
793 lines not on this page · raw message
tools/perf/util/intel-bts.h new file +43 -0
43 lines not on this page · raw message
tools/perf/util/pmu.c +0 -4
@@ -442,10 +442,6 @@ static struct perf_pmu *pmu_lookup(const char *name)LIST_HEAD (aliases);__u32 type; -/* No support for intel_bts so disallow it */ -if (!strcmp (name,"intel_bts" )) -return NULL ; -/* * The pmu data we store & need consists of the pmu * type value and format definitions. Load both right
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 12/17 perf tools: Output sample flags and insn_len from intel_pt
In reply to Adrian Hunterintel_pt synthesizes samples. Fill in the new flags and insn_len members with instruction information.
--- tools/perf/util/intel-pt.c | 4 ++++ 1 file changed, 4 insertions(+)
tools/perf/util/intel-pt.c +4 -0
@@ -876,6 +876,8 @@ static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq) sample.stream_id = ptq->pt->branches_id; sample.period =1 ; sample.cpu = ptq->cpu; + sample.flags = ptq->flags; + sample.insn_len = ptq->insn_len;if (pt->branches_filter && !(pt->branches_filter & ptq->flags))return 0 ;
@@ -918,6 +920,8 @@ static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq) sample.stream_id = ptq->pt->instructions_id; sample.period = ptq->pt->instructions_sample_period; sample.cpu = ptq->cpu; + sample.flags = ptq->flags; + sample.insn_len = ptq->insn_len;if (pt->synth_opts.callchain) { thread_stack__sample(ptq->thread, ptq->chain,
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 13/17 perf tools: Output sample flags and insn_len from intel_bts
In reply to Adrian Hunterintel_bts synthesizes samples. Fill in the new flags and insn_len members with instruction information.
--- tools/perf/util/intel-bts.c | 126 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 122 insertions(+), 4 deletions(-)
tools/perf/util/intel-bts.c +122 -4
@@ -30,6 +30,7 @@#include "debug.h" #include "tsc.h" #include "auxtrace.h" +#include "intel-pt-decoder/intel-pt-insn-decoder.h" #include "intel-bts.h" #define MAX_TIMESTAMP (~0ULL)
@@ -58,6 +59,7 @@ struct intel_bts {bool cap_user_time_zero;struct itrace_synth_opts synth_opts;bool sample_branches; +u32 branches_filter;u64 branches_sample_type;u64 branches_id;size_t branches_event_size;
@@ -74,6 +76,8 @@ struct intel_bts_queue {pid_t tid;int cpu;u64 time; +struct intel_pt_insn intel_pt_insn; +u32 sample_flags; };struct branch {
@@ -281,6 +285,8 @@ static int intel_bts_synth_branch_sample(struct intel_bts_queue *btsq, sample.stream_id = btsq->bts->branches_id; sample.period =1 ; sample.cpu = btsq->cpu; + sample.flags = btsq->sample_flags; + sample.insn_len = btsq->intel_pt_insn.length;if (bts->synth_opts.inject) { event.sample.header.size = bts->branches_event_size;
@@ -300,11 +306,115 @@ static int intel_bts_synth_branch_sample(struct intel_bts_queue *btsq,return ret; } +static int intel_bts_get_next_insn (struct intel_bts_queue *btsq,u64 ip) +{ +struct machine *machine = btsq->bts->machine; +struct thread *thread; +struct addr_location al; +unsigned char buf[1024 ]; +size_t bufsz; +ssize_t len; +int x86_64; +uint8_t cpumode; + + bufsz =intel_pt_insn_max_size (); + +if (machine__kernel_ip (machine, ip)) + cpumode =PERF_RECORD_MISC_KERNEL ; +else + cpumode =PERF_RECORD_MISC_USER ; + + thread =machine__find_thread (machine,-1 , btsq->tid); +if (!thread) +return -1 ; + +thread__find_addr_map (thread, cpumode,MAP__FUNCTION , ip, &al); +if (!al.map || !al.map->dso) +return -1 ; + + len =dso__data_read_addr (al.map->dso, al.map, machine, ip, buf, bufsz); +if (len <=0 ) +return -1 ; + +/* Load maps to ensure dso->is_64_bit has been updated */ +map__load (al.map, machine->symbol_filter); + + x86_64 = al.map->dso->is_64_bit; + +if (intel_pt_get_insn (buf, len, x86_64, &btsq->intel_pt_insn)) +return -1 ; + +return 0 ; +} + +static int intel_bts_synth_error (struct intel_bts *bts,int cpu,pid_t pid, +pid_t tid,u64 ip) +{ +union perf_event event; +int err; + +auxtrace_synth_error (&event.auxtrace_error,PERF_AUXTRACE_ERROR_ITRACE , +INTEL_BTS_ERR_NOINSN , cpu, pid, tid, ip, +"Failed to get instruction" ); + + err =perf_session__deliver_synth_event (bts->session, &event,NULL ); +if (err) +pr_err ("Intel BTS: failed to deliver error event, error %d\n" , + err); + +return err; +} + +static int intel_bts_get_branch_type (struct intel_bts_queue *btsq, +struct branch *branch) +{ +int err; + +if (!branch->from) { +if (branch->to) + btsq->sample_flags =PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_TRACE_BEGIN ; +else + btsq->sample_flags =0 ; + btsq->intel_pt_insn.length =0 ; + }else if (!branch->to) { + btsq->sample_flags =PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_TRACE_END ; + btsq->intel_pt_insn.length =0 ; + }else { + err =intel_bts_get_next_insn (btsq, branch->from); +if (err) { + btsq->sample_flags =0 ; + btsq->intel_pt_insn.length =0 ; +if (!btsq->bts->synth_opts.errors) +return 0 ; + err =intel_bts_synth_error (btsq->bts, btsq->cpu, + btsq->pid, btsq->tid, + branch->from); +return err; + } + btsq->sample_flags =intel_pt_insn_type (btsq->intel_pt_insn.op); +/* Check for an async branch into the kernel */ +if (!machine__kernel_ip (btsq->bts->machine, branch->from) && +machine__kernel_ip (btsq->bts->machine, branch->to) && + btsq->sample_flags != (PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_CALL | +PERF_IP_FLAG_SYSCALLRET )) + btsq->sample_flags =PERF_IP_FLAG_BRANCH | +PERF_IP_FLAG_CALL | +PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_INTERRUPT ; + } + +return 0 ; +} +static int intel_bts_process_buffer (struct intel_bts_queue *btsq,struct auxtrace_buffer *buffer) {struct branch *branch; -size_t sz; +size_t sz, bsz =sizeof (struct branch ); +u32 filter = btsq->bts->branches_filter;int err =0 ;if (buffer->use_data) {
@@ -318,14 +428,15 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq,if (!btsq->bts->sample_branches)return 0 ; -while (sz >sizeof (struct branch )) { +for (; sz > bsz; branch +=1 , sz -= bsz) {if (!branch->from && !branch->to)continue ; +intel_bts_get_branch_type (btsq, branch); +if (filter && !(filter & btsq->sample_flags)) +continue ; err =intel_bts_synth_branch_sample (btsq, branch);if (err)break ; - branch +=1 ; - sz -=sizeof (struct branch ); }return err; }
@@ -771,6 +882,13 @@ int intel_bts_process_auxtrace_info(union perf_event *event,else itrace_synth_opts__set_default (&bts->synth_opts); +if (bts->synth_opts.calls) + bts->branches_filter |=PERF_IP_FLAG_CALL |PERF_IP_FLAG_ASYNC | +PERF_IP_FLAG_TRACE_END ; +if (bts->synth_opts.returns) + bts->branches_filter |=PERF_IP_FLAG_RETURN | +PERF_IP_FLAG_TRACE_BEGIN ; + err =intel_bts_synth_events (bts, session);if (err) goto err_free_queues;
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 14/17 perf tools: Intel PT to always update thread stack trace number
In reply to Adrian HunterThe enhanced thread stack is used by higher layers but still requires the trace number. The trace number is used to distinguish discontinuous sections of trace (for example from Snapshot mode or Sample mode), which cause the thread stack to be flushed.
--- tools/perf/util/intel-pt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
tools/perf/util/intel-pt.c +3 -1
@@ -265,7 +265,7 @@ static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode && !buffer->consecutive)) { b->consecutive = false; - b->trace_nr = buffer->buffer_nr; + b->trace_nr = buffer->buffer_nr +1 ; }else { b->consecutive = true; }
@@ -1075,6 +1075,8 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)thread_stack__event (ptq->thread, ptq->flags, state->from_ip, state->to_ip, ptq->insn_len, state->trace_nr); + else + thread_stack__set_trace_nr(ptq->thread, state->trace_nr);if (pt->sample_branches) { err =intel_pt_synth_branch_sample (ptq);
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 15/17 perf tools: Intel BTS to always update thread stack trace number
In reply to Adrian HunterThe enhanced thread stack is used by higher layers but still requires the trace number. The trace number is used to distinguish discontinuous sections of trace (for example from Snapshot mode or Sample mode), which cause the thread stack to be flushed.
--- tools/perf/util/intel-bts.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-)
tools/perf/util/intel-bts.c +14 -4
@@ -27,6 +27,8 @@#include "machine.h" #include "session.h" #include "util.h" +#include "thread.h" +#include "thread-stack.h" #include "debug.h" #include "tsc.h" #include "auxtrace.h"
@@ -443,19 +445,22 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq,static int intel_bts_process_queue (struct intel_bts_queue *btsq,u64 *timestamp) { -struct auxtrace_buffer *buffer = btsq->buffer; +struct auxtrace_buffer *buffer = btsq->buffer, *old_buffer = buffer;struct auxtrace_queue *queue; +struct thread *thread;int err;if (btsq->done)return 1 ;if (btsq->pid ==-1 ) { -struct thread *thread; - - thread =machine__find_thread (btsq->bts->machine,-1 , btsq->tid); + thread =machine__find_thread (btsq->bts->machine,-1 , + btsq->tid);if (thread) btsq->pid = thread->pid_; + }else { + thread =machine__findnew_thread (btsq->bts->machine, btsq->pid, + btsq->tid); } queue = &btsq->bts->queues.queue_array[btsq->queue_nr];
@@ -485,6 +490,11 @@ static int intel_bts_process_queue(struct intel_bts_queue *btsq, u64 *timestamp) intel_bts_do_fix_overlap(queue, buffer))return -ENOMEM ; +if (!btsq->bts->synth_opts.callchain && thread && + (!old_buffer || btsq->bts->sampling_mode || + (btsq->bts->snapshot_mode && !buffer->consecutive))) +thread_stack__set_trace_nr (thread, buffer->buffer_nr +1 ); + err =intel_bts_process_buffer (btsq, buffer);auxtrace_buffer__drop_data (buffer);
Signature · 1 line
1.9.1
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 15/17] perf tools: Intel BTS to always update thread stack trace number
Em Fri, May 29, 2015 at 04:33:43PM +0300, Adrian Hunter escreveu:
Quoted 37 lines
The enhanced thread stack is used by higher layers but still requires the trace number. The trace number is used to distinguish discontinuous sections of trace (for example from Snapshot mode or Sample mode), which cause the thread stack to be flushed.
Signed-off-by Adrian Hunter <[email protected]>--- tools/perf/util/intel-bts.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-)tools/perf/util/intel-bts.c +4
-1@@ -27,6 +27,8 @@#include "machine.h" #include "session.h" #include "util.h" +#include "thread.h" +#include "thread-stack.h" #include "debug.h" #include "tsc.h" #include "auxtrace.h" @@ -443,19 +445,22 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq,static int intel_bts_process_queue (struct intel_bts_queue *btsq,u64 *timestamp) { -struct auxtrace_buffer *buffer = btsq->buffer; +struct auxtrace_buffer *buffer = btsq->buffer, *old_buffer = buffer;struct auxtrace_queue *queue; +struct thread *thread;int err;if (btsq->done)return 1 ;if (btsq->pid ==-1 ) {
tools/perf/util/intel-bts.c static int intel_bts_process_buffer(struct intel_bts_queue *btsq, · line 463
Quoted 10 lines
tools/perf/util/intel-bts.c +5
-3-struct thread *thread; - - thread =machine__find_thread (btsq->bts->machine,-1 , btsq->tid); + thread =machine__find_thread (btsq->bts->machine,-1 , + btsq->tid);if (thread) btsq->pid = thread->pid_; + }else { + thread =machine__findnew_thread (btsq->bts->machine, btsq->pid, + btsq->tid);
Humm, so what will be done with the reference count you got from machine__findnew_thread()? You have to drop it when you're done with using this thread.
Quoted 17 lines
tools/perf/util/intel-bts.c +5
-0} queue = &btsq->bts->queues.queue_array[btsq->queue_nr];@@ -485,6 +490,11 @@ static int intel_bts_process_queue(struct intel_bts_queue *btsq, u64 *timestamp) intel_bts_do_fix_overlap(queue, buffer))return -ENOMEM ; +if (!btsq->bts->synth_opts.callchain && thread && + (!old_buffer || btsq->bts->sampling_mode || + (btsq->bts->snapshot_mode && !buffer->consecutive))) +thread_stack__set_trace_nr (thread, buffer->buffer_nr +1 ); + err =intel_bts_process_buffer (btsq, buffer);auxtrace_buffer__drop_data (buffer);Signature · 1 line
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in Please read the FAQ at http://www.tux.org/lkml/
Adrian Hunter
reviewerRe: [PATCH V6 15/17] perf tools: Intel BTS to always update thread stack trace number
Quoted 37 lines · Arnaldo Carvalho de Melo
Em Fri, May 29, 2015 at 04:33:43PM +0300, Adrian Hunter escreveu:
Quoted 36 lines
The enhanced thread stack is used by higher layers but still requires the trace number. The trace number is used to distinguish discontinuous sections of trace (for example from Snapshot mode or Sample mode), which cause the thread stack to be flushed.
Signed-off-by Adrian Hunter <[email protected]>--- tools/perf/util/intel-bts.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-)tools/perf/util/intel-bts.c +4
-1@@ -27,6 +27,8 @@#include "machine.h" #include "session.h" #include "util.h" +#include "thread.h" +#include "thread-stack.h" #include "debug.h" #include "tsc.h" #include "auxtrace.h" @@ -443,19 +445,22 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq,static int intel_bts_process_queue (struct intel_bts_queue *btsq,u64 *timestamp) { -struct auxtrace_buffer *buffer = btsq->buffer; +struct auxtrace_buffer *buffer = btsq->buffer, *old_buffer = buffer;struct auxtrace_queue *queue; +struct thread *thread;int err;if (btsq->done)return 1 ;
Quoted 16 lines
tools/perf/util/intel-bts.c static int intel_bts_process_buffer(struct intel_bts_queue *btsq, · line 463
Quoted 11 lines
tools/perf/util/intel-bts.c +5
-3if (btsq->pid ==-1 ) { -struct thread *thread; - - thread =machine__find_thread (btsq->bts->machine,-1 , btsq->tid); + thread =machine__find_thread (btsq->bts->machine,-1 , + btsq->tid);if (thread) btsq->pid = thread->pid_; + }else { + thread =machine__findnew_thread (btsq->bts->machine, btsq->pid, + btsq->tid);Humm, so what will be done with the reference count you got from
machine__findnew_thread()? You have to drop it when you're done with using this thread.
Thought I fixed that. Went looking and, yes, the chunks got lost when rolling V6 of the patches. Anyway here are the fixes as a separate patch.
From: Adrian Hunter <[email protected]>
Date: Mon, 22 Jun 2015 15:02:04 +0300
Subject: [PATCH] perf tools: Fix missing thread__put()s
Processing for Intel BTS and Intel PT are using machine__find_thread() and machine__findnew_thread() which increase the struct thread reference count. Add missing thread__put()s when finished with that struct thread reference.
--- tools/perf/util/intel-bts.c | 36 ++++++++++++++++++++++++------------ tools/perf/util/intel-pt.c | 5 +++-- 2 files changed, 27 insertions(+), 14 deletions(-)
tools/perf/util/intel-bts.c +0 -0
@@ -318,6 +318,7 @@ static int intel_bts_get_next_insn(struct
intel_bts_queue *btsq, u64 ip)
ssize_t len;
int x86_64;
uint8_t cpumode;
+ int err = -1;
bufsz = intel_pt_insn_max_size();
@@ -332,11 +333,11 @@ static int intel_bts_get_next_insn(struct intel_bts_queue *btsq, u64 ip)
thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al); if (!al.map || !al.map->dso)
- return -1;
+ goto out_put;
len = dso__data_read_addr(al.map->dso, al.map, machine, ip, buf, bufsz); if (len <= 0)
- return -1;
+ goto out_put;
/* Load maps to ensure dso->is_64_bit has been updated */ map__load(al.map, machine->symbol_filter);
@@ -344,9 +345,12 @@ static int intel_bts_get_next_insn(struct intel_bts_queue *btsq, u64 ip)
x86_64 = al.map->dso->is_64_bit;
if (intel_pt_get_insn(buf, len, x86_64, &btsq->intel_pt_insn))
- return -1;
+ goto out_put;
- return 0;
+ err = 0;
+out_put:
+ thread__put(thread);
+ return err;
}
static int intel_bts_synth_error(struct intel_bts *bts, int cpu, pid_t pid,
@@ -471,24 +475,31 @@ static int intel_bts_process_queue(struct intel_bts_queue *btsq, u64 *timestamp)
if (!buffer) {
if (!btsq->bts->sampling_mode)
btsq->done = 1;
- return 1;
+ err = 1;
+ goto out_put;
}
/* Currently there is no support for split buffers */
- if (buffer->consecutive)
- return -EINVAL;
+ if (buffer->consecutive) {
+ err = -EINVAL;
+ goto out_put;
+ }
if (!buffer->data) {
int fd = perf_data_file__fd(btsq->bts->session->file);
buffer->data = auxtrace_buffer__get_data(buffer, fd);
- if (!buffer->data)
- return -ENOMEM;
+ if (!buffer->data) {
+ err = -ENOMEM;
+ goto out_put;
+ }
}
if (btsq->bts->snapshot_mode && !buffer->consecutive &&
- intel_bts_do_fix_overlap(queue, buffer))
- return -ENOMEM;
+ intel_bts_do_fix_overlap(queue, buffer)) {
+ err = -ENOMEM;
+ goto out_put;
+ }
if (!btsq->bts->synth_opts.callchain && thread &&
(!old_buffer || btsq->bts->sampling_mode ||
@@ -507,7 +518,8 @@ static int intel_bts_process_queue(struct intel_bts_queue *btsq, u64 *timestamp)
if (!btsq->bts->sampling_mode)
btsq->done = 1;
}
-
+out_put:
+ thread__put(thread);
return err;
}
tools/perf/util/intel-pt.c +0 -0
@@ -200,7 +200,7 @@ static void intel_pt_use_buffer_pid_tid(struct
intel_pt_queue *ptq,
intel_pt_log("queue %u cpu %d pid %d tid %d\n",
ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
- ptq->thread = NULL;
+ thread__zput(ptq->thread);
if (ptq->tid != -1) {
if (ptq->pid != -1)
@@ -713,6 +713,7 @@ static void intel_pt_free_queue(void *priv)
if (!ptq)
return;
+ thread__zput(ptq->thread);
intel_pt_decoder_free(ptq->decoder); zfree(&ptq->event_buf);
zfree(&ptq->chain);
@@ -726,7 +727,7 @@ static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
if (queue->tid == -1 || pt->have_sched_switch) {
ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
- ptq->thread = NULL;
+ thread__zput(ptq->thread);
}
if (!ptq->thread && ptq->tid != -1)
Signature · 6 lines
1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in Please read the FAQ at http://www.tux.org/lkml/
Arnaldo Carvalho de Melo
maintainerRe: [PATCH V6 15/17] perf tools: Intel BTS to always update thread stack trace number
Em Mon, Jun 22, 2015 at 03:38:35PM +0300, Adrian Hunter escreveu:
Quoted 55 lines · Arnaldo Carvalho de Melo
Quoted 37 lines
Em Fri, May 29, 2015 at 04:33:43PM +0300, Adrian Hunter escreveu:
Quoted 36 lines
The enhanced thread stack is used by higher layers but still requires the trace number. The trace number is used to distinguish discontinuous sections of trace (for example from Snapshot mode or Sample mode), which cause the thread stack to be flushed.
Signed-off-by Adrian Hunter <[email protected]>--- tools/perf/util/intel-bts.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-)tools/perf/util/intel-bts.c +4
-1@@ -27,6 +27,8 @@#include "machine.h" #include "session.h" #include "util.h" +#include "thread.h" +#include "thread-stack.h" #include "debug.h" #include "tsc.h" #include "auxtrace.h" @@ -443,19 +445,22 @@ static int intel_bts_process_buffer(struct intel_bts_queue *btsq,static int intel_bts_process_queue (struct intel_bts_queue *btsq,u64 *timestamp) { -struct auxtrace_buffer *buffer = btsq->buffer; +struct auxtrace_buffer *buffer = btsq->buffer, *old_buffer = buffer;struct auxtrace_queue *queue; +struct thread *thread;int err;if (btsq->done)return 1 ;Quoted 16 lines
tools/perf/util/intel-bts.c static int intel_bts_process_buffer(struct intel_bts_queue *btsq, · line 463
Quoted 11 lines
tools/perf/util/intel-bts.c +5
-3if (btsq->pid ==-1 ) { -struct thread *thread; - - thread =machine__find_thread (btsq->bts->machine,-1 , btsq->tid); + thread =machine__find_thread (btsq->bts->machine,-1 , + btsq->tid);if (thread) btsq->pid = thread->pid_; + }else { + thread =machine__findnew_thread (btsq->bts->machine, btsq->pid, + btsq->tid);Humm, so what will be done with the reference count you got from
machine__findnew_thread()? You have to drop it when you're done with using this thread.
Quoted 2 lines
Thought I fixed that. Went looking and, yes, the chunks got lost when rolling V6 of the patches. Anyway here are the fixes as a separate patch.
Thanks, I'll try and fold that into that patch, to keep bisect happy, as refcount bugs sometimes are hard to find, I guess I'll even try writing a generic perf based refcounting debugging tool at some point...
- Arnaldo
Quoted 143 lines
From: Adrian Hunter <[email protected]>
Date: Mon, 22 Jun 2015 15:02:04 +0300
Subject: [PATCH] perf tools: Fix missing thread__put()sProcessing for Intel BTS and Intel PT are using
machine__find_thread()andmachine__findnew_thread()which increase the struct thread reference count. Add missing thread__put()s when finished with that struct thread reference.Signed-off-by Adrian Hunter <[email protected]>--- tools/perf/util/intel-bts.c | 36 ++++++++++++++++++++++++------------ tools/perf/util/intel-pt.c | 5 +++-- 2 files changed, 27 insertions(+), 14 deletions(-)tools/perf/util/intel-bts.c +3
-2@@ -318,6 +318,7 @@ static int intel_bts_get_next_insn(struct intel_bts_queue *btsq, u64 ip) ssize_t len;int x86_64;uint8_t cpumode; +int err =-1 ; bufsz =intel_pt_insn_max_size ();@@ -332,11 +333,11 @@ static int intel_bts_get_next_insn(struct intel_bts_queue *btsq, u64 ip) thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);if (!al.map || !al.map->dso) -return -1 ; + goto out_put; len =dso__data_read_addr (al.map->dso, al.map, machine, ip, buf, bufsz);if (len <=0 ) -return -1 ; + goto out_put;/* Load maps to ensure dso->is_64_bit has been updated */ tools/perf/util/intel-bts.c +5
-2map__load (al.map, machine->symbol_filter);@@ -344,9 +345,12 @@ static int intel_bts_get_next_insn(struct intel_bts_queue *btsq, u64 ip) x86_64 = al.map->dso->is_64_bit;if (intel_pt_get_insn (buf, len, x86_64, &btsq->intel_pt_insn)) -return -1 ; + goto out_put; -return 0 ; + err =0 ; +out_put: +thread__put (thread); +return err; }static int intel_bts_synth_error(struct
intel_bts*bts, int cpu,pid_tpid,tools/perf/util/intel-bts.c +14
-7@@ -471,24 +475,31 @@ static int intel_bts_process_queue(struct intel_bts_queue *btsq, u64 *timestamp)if (!buffer) {if (!btsq->bts->sampling_mode) btsq->done =1 ; -return 1 ; + err =1 ; + goto out_put; }/* Currently there is no support for split buffers */ -if (buffer->consecutive) -return -EINVAL ; +if (buffer->consecutive) { + err = -EINVAL ; + goto out_put; + }if (!buffer->data) {int fd =perf_data_file__fd (btsq->bts->session->file); buffer->data =auxtrace_buffer__get_data (buffer, fd); -if (!buffer->data) -return -ENOMEM ; +if (!buffer->data) { + err = -ENOMEM ; + goto out_put; + } }if (btsq->bts->snapshot_mode && !buffer->consecutive && -intel_bts_do_fix_overlap (queue, buffer)) -return -ENOMEM ; +intel_bts_do_fix_overlap (queue, buffer)) { + err = -ENOMEM ; + goto out_put; + } if (!btsq->bts->synth_opts.callchain && thread &&tools/perf/util/intel-bts.c +2
-1(!old_buffer || btsq->bts->sampling_mode ||@@ -507,7 +518,8 @@ static int intel_bts_process_queue(struct intel_bts_queue *btsq, u64 *timestamp)if (!btsq->bts->sampling_mode) btsq->done =1 ; } - +out_put: +thread__put (thread);return err; }tools/perf/util/intel-pt.c +1
-1@@ -200,7 +200,7 @@ static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,intel_pt_log ("queue %u cpu %d pid %d tid %d\n" , ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid); - ptq->thread =NULL ; +thread__zput (ptq->thread);if (ptq->tid !=-1 ) {tools/perf/util/intel-pt.c +2
-1if (ptq->pid !=-1 )@@ -713,6 +713,7 @@ static void intel_pt_free_queue(void *priv)if (!ptq)return ; +thread__zput (ptq->thread);intel_pt_decoder_free (ptq->decoder);zfree (&ptq->event_buf);zfree (&ptq->chain);@@ -726,7 +727,7 @@ static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,if (queue->tid ==-1 || pt->have_sched_switch) { ptq->tid =machine__get_current_tid (pt->machine, ptq->cpu); - ptq->thread =NULL ; +thread__zput (ptq->thread); }if (!ptq->thread && ptq->tid !=-1 )Signature · 1 line
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in Please read the FAQ at http://www.tux.org/lkml/
Adrian Hunter
reviewerPATCH v6 16/17 perf tools: Put itrace options into an asciidoc include
In reply to Adrian Hunterperf script, report and inject all have the same itrace options. Put them into an asciidoc include file.
--- tools/perf/Documentation/itrace.txt | 22 ++++++++++++++++++++++ tools/perf/Documentation/perf-inject.txt | 23 +---------------------- tools/perf/Documentation/perf-report.txt | 23 +---------------------- tools/perf/Documentation/perf-script.txt | 23 +---------------------- 4 files changed, 25 insertions(+), 66 deletions(-) create mode 100644 tools/perf/Documentation/itrace.txt
tools/perf/Documentation/itrace.txt new file +22 -0
@@ -0,0 +1,22 @@ + i synthesize instructions events + b synthesize branches events + c synthesize branches events (calls only) + r synthesize branches events (returns only) + x synthesize transactions events + e synthesize error events + d create a debug log + g synthesize a call chain (use with i or x) + + The default is all events i.e. the same as --itrace=ibxe + + In addition, the period (default 100000) for instructions events + can be specified in units of: + + i instructions + t ticks + ms milliseconds + us microseconds + ns nanoseconds (default) + + Also the call chain size (default 16, max. 1024) for instructions or + transactions events can be specified.
tools/perf/Documentation/perf-inject.txt +1 -22
@@ -48,28 +48,7 @@ OPTIONS Decode Instruction Tracing data, replacing it with synthesized events. Options are: - i synthesize instructions events - b synthesize branches events - c synthesize branches events (calls only) - r synthesize branches events (returns only) - x synthesize transactions events - e synthesize error events - d create a debug log - g synthesize a call chain (use with i or x) - - The default is all events i.e. the same as --itrace=ibxe - - In addition, the period (default 100000) for instructions events - can be specified in units of: - - i instructions - t ticks - ms milliseconds - us microseconds - ns nanoseconds (default) - - Also the call chain size (default 16, max. 1024) for instructions or - transactions events can be specified. +include::itrace.txt[] SEE ALSO --------
tools/perf/Documentation/perf-report.txt +1 -22
@@ -328,28 +328,7 @@ OPTIONS --itrace:: Options for decoding instruction tracing data. The options are: - i synthesize instructions events - b synthesize branches events - c synthesize branches events (calls only) - r synthesize branches events (returns only) - x synthesize transactions events - e synthesize error events - d create a debug log - g synthesize a call chain (use with i or x) - - The default is all events i.e. the same as --itrace=ibxe - - In addition, the period (default 100000) for instructions events - can be specified in units of: - - i instructions - t ticks - ms milliseconds - us microseconds - ns nanoseconds (default) - - Also the call chain size (default 16, max. 1024) for instructions or - transactions events can be specified. +include::itrace.txt[] To disable decoding entirely, use --no-itrace.
tools/perf/Documentation/perf-script.txt +1 -22
@@ -231,28 +231,7 @@ OPTIONS --itrace:: Options for decoding instruction tracing data. The options are: - i synthesize instructions events - b synthesize branches events - c synthesize branches events (calls only) - r synthesize branches events (returns only) - x synthesize transactions events - e synthesize error events - d create a debug log - g synthesize a call chain (use with i or x) - - The default is all events i.e. the same as --itrace=ibxe - - In addition, the period (default 100000) for instructions events - can be specified in units of: - - i instructions - t ticks - ms milliseconds - us microseconds - ns nanoseconds (default) - - Also the call chain size (default 16, max. 1024) for instructions or - transactions events can be specified. +include::itrace.txt[] To disable decoding entirely, use --no-itrace.
Signature · 1 line
1.9.1
Adrian Hunter
reviewerPATCH v6 17/17 perf tools: Add example call-graph script
In reply to Adrian HunterAdd a script to produce a call-graph from data exported to a postgresql database and derived from a processor trace event like intel_pt or intel_bts. Refer to comments in the scripts call-graph-from-postgresql.py and export-to-postgresql.py for more details.
--- .../scripts/python/call-graph-from-postgresql.py | 327 +++++++++++++++++++++ tools/perf/scripts/python/export-to-postgresql.py | 47 +++ 2 files changed, 374 insertions(+) create mode 100644 tools/perf/scripts/python/call-graph-from-postgresql.py
tools/perf/scripts/python/call-graph-from-postgresql.py new file +327 -0
@@ -0,0 +1,327 @@ +#!/usr/bin/python2 +# call-graph-from-postgresql.py: create call-graph from postgresql database +# Copyright (c) 2014, Intel Corporation. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. + +# To use this script you will need to have exported data using the +# export-to-postgresql.py script. Refer to that script for details. +# +# Following on from the example in the export-to-postgresql.py script, a +# call-graph can be displayed for the pt_example database like this: +# +# python tools/perf/scripts/python/call-graph-from-postgresql.py pt_example +# +# Note this script supports connecting to remote databases by setting hostname, +# port, username, password, and dbname e.g. +# +# python tools/perf/scripts/python/call-graph-from-postgresql.py "hostname=myhost username=myuser password=mypassword dbname=pt_example" +# +# The result is a GUI window with a tree representing a context-sensitive +# call-graph. Expanding a couple of levels of the tree and adjusting column +# widths to suit will display something like: +# +# Call Graph: pt_example +# Call Path Object Count Time(ns) Time(%) Branch Count Branch Count(%) +# v- ls +# v- 2638:2638 +# v- _start ld-2.19.so 1 10074071 100.0 211135 100.0 +# |- unknown unknown 1 13198 0.1 1 0.0 +# >- _dl_start ld-2.19.so 1 1400980 13.9 19637 9.3 +# >- _d_linit_internal ld-2.19.so 1 448152 4.4 11094 5.3 +# v-__libc_start_main@plt ls 1 8211741 81.5 180397 85.4 +# >- _dl_fixup ld-2.19.so 1 7607 0.1 108 0.1 +# >- __cxa_atexit libc-2.19.so 1 11737 0.1 10 0.0 +# >- __libc_csu_init ls 1 10354 0.1 10 0.0 +# |- _setjmp libc-2.19.so 1 0 0.0 4 0.0 +# v- main ls 1 8182043 99.6 180254 99.9 +# +# Points to note: +# The top level is a command name (comm) +# The next level is a thread (pid:tid) +# Subsequent levels are functions +# 'Count' is the number of calls +# 'Time' is the elapsed time until the function returns +# Percentages are relative to the level above +# 'Branch Count' is the total number of branches for that function and all +# functions that it calls + +import sys +from PySide.QtCore import * +from PySide.QtGui import * +from PySide.QtSql import * +from decimal import * + +class TreeItem(): + + def __init__(self, db, row, parent_item): + self.db = db + self.row = row + self.parent_item = parent_item + self.query_done = False; + self.child_count = 0 + self.child_items = [] + self.data = ["", "", "", "", "", "", ""] + self.comm_id = 0 + self.thread_id = 0 + self.call_path_id = 1 + self.branch_count = 0 + self.time = 0 + if not parent_item: + self.setUpRoot() + + def setUpRoot(self): + self.query_done = True + query = QSqlQuery(self.db) + ret = query.exec_('SELECT id, comm FROM comms') + if not ret: + raise Exception("Query failed: " + query.lastError().text()) + while query.next(): + if not query.value(0): + continue + child_item = TreeItem(self.db, self.child_count, self) + self.child_items.append(child_item) + self.child_count += 1 + child_item.setUpLevel1(query.value(0), query.value(1)) + + def setUpLevel1(self, comm_id, comm): + self.query_done = True; + self.comm_id = comm_id + self.data[0] = comm + self.child_items = [] + self.child_count = 0 + query = QSqlQuery(self.db) + ret = query.exec_('SELECT thread_id, ( SELECT pid FROM threads WHERE id = thread_id ), ( SELECT tid FROM threads WHERE id = thread_id ) FROM comm_threads WHERE comm_id = ' + str(comm_id)) + if not ret: + raise Exception("Query failed: " + query.lastError().text()) + while query.next(): + child_item = TreeItem(self.db, self.child_count, self) + self.child_items.append(child_item) + self.child_count += 1 + child_item.setUpLevel2(comm_id, query.value(0), query.value(1), query.value(2)) + + def setUpLevel2(self, comm_id, thread_id, pid, tid): + self.comm_id = comm_id + self.thread_id = thread_id + self.data[0] = str(pid) + ":" + str(tid) + + def getChildItem(self, row): + return self.child_items[row] + + def getParentItem(self): + return self.parent_item + + def getRow(self): + return self.row + + def timePercent(self, b): + if not self.time: + return "0.0" + x = (b * Decimal(100)) / self.time + return str(x.quantize(Decimal('.1'), rounding=ROUND_HALF_UP)) + + def branchPercent(self, b): + if not self.branch_count: + return "0.0" + x = (b * Decimal(100)) / self.branch_count + return str(x.quantize(Decimal('.1'), rounding=ROUND_HALF_UP)) + + def addChild(self, call_path_id, name, dso, count, time, branch_count): + child_item = TreeItem(self.db, self.child_count, self) + child_item.comm_id = self.comm_id + child_item.thread_id = self.thread_id + child_item.call_path_id = call_path_id + child_item.branch_count = branch_count + child_item.time = time + child_item.data[0] = name + if dso == "[kernel.kallsyms]": + dso = "[kernel]" + child_item.data[1] = dso + child_item.data[2] = str(count) + child_item.data[3] = str(time) + child_item.data[4] = self.timePercent(time) + child_item.data[5] = str(branch_count) + child_item.data[6] = self.branchPercent(branch_count) + self.child_items.append(child_item) + self.child_count += 1 + + def selectCalls(self): + self.query_done = True; + query = QSqlQuery(self.db) + ret = query.exec_('SELECT id, call_path_id, branch_count, call_time, return_time, ' + '( SELECT name FROM symbols WHERE id = ( SELECT symbol_id FROM call_paths WHERE id = call_path_id ) ), ' + '( SELECT short_name FROM dsos WHERE id = ( SELECT dso_id FROM symbols WHERE id = ( SELECT symbol_id FROM call_paths WHERE id = call_path_id ) ) ), ' + '( SELECT ip FROM call_paths where id = call_path_id ) ' + 'FROM calls WHERE parent_call_path_id = ' + str(self.call_path_id) + ' AND comm_id = ' + str(self.comm_id) + ' AND thread_id = ' + str(self.thread_id) + + 'ORDER BY call_path_id') + if not ret: + raise Exception("Query failed: " + query.lastError().text()) + last_call_path_id = 0 + name = "" + dso = "" + count = 0 + branch_count = 0 + total_branch_count = 0 + time = 0 + total_time = 0 + while query.next(): + if query.value(1) == last_call_path_id: + count += 1 + branch_count += query.value(2) + time += query.value(4) - query.value(3) + else: + if count: + self.addChild(last_call_path_id, name, dso, count, time, branch_count) + last_call_path_id = query.value(1) + name = query.value(5) + dso = query.value(6) + count = 1 + total_branch_count += branch_count + total_time += time + branch_count = query.value(2) + time = query.value(4) - query.value(3) + if count: + self.addChild(last_call_path_id, name, dso, count, time, branch_count) + total_branch_count += branch_count + total_time += time + # Top level does not have time or branch count, so fix that here + if total_branch_count > self.branch_count: + self.branch_count = total_branch_count + if self.branch_count: + for child_item in self.child_items: + child_item.data[6] = self.branchPercent(child_item.branch_count) + if total_time > self.time: + self.time = total_time + if self.time: + for child_item in self.child_items: + child_item.data[4] = self.timePercent(child_item.time) + + def childCount(self): + if not self.query_done: + self.selectCalls() + return self.child_count + + def columnCount(self): + return 7 + + def columnHeader(self, column): + headers = ["Call Path", "Object", "Count ", "Time (ns) ", "Time (%) ", "Branch Count ", "Branch Count (%) "] + return headers[column] + + def getData(self, column): + return self.data[column] + +class TreeModel(QAbstractItemModel): + + def __init__(self, db, parent=None): + super(TreeModel, self).__init__(parent) + self.db = db + self.root = TreeItem(db, 0, None) + + def columnCount(self, parent): + return self.root.columnCount() + + def rowCount(self, parent): + if parent.isValid(): + parent_item = parent.internalPointer() + else: + parent_item = self.root + return parent_item.childCount() + + def headerData(self, section, orientation, role): + if role == Qt.TextAlignmentRole: + if section > 1: + return Qt.AlignRight + if role != Qt.DisplayRole: + return None + if orientation != Qt.Horizontal: + return None + return self.root.columnHeader(section) + + def parent(self, child): + child_item = child.internalPointer() + if child_item is self.root: + return QModelIndex() + parent_item = child_item.getParentItem() + return self.createIndex(parent_item.getRow(), 0, parent_item) + + def index(self, row, column, parent): + if parent.isValid(): + parent_item = parent.internalPointer() + else: + parent_item = self.root + child_item = parent_item.getChildItem(row) + return self.createIndex(row, column, child_item) + + def data(self, index, role): + if role == Qt.TextAlignmentRole: + if index.column() > 1: + return Qt.AlignRight + if role != Qt.DisplayRole: + return None + index_item = index.internalPointer() + return index_item.getData(index.column()) + +class MainWindow(QMainWindow): + + def __init__(self, db, dbname, parent=None): + super(MainWindow, self).__init__(parent) + + self.setObjectName("MainWindow") + self.setWindowTitle("Call Graph: " + dbname) + self.move(100, 100) + self.resize(800, 600) + style = self.style() + icon = style.standardIcon(QStyle.SP_MessageBoxInformation) + self.setWindowIcon(icon); + + self.model = TreeModel(db) + + self.view = QTreeView() + self.view.setModel(self.model) + + self.setCentralWidget(self.view) + +if __name__ == '__main__': + if (len(sys.argv) < 2): + print >> sys.stderr, "Usage is: call-graph-from-postgresql.py <database name>" + raise Exception("Too few arguments") + + dbname = sys.argv[1] + + db = QSqlDatabase.addDatabase('QPSQL') + + opts = dbname.split() + for opt in opts: + if '=' in opt: + opt = opt.split('=') + if opt[0] == 'hostname': + db.setHostName(opt[1]) + elif opt[0] == 'port': + db.setPort(int(opt[1])) + elif opt[0] == 'username': + db.setUserName(opt[1]) + elif opt[0] == 'password': + db.setPassword(opt[1]) + elif opt[0] == 'dbname': + dbname = opt[1] + else: + dbname = opt + + db.setDatabaseName(dbname) + if not db.open(): + raise Exception("Failed to open database " + dbname + " error: " + db.lastError().text()) + + app = QApplication(sys.argv) + window = MainWindow(db, dbname) + window.show() + err = app.exec_() + db.close() + sys.exit(err)
tools/perf/scripts/python/export-to-postgresql.py +47 -0
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