ARM: dts: imx7d: add cortex-a7 coresight component
Subsystems (2)
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
From: Frank Li <[email protected]>
Added etm, etb, funnel and replicator
usage example:
echo 1 >/sys/bus/coresight/devices/30086000.etr/enable_sink
echo 1 >/sys/bus/coresight/devices/3007c000.etm/enable_source
coresight-tmc 30086000.etr: TMC enabled
coresight-replicator replicator.1: REPLICATOR enabled
coresight-tmc 30084000.tmc: TMC enabled
coresight-funnel 30083000.funnel: FUNNEL inport 0 enabled
coresight-funnel 30041000.funnel: FUNNEL inport 0 enabled
coresight-etm3x 3007c000.etm: ETM tracing enabled
etm enable here.
trace data save at /dev/30086000.etr
cat /dev/30086000.etr > trace.data
coresight-tmc 30086000.etr: TMC read start
coresight-tmc 30086000.etr: TMC read end
use ptm2human(https://github.com/hwangcc23/ptm2human) to show trace data
ptm2human -i trace.dataSigned-off-by Frank Li <[email protected]>
---
Change from V1 to V2
- remove "0" after @
- add comments about unused funnel input port
- add comments about add arm,primecell-periphid
arch/arm/boot/dts/imx7d.dtsi | 202 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 202 insertions(+)
arch/arm/boot/dts/imx7d.dtsi +202 -0
@@ -121,6 +121,208 @@ clock-output-names = "osc"; }; + etr at 30086000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30086000 0x1000>; + + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etr_in_port: endpoint { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + tpiu at 30087000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0x30087000 0x1000>; + + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + port { + tpiu_in_port: endpoint at 0 { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + replicator { + /* non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell" + */ + compatible = "arm,coresight-replicator"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port at 0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + port at 1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&etr_in_port>; + }; + }; + + /* replicator input port */ + port at 2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etf_out_port>; + }; + }; + }; + }; + + etf at 30084000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30084000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + etf_in_port: endpoint { + slave-mode; + remote-endpoint = <&hugo_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <0>; + etf_out_port: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + }; + }; + + funnel at 30083000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30083000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + hugo_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&ca_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <1>; + hugo_funnel_in_port1: endpoint { + slave-mode; /* M4 input */ + }; + }; + + port at 2 { + reg = <0>; + hugo_funnel_out_port0: endpoint { + remote-endpoint = <&etf_in_port>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + funnel at 30041000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30041000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + ca_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out_port>; + }; + }; + + port at 1 { + reg = <1>; + ca_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out_port>; + }; + }; + + /* funnel output port */ + port at 2 { + reg = <0>; + ca_funnel_out_port0: endpoint { + remote-endpoint = <&hugo_funnel_in_port0>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + etm at 3007c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007c000 0x1000>; + cpu = <&cpu0>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm0_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port0>; + }; + }; + }; + + etm at 3007d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007d000 0x1000>; + + /* System will hang if added nosmp in kernel command line + * without arm,primecell-periphid because amba bus try to + * read id and core1 power off at this time. + */ + arm,primecell-periphid = <0xbb956>; + cpu = <&cpu1>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm1_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port1>; + }; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>;
Signature · 1 line
1.9.1
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
Hi,
arch/arm/boot/dts/imx7d.dtsi line 314
Quoted 11 lines · Frank.Li at freescale.com
arch/arm/boot/dts/imx7d.dtsi +10
-0+ +???????etm at 3007d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007d000 0x1000>; + + /* System will hang if added nosmp in kernel command line + * without arm,primecell-periphid because amba bus try to + * read id and core1 power off at this time. + */ + arm,primecell-periphid = <0xbb956>;
I do have similar problem, but in my case it is APB clock which is missing during device creation time. And I don't know how to fix it.
Adding Russell King as he's the maintainer of the arm,primecell bus.
arch/arm/boot/dts/imx7d.dtsi line 317
Quoted 3 lines
arch/arm/boot/dts/imx7d.dtsi +3
-0+ cpu = <&cpu1>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk";
Regards,
Ivan
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
Quoted 19 lines · Ivan T. Ivanov
Hi,
arch/arm/boot/dts/imx7d.dtsi line 314
Quoted 11 lines · Frank.Li at freescale.com
arch/arm/boot/dts/imx7d.dtsi +10
-0+ +???????etm at 3007d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007d000 0x1000>; + + /* System will hang if added nosmp in kernel command line + * without arm,primecell-periphid because amba bus try to + * read id and core1 power off at this time. + */ + arm,primecell-periphid = <0xbb956>;I do have similar problem, but in my case it is APB clock which is missing during device creation time. And I don't know how to fix it.
Quoted 1 line
Adding Russell King as he's the maintainer of the arm,primecell bus.
If it was possible to postpone reading the ID until probe time, then that's how I'd suggest to fix this problem, but unfortunately it isn't. We need to know the device's ID by the time the bus ->match function is called.
The problem with the match function is that it has two possible return values: 0 and non-0 meaning "doesn't match" and "does match". There's no possibility of returning -EPROBE_DEFER here.
So, if we don't have the ID when we're trying to match drivers to the devices, our only option is to say "doesn't match" which effectively means it'll never automatically match its driver.
Short of modifying the driver core (which isn't going to be popular) I don't see an easy solution to this problem.
For Frank's problem, this looks to me like something that PM domains should be used for - but I guess it runs into the issue that PM domains aren't up at the time we try to bring secondary CPUs online - and brings with it a whole host of issues surrounding the time that resources (PM domains and therefore clocks) are available.
Maybe what we need there is some way of representing the PM domains, one where drivers can be attached to a PM domain and enquire at load time whether it's powered up.
Signature · 2 lines
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net.
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
Quoted 18 lines · Russell King - ARM Linux
Quoted 17 lines · Ivan T. Ivanov
Hi,
arch/arm/boot/dts/imx7d.dtsi line 314
Quoted 10 lines · Frank.Li at freescale.com
arch/arm/boot/dts/imx7d.dtsi +10
-0+ +???????etm at 3007d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007d000 0x1000>; + + /* System will hang if added nosmp in kernel command line + * without arm,primecell-periphid because amba bus try to + * read id and core1 power off at this time. + */ + arm,primecell-periphid = <0xbb956>;I do have similar problem, but in my case it is APB clock which is missing during device creation time. And I don't know how to fix it.
Quoted 6 lines
Quoted 1 line
Adding Russell King as he's the maintainer of the arm,primecell bus.
If it was possible to postpone reading the ID until probe time, then that's how I'd suggest to fix this problem, but unfortunately it isn't. We need to know the device's ID by the time the bus ->match function is called.
I have tried to read device ID again and again on every bus ->match until succeed. with hope that driver which provide APB clock will be probed in between, and this solve problem for me. But as Stephen Boyd point me, this way uevent used for module auto loading will be broken. So no joy.
Quoted 3 lines
Short of modifying the driver core (which isn't going to be popular) I don't see an easy solution to this problem.
Thanks,
Ivan
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
In reply to Frank.Li at freescale.comQuoted 252 lines · On 1 June 2015 at 14:54, <[email protected]> wrote:
From: Frank Li <[email protected]>
Added etm, etb, funnel and replicator
usage example:
echo 1 >/sys/bus/coresight/devices/30086000.etr/enable_sink echo 1 >/sys/bus/coresight/devices/3007c000.etm/enable_source coresight-tmc 30086000.etr: TMC enabled coresight-replicator replicator.1: REPLICATOR enabled coresight-tmc 30084000.tmc: TMC enabled coresight-funnel 30083000.funnel: FUNNEL inport 0 enabled coresight-funnel 30041000.funnel: FUNNEL inport 0 enabled coresight-etm3x 3007c000.etm: ETM tracing enabled etm enable here. trace data save at /dev/30086000.etr cat /dev/30086000.etr > trace.data coresight-tmc 30086000.etr: TMC read start coresight-tmc 30086000.etr: TMC read end use ptm2human(https://github.com/hwangcc23/ptm2human) to show trace data ptm2human -i trace.dataSigned-off-by Frank Li <[email protected]>---
Change from V1 to V2
- remove "0" after @
- add comments about unused funnel input port
- add comments about add arm,primecell-periphidarch/arm/boot/dts/imx7d.dtsi | 202 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 202 insertions(+)arch/arm/boot/dts/imx7d.dtsi +202
-1@@ -121,6 +121,208 @@ clock-output-names = "osc"; }; + etr at 30086000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30086000 0x1000>; + + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etr_in_port: endpoint { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + tpiu at 30087000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0x30087000 0x1000>; + + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + port { + tpiu_in_port: endpoint at 0 { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + replicator { + /* non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell" + */ + compatible = "arm,coresight-replicator"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port at 0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + port at 1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&etr_in_port>; + }; + }; + + /* replicator input port */ + port at 2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etf_out_port>; + }; + }; + }; + }; + + etf at 30084000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30084000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + etf_in_port: endpoint { + slave-mode; + remote-endpoint = <&hugo_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <0>; + etf_out_port: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + }; + }; + + funnel at 30083000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30083000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + hugo_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&ca_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <1>; + hugo_funnel_in_port1: endpoint { + slave-mode; /* M4 input */ + }; + }; + + port at 2 { + reg = <0>; + hugo_funnel_out_port0: endpoint { + remote-endpoint = <&etf_in_port>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + funnel at 30041000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30041000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + ca_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out_port>; + }; + }; + + port at 1 { + reg = <1>; + ca_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out_port>; + }; + }; + + /* funnel output port */ + port at 2 { + reg = <0>; + ca_funnel_out_port0: endpoint { + remote-endpoint = <&hugo_funnel_in_port0>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + etm at 3007c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007c000 0x1000>; + cpu = <&cpu0>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm0_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port0>; + }; + }; + }; + + etm at 3007d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007d000 0x1000>; + + /* System will hang if added nosmp in kernel command line + * without arm,primecell-periphid because amba bus try to + * read id and core1 power off at this time. + */ + arm,primecell-periphid = <0xbb956>; + cpu = <&cpu1>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm1_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port1>; + }; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>; --
Quoted 2 lines
1.9.1
I am good with this patch and would take it in my tree but I simply can't find "imx7d.dtsi" anywhere. Who is the maintainer, where is the tree?
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
Quoted 3 lines · Mathieu Poirier
I am good with this patch and would take it in my tree but I simply can't find "
imx7d.dtsi" anywhere. Who is the maintainer, where is the tree?
It is in guo shawn's tree.
best regards
Frank Li
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
Quoted 10 lines · Zhi Li
Quoted 3 lines · Mathieu Poirier
I am good with this patch and would take it in my tree but I simply can't find "
imx7d.dtsi" anywhere. Who is the maintainer, where is the tree?It is in guo shawn's tree.
best regards
Frank Li
That explains things - Shawn, can you take the patch? Doing so please add:
Acked-by Mathieu Poirier <[email protected]>
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
In reply to Frank.Li at freescale.comQuoted 43 lines · Frank.Li at freescale.com
From: Frank Li <[email protected]>
Added etm, etb, funnel and replicator
usage example:
echo 1 >/sys/bus/coresight/devices/30086000.etr/enable_sink echo 1 >/sys/bus/coresight/devices/3007c000.etm/enable_source coresight-tmc 30086000.etr: TMC enabled coresight-replicator replicator.1: REPLICATOR enabled coresight-tmc 30084000.tmc: TMC enabled coresight-funnel 30083000.funnel: FUNNEL inport 0 enabled coresight-funnel 30041000.funnel: FUNNEL inport 0 enabled coresight-etm3x 3007c000.etm: ETM tracing enabled etm enable here. trace data save at /dev/30086000.etr cat /dev/30086000.etr > trace.data coresight-tmc 30086000.etr: TMC read start coresight-tmc 30086000.etr: TMC read end use ptm2human(https://github.com/hwangcc23/ptm2human) to show trace data ptm2human -i trace.dataSigned-off-by Frank Li <[email protected]>---
Change from V1 to V2
- remove "0" after @
- add comments about unused funnel input port
- add comments about add arm,primecell-periphidarch/arm/boot/dts/imx7d.dtsi | 202 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 202 insertions(+)arch/arm/boot/dts/imx7d.dtsi +0
-0
arch/arm/boot/dts/imx7d.dtsi line 127
Quoted 7 lines
arch/arm/boot/dts/imx7d.dtsi +4
-0@@ -121,6 +121,208 @@ clock-output-names = "osc"; }; + etr at 30086000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30086000 0x1000>; +
Drop this new line.
Quoted 5 lines
arch/arm/boot/dts/imx7d.dtsi +5
-0+ clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etr_in_port: endpoint {
arch/arm/boot/dts/imx7d.dtsi line 142
Quoted 10 lines
arch/arm/boot/dts/imx7d.dtsi +10
-0+ slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + tpiu at 30087000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0x30087000 0x1000>; +
Ditto
arch/arm/boot/dts/imx7d.dtsi line 144
Quoted 2 lines
arch/arm/boot/dts/imx7d.dtsi +2
-0+ clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk";
Have a new line here.
arch/arm/boot/dts/imx7d.dtsi line 146
Quoted 2 lines
arch/arm/boot/dts/imx7d.dtsi +2
-0+ port { + tpiu_in_port: endpoint at 0 {
Why do we need a @unit-address here?
arch/arm/boot/dts/imx7d.dtsi line 156
Quoted 10 lines
arch/arm/boot/dts/imx7d.dtsi +10
-0+ slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + replicator { + /* non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell" + */
/* * Multiple-line comment */
Quoted 147 lines
arch/arm/boot/dts/imx7d.dtsi +147
-0+ compatible = "arm,coresight-replicator"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port at 0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + port at 1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&etr_in_port>; + }; + }; + + /* replicator input port */ + port at 2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etf_out_port>; + }; + }; + }; + }; + + etf at 30084000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30084000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + etf_in_port: endpoint { + slave-mode; + remote-endpoint = <&hugo_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <0>; + etf_out_port: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + }; + }; + + funnel at 30083000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30083000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + hugo_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&ca_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <1>; + hugo_funnel_in_port1: endpoint { + slave-mode; /* M4 input */ + }; + }; + + port at 2 { + reg = <0>; + hugo_funnel_out_port0: endpoint { + remote-endpoint = <&etf_in_port>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + funnel at 30041000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30041000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + ca_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out_port>; + }; + }; + + port at 1 { + reg = <1>; + ca_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out_port>; + }; + }; + + /* funnel output port */ + port at 2 { + reg = <0>; + ca_funnel_out_port0: endpoint { + remote-endpoint = <&hugo_funnel_in_port0>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + etm at 3007c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007c000 0x1000>; + cpu = <&cpu0>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm0_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port0>; + }; + };
arch/arm/boot/dts/imx7d.dtsi line 313
Quoted 10 lines
arch/arm/boot/dts/imx7d.dtsi +10
-0+ }; + + etm at 3007d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007d000 0x1000>; + + /* System will hang if added nosmp in kernel command line + * without arm,primecell-periphid because amba bus try to + * read id and core1 power off at this time. + */
/* * Multiple-line comment */
arch/arm/boot/dts/imx7d.dtsi line 314
Quoted 1 line
arch/arm/boot/dts/imx7d.dtsi +1
-0+ arm,primecell-periphid = <0xbb956>;
One space after '='
Shawn
Quoted 22 lines
arch/arm/boot/dts/imx7d.dtsi +11
-0+ cpu = <&cpu1>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm1_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port1>; + }; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>;Signature · 7 lines
1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v2 1/1 ARM: dts: imx7d: add cortex-a7 coresight component
Quoted 75 lines · Shawn Guo
Quoted 43 lines · Frank.Li at freescale.com
From: Frank Li <[email protected]>
Added etm, etb, funnel and replicator
usage example:
echo 1 >/sys/bus/coresight/devices/30086000.etr/enable_sink echo 1 >/sys/bus/coresight/devices/3007c000.etm/enable_source coresight-tmc 30086000.etr: TMC enabled coresight-replicator replicator.1: REPLICATOR enabled coresight-tmc 30084000.tmc: TMC enabled coresight-funnel 30083000.funnel: FUNNEL inport 0 enabled coresight-funnel 30041000.funnel: FUNNEL inport 0 enabled coresight-etm3x 3007c000.etm: ETM tracing enabled etm enable here. trace data save at /dev/30086000.etr cat /dev/30086000.etr > trace.data coresight-tmc 30086000.etr: TMC read start coresight-tmc 30086000.etr: TMC read end use ptm2human(https://github.com/hwangcc23/ptm2human) to show trace data ptm2human -i trace.dataSigned-off-by Frank Li <[email protected]>---
Change from V1 to V2
- remove "0" after @
- add comments about unused funnel input port
- add comments about add arm,primecell-periphidarch/arm/boot/dts/imx7d.dtsi | 202 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 202 insertions(+)arch/arm/boot/dts/imx7d.dtsi +0
-0arch/arm/boot/dts/imx7d.dtsi line 127
Quoted 7 lines
arch/arm/boot/dts/imx7d.dtsi +4
-0@@ -121,6 +121,208 @@ clock-output-names = "osc"; }; + etr at 30086000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30086000 0x1000>; +Drop this new line.
Quoted 5 lines
arch/arm/boot/dts/imx7d.dtsi +5
-0+ clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etr_in_port: endpoint {arch/arm/boot/dts/imx7d.dtsi line 142
Quoted 10 lines
arch/arm/boot/dts/imx7d.dtsi +10
-0+ slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + tpiu at 30087000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0x30087000 0x1000>; +Ditto
arch/arm/boot/dts/imx7d.dtsi line 144
Quoted 2 lines
arch/arm/boot/dts/imx7d.dtsi +2
-0+ clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk";
Quoted 6 lines
Have a new line here.
arch/arm/boot/dts/imx7d.dtsi line 146
Quoted 2 lines
arch/arm/boot/dts/imx7d.dtsi +2
-0+ port { + tpiu_in_port: endpoint at 0 {Why do we need a @unit-address here?
Good catch - The "@0" is indeed not required.
Quoted 206 lines
arch/arm/boot/dts/imx7d.dtsi line 156
Quoted 11 lines
arch/arm/boot/dts/imx7d.dtsi +10
-0+ slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + replicator { + /* non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell" + *//* * Multiple-line comment */Quoted 147 lines
arch/arm/boot/dts/imx7d.dtsi +147
-0+ compatible = "arm,coresight-replicator"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port at 0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + port at 1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&etr_in_port>; + }; + }; + + /* replicator input port */ + port at 2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etf_out_port>; + }; + }; + }; + }; + + etf at 30084000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x30084000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + etf_in_port: endpoint { + slave-mode; + remote-endpoint = <&hugo_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <0>; + etf_out_port: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + }; + }; + + funnel at 30083000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30083000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + hugo_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&ca_funnel_out_port0>; + }; + }; + + port at 1 { + reg = <1>; + hugo_funnel_in_port1: endpoint { + slave-mode; /* M4 input */ + }; + }; + + port at 2 { + reg = <0>; + hugo_funnel_out_port0: endpoint { + remote-endpoint = <&etf_in_port>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + funnel at 30041000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x30041000 0x1000>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel input ports */ + port at 0 { + reg = <0>; + ca_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out_port>; + }; + }; + + port at 1 { + reg = <1>; + ca_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out_port>; + }; + }; + + /* funnel output port */ + port at 2 { + reg = <0>; + ca_funnel_out_port0: endpoint { + remote-endpoint = <&hugo_funnel_in_port0>; + }; + }; + + /* the other input ports are not connect to anything */ + }; + }; + + etm at 3007c000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007c000 0x1000>; + cpu = <&cpu0>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm0_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port0>; + }; + };arch/arm/boot/dts/imx7d.dtsi line 313
Quoted 10 lines
arch/arm/boot/dts/imx7d.dtsi +10
-0+ }; + + etm at 3007d000 { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x3007d000 0x1000>; + + /* System will hang if added nosmp in kernel command line + * without arm,primecell-periphid because amba bus try to + * read id and core1 power off at this time. + *//* * Multiple-line comment */arch/arm/boot/dts/imx7d.dtsi line 314
Quoted 1 line
arch/arm/boot/dts/imx7d.dtsi +1
-0+ arm,primecell-periphid = <0xbb956>;One space after '='
Shawn
Quoted 22 lines
arch/arm/boot/dts/imx7d.dtsi +11
-1+ cpu = <&cpu1>; + clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; + clock-names = "apb_pclk"; + + port { + etm1_out_port: endpoint { + remote-endpoint = <&ca_funnel_in_port1>; + }; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>; --1.9.1
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