Add Mediatek MMC driver
Subsystems (6)
Chaotian Jing
maintainerv6 cover Add Mediatek MMC driver
This series enables MMC support on the MT8135/MT8173 platform. MT8135 has 5 MMC controllers and MT8173 has 4 MMC controllers.
Changes base on Ulf's comments
Make hclk mandatory in the driver code
Change host->hclk to host->src_clk_freq
Add linux/pm.h
Chaotian Jing (3):
mmc: dt-bindings: add Mediatek MMC bindings
mmc: mediatek: Add Mediatek MMC driver
mmc: mediatek: Add PM support for MMC driver
Eddie Huang (2):
arm64: dts: mediatek: Add MT8173 MMC dts
arm64: mediatek: Add Mediatek MMC support in defconfig
Yingjoe Chen (2):
ARM: mediatek: dts: Add emmc support to mt8135
ARM: multi_v7_defconfig: Enable Mediatek MMC support multi-v7
Documentation/devicetree/bindings/mmc/mtk-sd.txt | 32 + arch/arm/boot/dts/mt8135-evbp1.dts | 158 +++ arch/arm/boot/dts/mt8135.dtsi | 55 + arch/arm/configs/multi_v7_defconfig | 1 + arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +- arch/arm64/configs/defconfig | 1 + drivers/mmc/host/Kconfig | 8 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/mtk-sd.c | 1461 ++++++++++++++++++++++ include/linux/mmc/core.h | 1 + 11 files changed, 1888 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/mmc/mtk-sd.txt create mode 100644 drivers/mmc/host/mtk-sd.c
Signature · 1 line
1.8.1.1.dirty
Chaotian Jing
maintainerPATCH v6 1/7 mmc: dt-bindings: add Mediatek MMC bindings
Document the device-tree binding of Mediatek MMC host
--- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 32 ++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/mtk-sd.txt
Documentation/devicetree/bindings/mmc/mtk-sd.txt new file +32 -0
@@ -0,0 +1,32 @@ +* MTK MMC controller + +The MTK MSDC can act as a MMC controller +to support MMC, SD, and SDIO types of memory cards. + +This file documents differences between the core properties in mmc.txt +and the properties used by the msdc driver. + +Required properties: +- compatible: Should be "mediatek,mt8173-mmc","mediatek,mt8135-mmc" +- interrupts: Should contain MSDC interrupt number +- clocks: MSDC source clock, HCLK +- clock-names: "source", "hclk" +- pinctrl-names: should be "default", "state_uhs" +- pinctrl-0: should contain default/high speed pin ctrl +- pinctrl-1: should contain uhs mode pin ctrl +- vmmc-supply: power to the Core +- vqmmc-supply: power to the IO + +Examples: +mmc0: mmc at 11230000 { + compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc"; + reg = <0 0x11230000 0 0x108>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>; + clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>; + clock-names = "source", "hclk"; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; +};
Signature · 1 line
1.8.1.1.dirty
Chaotian Jing
maintainerPATCH v6 2/7 mmc: mediatek: Add Mediatek MMC driver
In reply to Chaotian JingAdd Mediatek MMC driver code
Support eMMC/SD/SDIO
--- drivers/mmc/host/Kconfig | 8 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/mtk-sd.c | 1378 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/mmc/core.h | 1 + 4 files changed, 1388 insertions(+) create mode 100644 drivers/mmc/host/mtk-sd.c
drivers/mmc/host/Kconfig +8 -0
@@ -775,3 +775,11 @@ config MMC_TOSHIBA_PCI tristate "Toshiba Type A SD/MMC Card Interface Driver" depends on PCI help + +config MMC_MTK + tristate "MediaTek SD/MMC Card Interface support" + help + This selects the MediaTek(R) Secure digital and Multimedia card Interface. + If you have a machine with a integrated SD/MMC card reader, say Y or M here. + This is needed if support for any SD/SDIO/MMC devices is required. + If unsure, say N.
drivers/mmc/host/Makefile +1 -0
@@ -20,6 +20,7 @@ obj-$(CONFIG_MMC_SDHCI_F_SDH30) += sdhci_f_sdh30.o obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o obj-$(CONFIG_MMC_WBSD) += wbsd.o obj-$(CONFIG_MMC_AU1X) += au1xmmc.o +obj-$(CONFIG_MMC_MTK) += mtk-sd.o obj-$(CONFIG_MMC_OMAP) += omap.o obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
drivers/mmc/host/mtk-sd.c new file +1378 -0
1,378 lines not on this page · raw message
include/linux/mmc/core.h +1 -0
@@ -121,6 +121,7 @@ struct mmc_data {struct mmc_request *mrq;/* associated request */ unsigned int sg_len;/* size of scatter list */ +int sg_count;/* mapped sg entries */ struct scatterlist *sg;/* I/O scatter list */ s32 host_cookie;/* host private data */ };
Signature · 1 line
1.8.1.1.dirty
Chaotian Jing
maintainerPATCH v6 3/7 mmc: mediatek: Add PM support for MMC driver
In reply to Chaotian JingAdd PM support for Mediatek MMC driver
Save/restore registers when PM
--- drivers/mmc/host/mtk-sd.c | 89 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 86 insertions(+), 3 deletions(-)
drivers/mmc/host/mtk-sd.c +86 -3
@@ -22,6 +22,8 @@#include <linux/of_gpio.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> +#include <linux/pm.h> +#include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> #include <linux/spinlock.h>
@@ -212,6 +214,7 @@#define MSDC_ASYNC_FLAG (0x1 << 1)#define MSDC_MMAP_FLAG (0x1 << 2) +#define MTK_MMC_AUTOSUSPEND_DELAY 50#define CMD_TIMEOUT (HZ/10 * 5)/* 100ms x5 */ #define DAT_TIMEOUT (HZ * 5)/* 1000ms x5 */
@@ -254,6 +257,15 @@ struct msdc_dma {dma_addr_t bd_addr;/* the physical address of bd array */ }; +struct msdc_save_para { +u32 msdc_cfg; +u32 iocon; +u32 sdc_cfg; +u32 pad_tune; +u32 patch_bit0; +u32 patch_bit1; +}; +struct msdc_host {struct device *dev;struct mmc_host *mmc;/* mmc structure */
@@ -286,6 +298,7 @@ struct msdc_host {u32 sclk;/* SD/MS bus clock frequency */ bool ddr;bool vqmmc_enabled; +struct msdc_save_para save_para;/* used when gate HCLK */ };static void sdr_set_bits (void __iomem *reg,u32 bs)
@@ -677,6 +690,9 @@ static void msdc_request_done(struct msdc_host *host, struct mmc_request *mrq)if (mrq->data)msdc_unprepare_data (host, mrq);mmc_request_done (host->mmc, mrq); + +pm_runtime_mark_last_busy (host->dev); +pm_runtime_put_autosuspend (host->dev); }/* returns true if command is fully handled; returns false otherwise */
@@ -831,6 +847,8 @@ static void msdc_ops_request(struct mmc_host *mmc, struct mmc_request *mrq)WARN_ON (host->mrq); host->mrq = mrq; +pm_runtime_get_sync (host->dev); +if (mrq->data)msdc_prepare_data (host, mrq);
@@ -1145,6 +1163,8 @@ static void msdc_ops_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)int ret;u32 ddr =0 ; +pm_runtime_get_sync (host->dev); +if (ios->timing ==MMC_TIMING_UHS_DDR50 || ios->timing ==MMC_TIMING_MMC_DDR52 ) ddr =1 ;
@@ -1159,7 +1179,7 @@ static void msdc_ops_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ios->vdd);if (ret) {dev_err (host->dev,"Failed to set vmmc power!\n" ); -return ; + goto end; } }break ;
@@ -1187,6 +1207,10 @@ static void msdc_ops_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)if (host->mclk != ios->clock || host->ddr != ddr)msdc_set_mclk (host, ddr, ios->clock); + +end: +pm_runtime_mark_last_busy (host->dev); +pm_runtime_put_autosuspend (host->dev); }static struct mmc_host_ops mt_msdc_ops = {
@@ -1310,12 +1334,18 @@ static int msdc_drv_probe(struct platform_device *pdev)if (ret) goto release; +pm_runtime_set_active (host->dev); +pm_runtime_set_autosuspend_delay (host->dev,MTK_MMC_AUTOSUSPEND_DELAY ); +pm_runtime_use_autosuspend (host->dev); +pm_runtime_enable (host->dev); ret =mmc_add_host (mmc); +if (ret) - goto release; + goto end;return 0 ; - +end: +pm_runtime_disable (host->dev); release:platform_set_drvdata (pdev,NULL );msdc_deinit_hw (host);
@@ -1343,11 +1373,15 @@ static int msdc_drv_remove(struct platform_device *pdev) mmc =platform_get_drvdata (pdev); host =mmc_priv (mmc); +pm_runtime_get_sync (host->dev); +platform_set_drvdata (pdev,NULL );mmc_remove_host (host->mmc);msdc_deinit_hw (host);msdc_gate_clock (host); +pm_runtime_disable (host->dev); +pm_runtime_put_noidle (host->dev);dma_free_coherent (&pdev->dev,sizeof (struct mt_gpdma_desc ), host->dma.gpd, host->dma.gpd_addr);
@@ -1359,6 +1393,54 @@ static int msdc_drv_remove(struct platform_device *pdev)return 0 ; } +#ifdef CONFIG_PM +static void msdc_save_reg (struct msdc_host *host) +{ + host->save_para.msdc_cfg =readl (host->base +MSDC_CFG ); + host->save_para.iocon =readl (host->base +MSDC_IOCON ); + host->save_para.sdc_cfg =readl (host->base +SDC_CFG ); + host->save_para.pad_tune =readl (host->base +MSDC_PAD_TUNE ); + host->save_para.patch_bit0 =readl (host->base +MSDC_PATCH_BIT ); + host->save_para.patch_bit1 =readl (host->base +MSDC_PATCH_BIT1 ); +} + +static void msdc_restore_reg (struct msdc_host *host) +{ +writel (host->save_para.msdc_cfg, host->base +MSDC_CFG ); +writel (host->save_para.iocon, host->base +MSDC_IOCON ); +writel (host->save_para.sdc_cfg, host->base +SDC_CFG ); +writel (host->save_para.pad_tune, host->base +MSDC_PAD_TUNE ); +writel (host->save_para.patch_bit0, host->base +MSDC_PATCH_BIT ); +writel (host->save_para.patch_bit1, host->base +MSDC_PATCH_BIT1 ); +} + +static int msdc_runtime_suspend (struct device *dev) +{ +struct mmc_host *mmc =dev_get_drvdata (dev); +struct msdc_host *host =mmc_priv (mmc); + +msdc_save_reg (host); +msdc_gate_clock (host); +return 0 ; +} + +static int msdc_runtime_resume (struct device *dev) +{ +struct mmc_host *mmc =dev_get_drvdata (dev); +struct msdc_host *host =mmc_priv (mmc); + +msdc_ungate_clock (host); +msdc_restore_reg (host); +return 0 ; +} +#endif + +static const struct dev_pm_ops msdc_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) +SET_RUNTIME_PM_OPS (msdc_runtime_suspend, msdc_runtime_resume,NULL ) +}; +static const struct of_device_id msdc_of_ids[] = { { .compatible ="mediatek,mt8135-mmc" , }, {}
@@ -1370,6 +1452,7 @@ static struct platform_driver mt_msdc_driver = { .driver = { .name = "mtk-msdc", .of_match_table = msdc_of_ids, + .pm = &msdc_dev_pm_ops, }, };
Signature · 1 line
1.8.1.1.dirty
Chaotian Jing
maintainerPATCH v6 4/7 arm64: dts: mediatek: Add MT8173 MMC dts
In reply to Chaotian JingFrom: Eddie Huang <[email protected]>
Add node mmc0 ~ mmc3 for mt8173.dtsi
Add node mmc0, mmc1 for mt8173-evb.dts
--- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +++++++++- 2 files changed, 170 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +126 -0
@@ -33,6 +33,132 @@ chosen { }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>; + non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>; + status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + cd-gpios = <&pio 132 0>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>; +}; + +&pio { + mmc0_pins_default: mmc0default { + pins_cmd_dat { + pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; + input-enable; + bias-pull-up; + }; + + pins_clk { + pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; + bias-pull-down; + }; + + pins_rst { + pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_default: mmc1default { + pins_cmd_dat { + pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; + }; + + pins_clk { + pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; + bias-pull-down; + drive-strength = <MTK_DRIVE_4mA>; + }; + + pins_insert { + pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>; + bias-pull-up; + }; + }; + + mmc0_pins_uhs: mmc0 at 0{ + pins_cmd_dat { + pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_2mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_clk { + pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; + drive-strength = <MTK_DRIVE_2mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_rst { + pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_uhs: mmc1 at 0 { + pins_cmd_dat { + pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; + }; + + pins_clk { + pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + }; + }; +}; + &pwrap { pmic: mt6397 { compatible = "mediatek,mt6397";
arch/arm64/boot/dts/mediatek/mt8173.dtsi +44 -1
51 lines not on this page · raw message
Signature · 1 line
1.8.1.1.dirty
Re: [PATCH v6 4/7] arm64: dts: mediatek: Add MT8173 MMC dts
Hi Chaotian,
Quoted 167 lines · Chaotian Jing
From: Eddie Huang <[email protected]>
Add node mmc0 ~ mmc3 for
mt8173.dtsi
Add node mmc0, mmc1 formt8173-evb.dtsSigned-off-by Chaotian Jing <[email protected]>Signed-off-by Eddie Huang <[email protected]>--- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +++++++++- 2 files changed, 170 insertions(+), 1 deletion(-)arch/arm64/boot/dts/mediatek/mt8173-evb.dts +126
-0@@ -33,6 +33,132 @@ chosen { }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>; + non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>; + status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + cd-gpios = <&pio 132 0>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>; +}; + +&pio { + mmc0_pins_default: mmc0default { + pins_cmd_dat { + pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; + input-enable; + bias-pull-up; + }; + + pins_clk { + pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; + bias-pull-down; + }; + + pins_rst { + pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_default: mmc1default { + pins_cmd_dat { + pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; + }; + + pins_clk { + pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; + bias-pull-down; + drive-strength = <MTK_DRIVE_4mA>; + }; + + pins_insert { + pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>; + bias-pull-up; + }; + }; + + mmc0_pins_uhs: mmc0 at 0{ + pins_cmd_dat { + pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_2mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_clk { + pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; + drive-strength = <MTK_DRIVE_2mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_rst { + pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_uhs: mmc1 at 0 { + pins_cmd_dat { + pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; + }; + + pins_clk { + pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + }; + }; +}; + &pwrap { pmic: mt6397 { compatible = "mediatek,mt6397";arch/arm64/boot/dts/mediatek/mt8173.dtsi +8
-1@@ -288,7 +288,50 @@ reg = <0 0x19000000 0 0x1000>; #clock-cells = <1>; }; - }; + mmc0: mmc at 11230000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11230000 0 0x1000>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_0>, + <&topckgen CLK_TOP_MSDC50_0_H_SEL>; + clock-names = "source", "hclk";
arch/arm64/boot/dts/mediatek/mt8173.dtsi line 309
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173.dtsi +10
-0+ status = "disabled"; + }; + + mmc1: mmc at 11240000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11240000 0 0x1000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_1>, + <&clk_null>;
This requires a "clk_null" phandle, but I have not seen a patch adding that on the public list.
Did I miss a patch?
-Dan
Quoted 36 lines
arch/arm64/boot/dts/mediatek/mt8173.dtsi +26
-1+ clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc2: mmc at 11250000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11250000 0 0x1000>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_2>, + <&clk_null>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc3: mmc at 11260000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11260000 0 0x1000>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_3>, + <&topckgen CLK_TOP_MSDC50_2_H_SEL>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + }; }; --1.8.1.1.dirty
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Re: [PATCH v6 4/7] arm64: dts: mediatek: Add MT8173 MMC dts
Quoted 24 lines · Daniel Kurtz
Hi Chaotian,
Quoted 20 lines · Chaotian Jing
From: Eddie Huang <[email protected]>
Add node mmc0 ~ mmc3 for
mt8173.dtsi
Add node mmc0, mmc1 formt8173-evb.dtsSigned-off-by Chaotian Jing <[email protected]>Signed-off-by Eddie Huang <[email protected]>--- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +++++++++- 2 files changed, 170 insertions(+), 1 deletion(-)arch/arm64/boot/dts/mediatek/mt8173-evb.dts +0
-0@@ -33,6 +33,132 @@ chosen { }; };
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 45
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +10
-0+&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>;
I also can't find phandles for these regulators.
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +7
-0+ non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>;
Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 60
Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +8
-0+ status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + cd-gpios = <&pio 132 0>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>;
nor these regulators.
Which kernel branch are you basing your patch set on?
Thanks,
-Dan
Quoted 175 lines
Quoted 122 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +101
-0+}; + +&pio { + mmc0_pins_default: mmc0default { + pins_cmd_dat { + pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; + input-enable; + bias-pull-up; + }; + + pins_clk { + pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; + bias-pull-down; + }; + + pins_rst { + pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_default: mmc1default { + pins_cmd_dat { + pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; + }; + + pins_clk { + pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; + bias-pull-down; + drive-strength = <MTK_DRIVE_4mA>; + }; + + pins_insert { + pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>; + bias-pull-up; + }; + }; + + mmc0_pins_uhs: mmc0 at 0{ + pins_cmd_dat { + pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_2mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_clk { + pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; + drive-strength = <MTK_DRIVE_2mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_rst { + pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_uhs: mmc1 at 0 { + pins_cmd_dat { + pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; + input-enable; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; + }; + + pins_clk { + pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; + drive-strength = <MTK_DRIVE_4mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + }; + }; +}; + &pwrap { pmic: mt6397 { compatible = "mediatek,mt6397";arch/arm64/boot/dts/mediatek/mt8173.dtsi +8
-1@@ -288,7 +288,50 @@ reg = <0 0x19000000 0 0x1000>; #clock-cells = <1>; }; - }; + mmc0: mmc at 11230000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11230000 0 0x1000>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_0>, + <&topckgen CLK_TOP_MSDC50_0_H_SEL>; + clock-names = "source", "hclk";arch/arm64/boot/dts/mediatek/mt8173.dtsi line 309
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173.dtsi +10
-0+ status = "disabled"; + }; + + mmc1: mmc at 11240000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11240000 0 0x1000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_1>, + <&clk_null>;This requires a "
clk_null" phandle, but I have not seen a patch adding that on the public list.
Did I miss a patch?-Dan
Quoted 36 lines
arch/arm64/boot/dts/mediatek/mt8173.dtsi +26
-1+ clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc2: mmc at 11250000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11250000 0 0x1000>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_2>, + <&clk_null>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc3: mmc at 11260000 { + compatible = "mediatek,mt8173-mmc", + "mediatek,mt8135-mmc"; + reg = <0 0x11260000 0 0x1000>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_MSDC30_3>, + <&topckgen CLK_TOP_MSDC50_2_H_SEL>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + }; }; --1.8.1.1.dirty
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PATCH v6 4/7 arm64: dts: mediatek: Add MT8173 MMC dts
Hi Dan,
Quoted 54 lines · Daniel Kurtz
Quoted 22 lines · Daniel Kurtz
Quoted 20 lines · Chaotian Jing
From: Eddie Huang <[email protected]>
Add node mmc0 ~ mmc3 for
mt8173.dtsi
Add node mmc0, mmc1 formt8173-evb.dtsSigned-off-by Chaotian Jing <[email protected]>Signed-off-by Eddie Huang <[email protected]>--- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +++++++++- 2 files changed, 170 insertions(+), 1 deletion(-)arch/arm64/boot/dts/mediatek/mt8173-evb.dts +0
-0@@ -33,6 +33,132 @@ chosen { }; };Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 45
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +10
-0+&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>;I also can't find phandles for these regulators.
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +7
-0+ non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>;Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 60
Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +8
-0+ status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + cd-gpios = <&pio 132 0>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>;nor these regulators.
Quoted 2 lines
Which kernel branch are you basing your patch set on?
It is based on 4.1-rc1, and Sascha's regulator dts patch. [3/4] ARM: dts: mt8135-evbp1: Add PMIC support:
https://patchwork.kernel.org/patch/6261161/
Eddie
Thanks
PATCH v6 4/7 arm64: dts: mediatek: Add MT8173 MMC dts
Hi Dan,
Quoted 57 lines · Eddie Huang
Hi Dan,
Quoted 54 lines · Daniel Kurtz
Quoted 22 lines · Daniel Kurtz
Quoted 20 lines · Chaotian Jing
From: Eddie Huang <[email protected]>
Add node mmc0 ~ mmc3 for
mt8173.dtsi
Add node mmc0, mmc1 formt8173-evb.dtsSigned-off-by Chaotian Jing <[email protected]>Signed-off-by Eddie Huang <[email protected]>--- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +++++++++- 2 files changed, 170 insertions(+), 1 deletion(-)arch/arm64/boot/dts/mediatek/mt8173-evb.dts +0
-0@@ -33,6 +33,132 @@ chosen { }; };Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 45
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +10
-0+&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>;I also can't find phandles for these regulators.
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +7
-0+ non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>;Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 60
Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +8
-0+ status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + cd-gpios = <&pio 132 0>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>;nor these regulators.
Quoted 6 lines
Quoted 2 lines
Which kernel branch are you basing your patch set on?
It is based on 4.1-rc1, and Sascha's regulator dts patch. [3/4] ARM: dts: mt8135-evbp1: Add PMIC support:
https://patchwork.kernel.org/patch/6261161/
My mistake, we only sent mt8135-evbp1.dts, but this patch need mt8173-evb.dts, we will send this.
Eddie
Thanks
Re: [PATCH v6 4/7] arm64: dts: mediatek: Add MT8173 MMC dts
Quoted 61 lines · Eddie Huang
Hi Dan,
Quoted 57 lines · Eddie Huang
Hi Dan,
Quoted 54 lines · Daniel Kurtz
Quoted 22 lines · Daniel Kurtz
Quoted 20 lines · Chaotian Jing
From: Eddie Huang <[email protected]>
Add node mmc0 ~ mmc3 for
mt8173.dtsi
Add node mmc0, mmc1 formt8173-evb.dtsSigned-off-by Chaotian Jing <[email protected]>Signed-off-by Eddie Huang <[email protected]>--- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +++++++++- 2 files changed, 170 insertions(+), 1 deletion(-)arch/arm64/boot/dts/mediatek/mt8173-evb.dts +0
-0@@ -33,6 +33,132 @@ chosen { }; };Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 45
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +10
-0+&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>;I also can't find phandles for these regulators.
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +7
-0+ non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>;Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 60
Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +8
-0+ status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + cd-gpios = <&pio 132 0>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>;nor these regulators.
Quoted 8 lines
Quoted 6 lines
Quoted 2 lines
Which kernel branch are you basing your patch set on?
It is based on 4.1-rc1, and Sascha's regulator dts patch. [3/4] ARM: dts: mt8135-evbp1: Add PMIC support:
https://patchwork.kernel.org/patch/6261161/My mistake, we only sent
mt8135-evbp1.dts, but this patch needmt8173-evb.dts, we will send this.
Hi Eddie,
When do you plan to send an updated mmc patch set?
Thanks,
-Dan
Quoted 8 lines
Eddie
Thanks
PATCH v6 4/7 arm64: dts: mediatek: Add MT8173 MMC dts
Hi Dan,
Quoted 63 lines · Daniel Kurtz
Quoted 62 lines · Eddie Huang
Quoted 62 lines · Eddie Huang
Quoted 54 lines · Daniel Kurtz
Quoted 22 lines · Daniel Kurtz
Quoted 20 lines · Chaotian Jing
From: Eddie Huang <[email protected]>
Add node mmc0 ~ mmc3 for
mt8173.dtsi
Add node mmc0, mmc1 formt8173-evb.dtsSigned-off-by Chaotian Jing <[email protected]>Signed-off-by Eddie Huang <[email protected]>--- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +++++++++- 2 files changed, 170 insertions(+), 1 deletion(-)arch/arm64/boot/dts/mediatek/mt8173-evb.dts +0
-0@@ -33,6 +33,132 @@ chosen { }; };Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 45
Quoted 10 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +10
-0+&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + vqmmc-supply = <&mt6397_vio18_reg>;I also can't find phandles for these regulators.
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +7
-0+ non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>;Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts line 60
Quoted 8 lines
arch/arm64/boot/dts/mediatek/mt8173-evb.dts +8
-0+ status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + cd-gpios = <&pio 132 0>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>;nor these regulators.
Quoted 2 lines
Which kernel branch are you basing your patch set on?
It is based on 4.1-rc1, and Sascha's regulator dts patch. [3/4] ARM: dts: mt8135-evbp1: Add PMIC support:
https://patchwork.kernel.org/patch/6261161/
Quoted 8 lines
Quoted 2 lines
My mistake, we only sent
mt8135-evbp1.dts, but this patch needmt8173-evb.dts, we will send this.Hi Eddie,
When do you plan to send an updated mmc patch set?
This patch depends on clock_null patch [0] that James still working on it. We will send new patch after [0] clarify.
[0]:
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/351255.html
Thanks
Eddie
Chaotian Jing
maintainerPATCH v6 5/7 ARM: mediatek: dts: Add emmc support to mt8135
In reply to Chaotian JingFrom: Yingjoe Chen <[email protected]>
Add emmc node for mt8135.dtsi & mt8135-evbp1.dts
--- arch/arm/boot/dts/mt8135-evbp1.dts | 158 +++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/mt8135.dtsi | 55 +++++++++++++ 2 files changed, 213 insertions(+)
arch/arm/boot/dts/mt8135-evbp1.dts +158 -0
@@ -24,6 +24,164 @@ }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>; + status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>; + cd-gpios = <&pio 63 0>; + cap-sd-highspeed; + sd-uhs-sdr25; +}; + +&pio { + mmc0_pins_default: mmc0default { + pins_cmd_dat { + pinmux = <MT8135_PIN_9_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8135_PIN_8_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8135_PIN_7_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8135_PIN_6_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8135_PIN_3_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8135_PIN_2_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8135_PIN_1_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8135_PIN_0_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8135_PIN_4_MSDC0_CMD__FUNC_MSDC0_CMD>; + bias-pull-up; + }; + + pins_clk { + pinmux = <MT8135_PIN_5_MSDC0_CLK__FUNC_MSDC0_CLK>; + bias-pull-down; + }; + + pins_rst { + pinmux = <MT8135_PIN_33_MSDC0_RSTB__FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_default: mmc1default { + pins_cmd_dat { + pinmux = <MT8135_PIN_83_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8135_PIN_84_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8135_PIN_87_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8135_PIN_88_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8135_PIN_85_MSDC1_CMD__FUNC_MSDC1_CMD>; + bias-pull-up; + }; + + pins_clk { + pinmux = <MT8135_PIN_86_MSDC1_CLK__FUNC_MSDC1_CLK>; + bias-pull-down; + }; + + pins_insi { + pinmux = <MT8135_PIN_63_MSDC1_INSI__FUNC_MSDC1_INSI>; + bias-pull-up; + }; + }; + + mmc2_pins_default: mmc2default { + pins_cmd_dat { + pinmux = <MT8135_PIN_82_MSDC2_DAT0__FUNC_MSDC2_DAT0>, + <MT8135_PIN_81_MSDC2_DAT1__FUNC_MSDC2_DAT1>, + <MT8135_PIN_77_MSDC2_DAT2__FUNC_MSDC2_DAT2>, + <MT8135_PIN_78_MSDC2_DAT3__FUNC_MSDC2_DAT3>, + <MT8135_PIN_79_MSDC2_CMD__FUNC_MSDC2_CMD>; + bias-pull-up; + }; + + pins_clk { + pinmux = <MT8135_PIN_80_MSDC2_CLK__FUNC_MSDC2_CLK>; + bias-pull-down; + }; + + pins_insi { + pinmux = <MT8135_PIN_65_MSDC2_INSI__FUNC_MSDC2_INSI>; + bias-pull-up; + }; + }; + + mmc0_pins_uhs: mmc0 at 0 { + pins_cmd_dat { + pinmux = <MT8135_PIN_9_MSDC0_DAT0__FUNC_MSDC0_DAT0>, + <MT8135_PIN_8_MSDC0_DAT1__FUNC_MSDC0_DAT1>, + <MT8135_PIN_7_MSDC0_DAT2__FUNC_MSDC0_DAT2>, + <MT8135_PIN_6_MSDC0_DAT3__FUNC_MSDC0_DAT3>, + <MT8135_PIN_3_MSDC0_DAT4__FUNC_MSDC0_DAT4>, + <MT8135_PIN_2_MSDC0_DAT5__FUNC_MSDC0_DAT5>, + <MT8135_PIN_1_MSDC0_DAT6__FUNC_MSDC0_DAT6>, + <MT8135_PIN_0_MSDC0_DAT7__FUNC_MSDC0_DAT7>, + <MT8135_PIN_4_MSDC0_CMD__FUNC_MSDC0_CMD>; + drive-strength = <MTK_DRIVE_6mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_clk { + pinmux = <MT8135_PIN_5_MSDC0_CLK__FUNC_MSDC0_CLK>; + drive-strength = <MTK_DRIVE_6mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_01>; + }; + + pins_rst { + pinmux = <MT8135_PIN_33_MSDC0_RSTB__FUNC_MSDC0_RSTB>; + bias-pull-up; + }; + }; + + mmc1_pins_uhs: mmc1 at 0 { + pins_cmd_dat { + pinmux = <MT8135_PIN_83_MSDC1_DAT0__FUNC_MSDC1_DAT0>, + <MT8135_PIN_84_MSDC1_DAT1__FUNC_MSDC1_DAT1>, + <MT8135_PIN_87_MSDC1_DAT2__FUNC_MSDC1_DAT2>, + <MT8135_PIN_88_MSDC1_DAT3__FUNC_MSDC1_DAT3>, + <MT8135_PIN_85_MSDC1_CMD__FUNC_MSDC1_CMD>; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-up; + }; + + pins_clk { + pinmux = <MT8135_PIN_86_MSDC1_CLK__FUNC_MSDC1_CLK>; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-down; + }; + }; + + mmc2_pins_uhs: mmc2 at 0 { + pins_cmd_dat { + pinmux = <MT8135_PIN_82_MSDC2_DAT0__FUNC_MSDC2_DAT0>, + <MT8135_PIN_81_MSDC2_DAT1__FUNC_MSDC2_DAT1>, + <MT8135_PIN_77_MSDC2_DAT2__FUNC_MSDC2_DAT2>, + <MT8135_PIN_78_MSDC2_DAT3__FUNC_MSDC2_DAT3>, + <MT8135_PIN_79_MSDC2_CMD__FUNC_MSDC2_CMD>; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; + }; + + pins_clk { + pinmux = <MT8135_PIN_80_MSDC2_CLK__FUNC_MSDC2_CLK>; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + }; + }; +}; + &pwrap { pmic: mt6397 { compatible = "mediatek,mt6397";
arch/arm/boot/dts/mt8135.dtsi +55 -0
66 lines not on this page · raw message
Signature · 1 line
1.8.1.1.dirty
Chaotian Jing
maintainerPATCH v6 6/7 arm64: mediatek: Add Mediatek MMC support in defconfig
In reply to Chaotian JingFrom: Eddie Huang <[email protected]>
Add CONFIG_MMC_MTK=y in defconfig
--- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm64/configs/defconfig +1 -0
@@ -140,6 +140,7 @@ CONFIG_MMC_ARMMMCI=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SPI=y +CONFIG_MMC_MTK=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_EFI=y CONFIG_RTC_DRV_XGENE=y
Signature · 1 line
1.8.1.1.dirty
Chaotian Jing
maintainerPATCH v6 7/7 ARM: multi_v7_defconfig: Enable Mediatek MMC support multi-v7
In reply to Chaotian JingFrom: Yingjoe Chen <[email protected]>
Add CONFIG_MMC_MTK=y in defconfig
--- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm/configs/multi_v7_defconfig +1 -0
@@ -451,6 +451,7 @@ CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SH_MMCIF=y CONFIG_MMC_SUNXI=y +CONFIG_MMC_MTK=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y
Signature · 1 line
1.8.1.1.dirty
Quoted 36 lines · Chaotian Jing
This series enables MMC support on the MT8135/MT8173 platform. MT8135 has 5 MMC controllers and MT8173 has 4 MMC controllers.
Changes base on Ulf's comments
Make hclk mandatory in the driver code
Changehost->hclktohost->src_clk_freq
Addlinux/pm.hChaotian Jing (3):
mmc: dt-bindings: add Mediatek MMC bindings
mmc: mediatek: Add Mediatek MMC driver
mmc: mediatek: Add PM support for MMC driverEddie Huang (2):
arm64: dts: mediatek: Add MT8173 MMC dts
arm64: mediatek: Add Mediatek MMC support in defconfigYingjoe Chen (2):
ARM: mediatek: dts: Add emmc support to mt8135
ARM:multi_v7_defconfig: Enable Mediatek MMC support multi-v7Documentation/devicetree/bindings/mmc/mtk-sd.txt | 32 + arch/arm/boot/dts/mt8135-evbp1.dts | 158 +++ arch/arm/boot/dts/mt8135.dtsi | 55 + arch/arm/configs/multi_v7_defconfig | 1 + arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +- arch/arm64/configs/defconfig | 1 + drivers/mmc/host/Kconfig | 8 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/mtk-sd.c | 1461 ++++++++++++++++++++++ include/linux/mmc/core.h | 1 + 11 files changed, 1888 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/mmc/mtk-sd.txt create mode 100644 drivers/mmc/host/mtk-sd.c
Quoted 3 lines
--
1.8.1.1.dirty
Hi Chaotian,
I have applied patch 1->3 for my next branch, which thus includes the mmc driver parts. I could potentially also pick the ARM patches, but then those needs to be acked from the ARM SoC folks.
Kind regards
Uffe
Quoted 4 lines · Ulf Hansson
Quoted 3 lines · Chaotian Jing
This series enables MMC support on the MT8135/MT8173 platform. MT8135 has 5 MMC controllers and MT8173 has 4 MMC controllers.
Quoted 8 lines
Quoted 8 lines
Changes base on Ulf's comments
Make hclk mandatory in the driver code
Changehost->hclktohost->src_clk_freq
Addlinux/pm.hChaotian Jing (3):
mmc: dt-bindings: add Mediatek MMC bindings
mmc: mediatek: Add Mediatek MMC driver.
This commit breaks when merged to linux-next since it gets exposed as an implicit module.h user that does not include that header:
drivers/mmc/host/mtk-sd.c:1459:1: note: in expansion of macro
'module_platform_driver'
module_platform_driver(mt_msdc_driver);
^
include/linux/device.h:1296:1: error: type defaults to 'int' in
declaration of 'module_init' [-Werror=implicit-int]
module_init(__driver##_init); \
^Since the code doesn't exist in mainline, I can't fix it from within my header cleanup series, so can you please add an appropriate include of module.h to the above?
Also, I noticed the Makefile addition from this commit is whitespace mangled; might as well fix that too if rebasing to fix the include problem.
Thanks,
Paul.
--
Quoted 42 lines
Quoted 25 lines
mmc: mediatek: Add PM support for MMC driver
Eddie Huang (2):
arm64: dts: mediatek: Add MT8173 MMC dts
arm64: mediatek: Add Mediatek MMC support in defconfigYingjoe Chen (2):
ARM: mediatek: dts: Add emmc support to mt8135
ARM:multi_v7_defconfig: Enable Mediatek MMC support multi-v7Documentation/devicetree/bindings/mmc/mtk-sd.txt | 32 + arch/arm/boot/dts/mt8135-evbp1.dts | 158 +++ arch/arm/boot/dts/mt8135.dtsi | 55 + arch/arm/configs/multi_v7_defconfig | 1 + arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 126 ++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 45 +- arch/arm64/configs/defconfig | 1 + drivers/mmc/host/Kconfig | 8 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/mtk-sd.c | 1461 ++++++++++++++++++++++ include/linux/mmc/core.h | 1 + 11 files changed, 1888 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/mmc/mtk-sd.txt create mode 100644 drivers/mmc/host/mtk-sd.cQuoted 3 lines
--
1.8.1.1.dirtyHi Chaotian,
I have applied patch 1->3 for my next branch, which thus includes the mmc driver parts. I could potentially also pick the ARM patches, but then those needs to be acked from the ARM SoC folks.
Kind regards
Uffe
--
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Please read the FAQ at http://www.tux.org/lkml/
Quoted 31 lines · Paul Gortmaker
Quoted 4 lines · Ulf Hansson
Quoted 3 lines · Chaotian Jing
This series enables MMC support on the MT8135/MT8173 platform. MT8135 has 5 MMC controllers and MT8173 has 4 MMC controllers.
Quoted 8 lines
Quoted 8 lines
Changes base on Ulf's comments
Make hclk mandatory in the driver code
Changehost->hclktohost->src_clk_freq
Addlinux/pm.hChaotian Jing (3):
mmc: dt-bindings: add Mediatek MMC bindings
mmc: mediatek: Add Mediatek MMC driver.This commit breaks when merged to linux-next since it gets exposed as an implicit
module.huser that does not include that header:
drivers/mmc/host/mtk-sd.c:1459:1: note: in expansion of macro
'module_platform_driver'module_platform_driver(mt_msdc_driver); ^ include/linux/device.h:1296:1: error: type defaults to 'int' in declaration of 'module_init' [-Werror=implicit-int] module_init(__driver##_init); \ ^Since the code doesn't exist in mainline, I can't fix it from within my header cleanup series, so can you please add an appropriate include of
module.hto the above?
Quoted 6 lines
Also, I noticed the
Makefileaddition from this commit is whitespace mangled; might as well fix that too if rebasing to fix the include problem.Thanks,
Paul.
Paul, appreciate your feedback!
I have re-based my next branch and updated the commit according to your suggestions.
Kind regards
Uffe