Patch "ARM/arm64: KVM: fix use of WnR bit in kvm_is_write_fault()" has been added to the 3.14-stable tree
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This is a note to let you know that I've just added the patch titled
ARM/arm64: KVM: fix use of WnR bit in kvm_is_write_fault()
to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-arm64-kvm-fix-use-of-wnr-bit-in-kvm_is_write_fault.patch
and it can be found in the queue-3.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
a7d079cea2dffb112e26da2566dd84c0ef1fce97Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <[email protected]>
Date: Tue, 9 Sep 2014 11:27:09 +0100
Subject: ARM/arm64: KVM: fix use of WnR bit in kvm_is_write_fault()
From: Ard Biesheuvel <[email protected]>
commit a7d079cea2dffb112e26da2566dd84c0ef1fce97 upstream.
[Since we don't backport commit 9804788 (arm/arm64: KVM: Support KVM_CAP_READONLY_MEM), ingore the changes in kvm_handle_guest_abort introduced by this patch.]
The ISS encoding for an exception from a Data Abort has a WnR bit[6] that indicates whether the Data Abort was caused by a read or a write instruction. While there are several fields in the encoding that are only valid if the ISV bit[24] is set, WnR is not one of them, so we can read it unconditionally.
Instead of fixing both implementations of kvm_is_write_fault() in place, reimplement it just once using kvm_vcpu_dabt_iswrite(), which already does the right thing with respect to the WnR bit. Also fix up the callers to pass 'vcpu'
--- arch/arm/include/asm/kvm_mmu.h | 11 ----------- arch/arm/kvm/mmu.c | 10 +++++++++- arch/arm64/include/asm/kvm_mmu.h | 13 ------------- 3 files changed, 9 insertions(+), 25 deletions(-)
arch/arm/include/asm/kvm_mmu.h +0 -11
@@ -78,17 +78,6 @@ static inline void kvm_set_pte(pte_t *ptflush_pmd_entry (pte); } -static inline bool kvm_is_write_fault (unsigned long hsr) -{ -unsigned long hsr_ec = hsr >>HSR_EC_SHIFT ; -if (hsr_ec ==HSR_EC_IABT ) -return false; -else if ((hsr &HSR_ISV ) && !(hsr &HSR_WNR )) -return false; -else -return true; -} -static inline void kvm_clean_pgd (pgd_t *pgd) {clean_dcache_area (pgd,PTRS_PER_S2_PGD *sizeof (pgd_t));
arch/arm/kvm/mmu.c +9 -1
@@ -746,6 +746,14 @@ static bool transparent_hugepage_adjust(return false; } +static bool kvm_is_write_fault (struct kvm_vcpu *vcpu) +{ +if (kvm_vcpu_trap_is_iabt (vcpu)) +return false; + +return kvm_vcpu_dabt_iswrite (vcpu); +} +static int user_mem_abort (struct kvm_vcpu *vcpu,phys_addr_t fault_ipa,struct kvm_memory_slot *memslot,unsigned long fault_status)
@@ -761,7 +769,7 @@ static int user_mem_abort(struct kvm_vcppfn_t pfn;pgprot_t mem_type =PAGE_S2 ; - write_fault =kvm_is_write_fault (kvm_vcpu_get_hsr (vcpu)); + write_fault =kvm_is_write_fault (vcpu);if (fault_status ==FSC_PERM && !write_fault) {kvm_err ("Unexpected L2 read permission error\n" );return -EFAULT ;
arch/arm64/include/asm/kvm_mmu.h +0 -13
@@ -93,19 +93,6 @@ void kvm_clear_hyp_idmap(void);#define kvm_set_pte (ptep, pte) set_pte(ptep, pte)#define kvm_set_pmd (pmdp, pmd) set_pmd(pmdp, pmd) -static inline bool kvm_is_write_fault (unsigned long esr) -{ -unsigned long esr_ec = esr >>ESR_EL2_EC_SHIFT ; - -if (esr_ec ==ESR_EL2_EC_IABT ) -return false; - -if ((esr &ESR_EL2_ISV ) && !(esr &ESR_EL2_WNR )) -return false; - -return true; -} -static inline void kvm_clean_pgd (pgd_t *pgd) {}static inline void kvm_clean_pmd_entry (pmd_t *pmd) {}static inline void kvm_clean_pte (pte_t *pte) {}
Patches currently in stable-queue which might be from [email protected] are
queue-3.14/arm-arm64-kvm-fix-use-of-wnr-bit-in-kvm_is_write_fault.patch