ARM64 / SMP: Switch pr_err() to pr_debug() for disabled GICC entry
PATCH 1/1 ARM64 / SMP: Switch pr_err() to pr_debug() for disabled GICC entry
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 enabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later.
Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable.
So that's not an error for disabled cpus in MADT, we can switch pr_err() to pr_debug() instead.
--- arch/arm64/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/kernel/smp.c +1 -1
@@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) }if (!(processor->flags &ACPI_MADT_ENABLED )) { -pr_err ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid); +pr_debug ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid);return ; }
Signature · 1 line
1.9.1
Quoted 23 lines · Hanjun Guo
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 enabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later.
Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable.
So that's not an error for disabled cpus in MADT, we can switch
pr_err()topr_debug()instead.Signed-off-by Hanjun Guo <[email protected]>--- arch/arm64/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm64/kernel/smp.c +0
-0
arch/arm64/kernel/smp.c acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) · line 408
Quoted 8 lines
arch/arm64/kernel/smp.c +1
-1@@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) }if (!(processor->flags &ACPI_MADT_ENABLED )) { -pr_err ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid); +pr_debug ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid);return ; }
Yeah, good point. I'm all for making the boot a little quieter by default.
Signature · 8 lines
ciao, al ----------------------------------- Al Stone Software Engineer Red Hat, Inc. ahs3 at redhat.com -----------------------------------
Catalin Marinas
maintainerQuoted 22 lines · Hanjun Guo
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 enabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later.
Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable.
So that's not an error for disabled cpus in MADT, we can switch
pr_err()topr_debug()instead.Signed-off-by Hanjun Guo <[email protected]>--- arch/arm64/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm64/kernel/smp.c +0
-0
arch/arm64/kernel/smp.c acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) · line 405
Quoted 5 lines
arch/arm64/kernel/smp.c +1
-1@@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) }if (!(processor->flags &ACPI_MADT_ENABLED )) { -pr_err ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid); +pr_debug ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid);
That's a pretty harmless change. But looking at the use-case, would we expect the disabled entries to have a valid hwid? I guess such hwid is not known, especially if we can hot-plug some CPU at a later time. If that's the case, can we also move this check before the hwid one?
Signature · 1 line
Catalin
Quoted 26 lines · Catalin Marinas
Quoted 24 lines · Hanjun Guo
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 enabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later.
Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable.
So that's not an error for disabled cpus in MADT, we can switch
pr_err()topr_debug()instead.Signed-off-by Hanjun Guo <[email protected]>--- arch/arm64/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm64/kernel/smp.c +0
-0@@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) }
Quoted 9 lines
arch/arm64/kernel/smp.c acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) · line 405
Quoted 3 lines
arch/arm64/kernel/smp.c +1
-1if (!(processor->flags &ACPI_MADT_ENABLED )) { -pr_err ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid); +pr_debug ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid);That's a pretty harmless change. But looking at the use-case, would we expect the disabled entries to have a valid hwid? I guess such hwid is not known, especially if we can hot-plug some CPU at a later time. If that's the case, can we also move this check before the hwid one?
Heh, I should have read ahead. I just made the same point in a mail I just sent.
PATCH 1/1 ARM64 / SMP: Switch pr_err() to pr_debug() for disabled GICC entry
In reply to Catalin MarinasQuoted 25 lines · Catalin Marinas
Quoted 24 lines · Hanjun Guo
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 enabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later.
Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable.
So that's not an error for disabled cpus in MADT, we can switch
pr_err()topr_debug()instead.Signed-off-by Hanjun Guo <[email protected]>--- arch/arm64/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm64/kernel/smp.c +0
-0@@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) }
Quoted 6 lines
arch/arm64/kernel/smp.c acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) · line 405
Quoted 3 lines
arch/arm64/kernel/smp.c +1
-1if (!(processor->flags &ACPI_MADT_ENABLED )) { -pr_err ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid); +pr_debug ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid);That's a pretty harmless change. But looking at the use-case, would we expect the disabled entries to have a valid hwid? I guess such hwid is not known, especially if we can hot-plug some CPU at a later time. If
Good point, usually it's invalid hwid.
Quoted 1 line
that's the case, can we also move this check before the hwid one?
Yes, fully agree, thanks for catching this, will update the patch.
Thanks
Hanjun
Quoted 5 lines · Hanjun Guo
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 enabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later.
Quoted 7 lines
Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable.
So that's not an error for disabled cpus in MADT, we can switch
pr_err()topr_debug()instead.
I agree with pr_debug instead of pr_err, but for hotplug to work I think we need to continue to parse the MADT instead of bailing out altogether, right? We need to know at init time how many possible cpus there are and that number never changes as cpus are plugged/unplugged. Right now, set_cpu_possible() only gets called if smp_cpu_setup() gets called and smp_cpu_setup() only gets called if the cpu is in the cpu_logical_map.
Quoted 18 lines
Signed-off-by Hanjun Guo <[email protected]>--- arch/arm64/kernel/smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm64/kernel/smp.c +1
-1@@ -402,7 +402,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) }if (!(processor->flags &ACPI_MADT_ENABLED )) { -pr_err ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid); +pr_debug ("skipping disabled CPU entry with 0x%llx MPIDR\n" , hwid);return ; }
Quoted 11 lines · Mark Salter
Quoted 9 lines · Hanjun Guo
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 enabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later.
Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable.
Quoted 6 lines
Quoted 3 lines
So that's not an error for disabled cpus in MADT, we can switch
pr_err()topr_debug()instead.I agree with
pr_debuginstead ofpr_err, but for hotplug to work I think we need to continue to parse the MADT instead of bailing out altogether, right? We need to know at init time how many
Yes, agreed :)
Quoted 4 lines
possible cpus there are and that number never changes as cpus are plugged/unplugged. Right now,
set_cpu_possible()only gets called ifsmp_cpu_setup()gets called andsmp_cpu_setup()only gets called if the cpu is in thecpu_logical_map.
We need some extra work to make the physical CPU hotplug work on ARM64.
Thanks
Hanjun