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NXP SPIFI driver for LPC18xx/43xx familiy

PATCH Superseded Joachim Eastwood 3 participants 6 messages Jul 9, 2015 – Aug 13, 2015

Subsystems (3)

v4 of 5 Superseded Latest is v5 →

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#0 lore raw

v4 cover NXP SPIFI driver for LPC18xx/43xx familiy

This patch set adds a SPI-NOR driver for the NXP SPI Flash (SPIFI) controller that can be found on newer NXP MCUs. For example on the LPC18xx and LPC43xx familiy.

NXP SPIFI is a specialized SPI interface for serial Flash devices. It supports one Flash device with 1-, 2- and 4-bits width in SPI mode 0 or 3. The controller operates in either command or memory mode. In memory mode the Flash is made accessible for the CPU as normal memory.

This version fix a bug in the write function discovered during testing with JFFS2.

Changes since v3:
- fix bug in write function
- rebase on 4.2-rc1

Changes since v2:
- default to auto detection unless chip is specified
- update doc with reference to jedec,spi-nor.txt

Changes since v1:
- use readb_poll_timeout instead of open coding
- cache current mode (memory/command)
- depend on HAS_IOMEM
- removed stray white space
- removed leftover debug print

Joachim Eastwood (2):
mtd: spi-nor: add driver for NXP SPI Flash Interface (SPIFI)
doc: dt: add documentation for nxp,lpc1773-spifi

 .../devicetree/bindings/mtd/nxp-spifi.txt          |  58 +++
 drivers/mtd/spi-nor/Kconfig                        |  11 +
 drivers/mtd/spi-nor/Makefile                       |   1 +
 drivers/mtd/spi-nor/nxp-spifi.c                    | 494 +++++++++++++++++++++
 4 files changed, 564 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/nxp-spifi.txt
 create mode 100644 drivers/mtd/spi-nor/nxp-spifi.c
Signature · 1 line
1.8.0
#1 lore raw

PATCH v4 1/2 mtd: spi-nor: add driver for NXP SPI Flash Interface (SPIFI)

Add SPI-NOR driver for the SPI Flash Interface (SPIFI) controller that is found newer NXP MCU devices.

The controller supports serial SPI Flash devices with 1-, 2- and 4-bit width in either SPI mode 0 or 3. The controller can operate in either command or memory mode. In memory mode the Flash is exposed as normal memory and can be directly accessed by the CPU.

---
 drivers/mtd/spi-nor/Kconfig     |  11 +
 drivers/mtd/spi-nor/Makefile    |   1 +
 drivers/mtd/spi-nor/nxp-spifi.c | 494 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 506 insertions(+)
 create mode 100644 drivers/mtd/spi-nor/nxp-spifi.c
drivers/mtd/spi-nor/Kconfig +11 -0
index 64a4f0edabc7..407142e411fa 100644
@@ -28,4 +28,15 @@ config SPI_FSL_QUADSPI
 	  This enables support for the Quad SPI controller in master mode.
 	  We only connect the NOR to this controller now.
 
+config SPI_NXP_SPIFI
+	tristate "NXP SPI Flash Interface (SPIFI)"
+	depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
+	depends on HAS_IOMEM
+	help
+	  Enable support for the NXP LPC SPI Flash Interface controller.
+
+	  SPIFI is a specialized controller for connecting serial SPI
+	  Flash. Enable this option if you have a device with a SPIFI
+	  controller and want to access the Flash as a mtd device.
+
 endif # MTD_SPI_NOR
drivers/mtd/spi-nor/Makefile +1 -0
index 6a7ce1462247..e53333ef8582 100644
@@ -1,2 +1,3 @@
 obj-$(CONFIG_MTD_SPI_NOR)	+= spi-nor.o
 obj-$(CONFIG_SPI_FSL_QUADSPI)	+= fsl-quadspi.o
+obj-$(CONFIG_SPI_NXP_SPIFI)	+= nxp-spifi.o
drivers/mtd/spi-nor/nxp-spifi.c new file +494 -0

494 lines not on this page · raw message

Signature · 1 line
1.8.0
#2 lore raw

PATCH v4 1/2 mtd: spi-nor: add driver for NXP SPI Flash Interface (SPIFI)

Quoted 11 lines · Joachim Eastwood

Add SPI-NOR driver for the SPI Flash Interface (SPIFI) controller that is found newer NXP MCU devices.

The controller supports serial SPI Flash devices with 1-, 2- and 4-bit width in either SPI mode 0 or 3. The controller can operate in either command or memory mode. In memory mode the Flash is exposed as normal memory and can be directly accessed by the CPU.

Yep, same comments apply from v3. Sorry for the mixup.

Brian

#3 lore raw

PATCH v4 2/2 doc: dt: add documentation for nxp,lpc1773-spifi

In reply to Joachim Eastwood

Add device tree binding documentation for the SPI Flash Interface (SPIFI) found on NXP LPC18xx and LPC43xx devies.

---
 .../devicetree/bindings/mtd/nxp-spifi.txt          | 58 ++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/nxp-spifi.txt
Documentation/devicetree/bindings/mtd/nxp-spifi.txt new file +58 -0
new file mode 100644
index 000000000000..f8b6b250654e
@@ -0,0 +1,58 @@
+* NXP SPI Flash Interface (SPIFI)
+
+NXP SPIFI is a specialized SPI interface for serial Flash devices.
+It supports one Flash device with 1-, 2- and 4-bits width in SPI
+mode 0 or 3. The controller operates in either command or memory
+mode. In memory mode the Flash is accessible from the CPU as
+normal memory.
+
+Required properties:
+  - compatible : Should be "nxp,lpc1773-spifi"
+  - reg : the first contains the register location and length,
+          the second contains the memory mapping address and length
+  - reg-names: Should contain the reg names "spifi" and "flash"
+  - interrupts : Should contain the interrupt for the device
+  - clocks : The clocks needed by the SPIFI controller
+  - clock-names : Should contain the clock names "spifi" and "reg"
+
+Optional properties:
+ - resets : phandle + reset specifier
+
+The SPI Flash must be a child of the SPIFI node and must have a
+compatible property as specified in bindings/mtd/jedec,spi-nor.txt
+
+Optionally it can also contain the following properties.
+ - spi-cpol : Controller only supports mode 0 and 3 so either
+              both spi-cpol and spi-cpha should be present or
+              none of them
+ - spi-cpha : See above
+ - spi-rx-bus-width : Used to select how many pins that are used
+                      for input on the controller
+
+See bindings/spi/spi-bus.txt for more information.
+
+Example:
+spifi: spifi at 40003000 {
+	compatible = "nxp,lpc1773-spifi";
+	reg = <0x40003000 0x1000>, <0x14000000 0x4000000>;
+	reg-names = "spifi", "flash";
+	interrupts = <30>;
+	clocks = <&ccu1 CLK_SPIFI>, <&ccu1 CLK_CPU_SPIFI>;
+	clock-names = "spifi", "reg";
+	resets = <&rgu 53>;
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		spi-cpol;
+		spi-cpha;
+		spi-rx-bus-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition at 0 {
+			label = "data";
+			reg = <0 0x200000>;
+		};
+	};
+};
+
Signature · 1 line
1.8.0
#4 lore raw

PATCH v4 2/2 doc: dt: add documentation for nxp,lpc1773-spifi

Quoted 4 lines · Joachim Eastwood

Add device tree binding documentation for the SPI Flash Interface (SPIFI) found on NXP LPC18xx and LPC43xx devies.

Whoops, I was reviewing v3... pushed this one instead now. I'll double check that my comments on v3 are applicable to v4.

Thanks,
Brian

#5 lore raw

v4 cover NXP SPIFI driver for LPC18xx/43xx familiy

In reply to Joachim Eastwood

Brian,

Mind if I ping you on this one?

Quoted 43 lines · Joachim Eastwood

This patch set adds a SPI-NOR driver for the NXP SPI Flash (SPIFI) controller that can be found on newer NXP MCUs. For example on the LPC18xx and LPC43xx familiy.

NXP SPIFI is a specialized SPI interface for serial Flash devices. It supports one Flash device with 1-, 2- and 4-bits width in SPI mode 0 or 3. The controller operates in either command or memory mode. In memory mode the Flash is made accessible for the CPU as normal memory.

This version fix a bug in the write function discovered during testing with JFFS2.

Changes since v3:
- fix bug in write function
- rebase on 4.2-rc1

Changes since v2:
- default to auto detection unless chip is specified
- update doc with reference to jedec,spi-nor.txt

Changes since v1:
- use readb_poll_timeout instead of open coding
- cache current mode (memory/command)
- depend on HAS_IOMEM
- removed stray white space
- removed leftover debug print

Joachim Eastwood (2):
mtd: spi-nor: add driver for NXP SPI Flash Interface (SPIFI)
doc: dt: add documentation for nxp,lpc1773-spifi

 .../devicetree/bindings/mtd/nxp-spifi.txt          |  58 +++
 drivers/mtd/spi-nor/Kconfig                        |  11 +
 drivers/mtd/spi-nor/Makefile                       |   1 +
 drivers/mtd/spi-nor/nxp-spifi.c                    | 494 +++++++++++++++++++++
 4 files changed, 564 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/nxp-spifi.txt
 create mode 100644 drivers/mtd/spi-nor/nxp-spifi.c

--
1.8.0

Signature · 2 lines
Ezequiel Garc?a, VanguardiaSur
www.vanguardiasur.com.ar