Patch "ARC: add compiler barrier to LLSC based cmpxchg" has been added to the 3.14-stable tree
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This is a note to let you know that I've just added the patch titled
ARC: add compiler barrier to LLSC based cmpxchg
to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arc-add-compiler-barrier-to-llsc-based-cmpxchg.patch
and it can be found in the queue-3.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
d57f727264f1425a94689bafc7e99e502cb135b5Mon Sep 17 00:00:00 2001
From: Vineet Gupta <[email protected]>
Date: Thu, 13 Nov 2014 15:54:01 +0530
Subject: ARC: add compiler barrier to LLSC based cmpxchg
From: Vineet Gupta <[email protected]>
commit d57f727264f1425a94689bafc7e99e502cb135b5 upstream.
When auditing cmpxchg call sites, Chuck noted that gcc was optimizing away some of the desired LDs.
| do {
| new = old = *ipi_data_ptr;
| new |= 1U << msg;
| } while (cmpxchg(ipi_data_ptr, old, new) != old);was generating to below
| 8015cef8: ld r2,[r4,0] <-- First LD | 8015cefc: bset r1,r2,r1 | | 8015cf00: llock r3,[r4] <-- atomic op | 8015cf04: brne r3,r2,8015cf10 | 8015cf08: scond r1,[r4] | 8015cf0c: bnz 8015cf00 | | 8015cf10: brne r3,r2,8015cf00 <-- Branch doesn't go to orig LD
Although this was fixed by adding a ACCESS_ONCE in this call site, it seems safer (for now at least) to add compiler barrier to LLSC based cmpxchg
--- arch/arc/include/asm/cmpxchg.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
arch/arc/include/asm/cmpxchg.h +5 -4
@@ -25,10 +25,11 @@ __cmpxchg(volatile void *ptr, unsigned l" scond %3, [%1] \n" " bnz 1b \n" "2: \n" - : "=&r"(prev) - : "r"(ptr), "ir"(expected), -" r"(new) /* can't be " ir". scond can't take limm for " b" */ - : "cc"); + : "=&r"(prev) /* Early clobber, to prevent reg reuse */ + : "r"(ptr), /* Not "m": llock only supports reg direct addr mode */ +" ir"(expected), +" r"(new) /* can't be " ir". scond can't take LIMM for " b" */ + : "cc", "memory"); /* so that gcc knows memory is being written here */ return prev; }
Patches currently in stable-queue which might be from [email protected] are
queue-3.14/arc-add-compiler-barrier-to-llsc-based-cmpxchg.patch