Patch "pinctrl: mvebu: armada-370: fix spi0 pin description" has been added to the 3.14-stable tree

This is a note to let you know that I've just added the patch titled

pinctrl: mvebu: armada-370: fix spi0 pin description

to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
pinctrl-mvebu-armada-370-fix-spi0-pin-description.patch
and it can be found in the queue-3.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Thomas Petazzoni <[email protected]>
Date: Tue, 9 Jun 2015 18:46:54 +0200
Subject: pinctrl: mvebu: armada-370: fix spi0 pin description

From: Thomas Petazzoni <[email protected]>

commit 438881dfddb9107ef0eb30b49368e91e092f0b3e upstream.

Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly named "spi0-1" instead of just "spi0". This commit fixes that.

This DT binding change does not affect any of the in-tree users.

---
 Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt |    4 ++--
 drivers/pinctrl/mvebu/pinctrl-armada-370.c                               |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

@@ -91,5 +91,5 @@ mpp61         61       gpo, dev(wen1), u
 mpp62         62       gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
                        audio(mclk), uart0(cts)
 mpp63         63       gpo, spi0(sck), tclk
-mpp64         64       gpio, spi0(miso), spi0-1(cs1)
-mpp65         65       gpio, spi0(mosi), spi0-1(cs2)
+mpp64         64       gpio, spi0(miso), spi0(cs1)
+mpp65         65       gpio, spi0(mosi), spi0(cs2)

@@ -358,11 +358,11 @@ static struct mvebu_mpp_mode mv88f6710_m
 	MPP_MODE(64,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "miso"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs1")),
+	   MPP_FUNCTION(0x2, "spi0", "cs1")),
 	MPP_MODE(65,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "mosi"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs2")),
+	   MPP_FUNCTION(0x2, "spi0", "cs2")),
 };
 
 static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;

Patches currently in stable-queue which might be from [email protected] are

queue-3.14/pinctrl-mvebu-armada-xp-fix-functions-of-mpp48.patch queue-3.14/pinctrl-mvebu-armada-xp-remove-non-existing-nand-pins.patch queue-3.14/pinctrl-mvebu-armada-xp-remove-non-existing-vdd-cpu_pd-functions.patch queue-3.14/pinctrl-mvebu-armada-370-fix-spi0-pin-description.patch