Patch "drm/i915: fix backlight after resume on 855gm" has been added to the 4.1-stable tree

This is a note to let you know that I've just added the patch titled

drm/i915: fix backlight after resume on 855gm

to the 4.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:

     drm-i915-fix-backlight-after-resume-on-855gm.patch

and it can be found in the queue-4.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Jani Nikula <[email protected]>
Date: Fri, 26 Jun 2015 14:18:56 +0300
Subject: drm/i915: fix backlight after resume on 855gm
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From: Jani Nikula <[email protected]>

commit 2059ac3b1304cb6a82f9d90762dea9f556831627 upstream.

Some 855gm models (at least ThinkPad X40) regressed because of

commit b0cd324faed23d10d66ba6ade66579c681feef6f

Author: Jani Nikula <[email protected]>
Date:   Wed Nov 12 16:25:43 2014 +0200

drm/i915: don't save/restore backlight hist ctl registers

which tried to make our driver more robust by not blindly saving and restoring registers, but it failed to take into account

commit 0eb96d6ed38430b72897adde58f5477a6b71757a

Author: Jesse Barnes <[email protected]>
Date:   Wed Oct 14 12:33:41 2009 -0700

drm/i915: save/restore BLC histogram control reg across suspend/resume

Fix the regression by enabling hist ctl on gen2.

v2: Improved the comment.

v3: Improved the comment, again.

References: http://mid.gmane.org/20150623222648.GD12335@acheron

---
 drivers/gpu/drm/i915/i915_reg.h    |    1 +
 drivers/gpu/drm/i915/intel_panel.c |    8 ++++++++
 2 files changed, 9 insertions(+)

@@ -3209,6 +3209,7 @@ enum skl_disp_power_wells {
 #define   BLM_POLARITY_PNV			(1 << 0) /* pnv only */
 
 #define BLC_HIST_CTL	(dev_priv->info.display_mmio_offset + 0x61260)
+#define  BLM_HISTOGRAM_ENABLE			(1 << 31)
 
 /* New registers for PCH-split platforms. Safe where new bits show up, the
  * register layout machtes with gen4 BLC_PWM_CTL[12]. */

@@ -879,6 +879,14 @@ static void i9xx_enable_backlight(struct
 
 	/* XXX: combine this into above write? */
 	intel_panel_actually_set_backlight(connector, panel->backlight.level);
+
+	/*
+	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
+	 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
+	 * that has backlight.
+	 */
+	if (IS_GEN2(dev))
+		I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
 }
 
 static void i965_enable_backlight(struct intel_connector *connector)

Patches currently in stable-queue which might be from [email protected] are

queue-4.1/drm-i915-ppgtt-break-loop-in-gen8_ppgtt_clear_range-failure-path.patch queue-4.1/drm-i915-fix-backlight-after-resume-on-855gm.patch queue-4.1/drm-i915-fix-ips-related-flicker.patch