ARM: imx6: correct i.MX6 PCIe interrupt routing
Subsystems (2)
PATCH 1/1 ARM: imx6: correct i.MX6 PCIe interrupt routing
The PCIe interrupts are also routed through the GPC. This has been missed from the conversion to stacked IRQ domains as the PCIe controller uses an explicit interrupt map and thus doesn't inherit the SoC global interrupt parent.
---
This commit does not change the i.MX6SX PCIe node, as PCIe isn't functional in mainline on this SoC and the DT node needs a major rewrite to account for the specifics of this SoC anyway.
--- arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm/boot/dts/imx6qdl.dtsi +4 -4
@@ -181,10 +181,10 @@ interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, <&clks IMX6QDL_CLK_LVDS1_GATE>, <&clks IMX6QDL_CLK_PCIE_REF_125M>;
Signature · 1 line
2.4.6
PATCH 1/1 ARM: imx6: correct i.MX6 PCIe interrupt routing
Quoted 6 lines · Lucas Stach
The PCIe interrupts are also routed through the GPC. This has been missed from the conversion to stacked IRQ domains as the PCIe controller uses an explicit interrupt map and thus doesn't inherit the SoC global interrupt parent.
Signed-off-by Lucas Stach <[email protected]>
So this is a fix and need copy stable?
Shawn
Quoted 36 lines
---
This commit does not change the i.MX6SX PCIe node, as PCIe isn't functional in mainline on this SoC and the DT node needs a major rewrite to account for the specifics of this SoC anyway.--- arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)arch/arm/boot/dts/imx6qdl.dtsi +4
-4@@ -181,10 +181,10 @@ interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, <&clks IMX6QDL_CLK_LVDS1_GATE>, <&clks IMX6QDL_CLK_PCIE_REF_125M>;Signature · 7 lines
2.4.6 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 1/1 ARM: imx6: correct i.MX6 PCIe interrupt routing
Am Donnerstag, den 06.08.2015, 09:28 +0800 schrieb Shawn Guo:
Quoted 10 lines · Lucas Stach
Quoted 6 lines
The PCIe interrupts are also routed through the GPC. This has been missed from the conversion to stacked IRQ domains as the PCIe controller uses an explicit interrupt map and thus doesn't inherit the SoC global interrupt parent.
Signed-off-by Lucas Stach <[email protected]>So this is a fix and need copy stable?
I'm a bit on the fence with this. It only fixes PCIe wake-up and I'm not aware of anyone using this functionality and haven't seen any bug reports yet.
On the other hand it is a clear fix and has practically zero chances for regressions, so yes please add stable 4.0+ to this.
Thanks,
Lucas
Quoted 43 lines
Shawn
Quoted 36 lines
---
This commit does not change the i.MX6SX PCIe node, as PCIe isn't functional in mainline on this SoC and the DT node needs a major rewrite to account for the specifics of this SoC anyway.--- arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)arch/arm/boot/dts/imx6qdl.dtsi +4
-4@@ -181,10 +181,10 @@ interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, <&clks IMX6QDL_CLK_LVDS1_GATE>, <&clks IMX6QDL_CLK_PCIE_REF_125M>;Signature · 7 lines
2.4.6 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 2 lines
Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ |
Shawn Guo
AppliedPATCH 1/1 ARM: imx6: correct i.MX6 PCIe interrupt routing
Quoted 9 lines · Lucas Stach
Am Donnerstag, den 06.08.2015, 09:28 +0800 schrieb Shawn Guo:
Quoted 8 lines · Lucas Stach
Quoted 6 lines
The PCIe interrupts are also routed through the GPC. This has been missed from the conversion to stacked IRQ domains as the PCIe controller uses an explicit interrupt map and thus doesn't inherit the SoC global interrupt parent.
Signed-off-by Lucas Stach <[email protected]>
Quoted 8 lines
Quoted 2 lines
So this is a fix and need copy stable?
I'm a bit on the fence with this. It only fixes PCIe wake-up and I'm not aware of anyone using this functionality and haven't seen any bug reports yet.
On the other hand it is a clear fix and has practically zero chances for regressions, so yes please add stable 4.0+ to this.
Applied as a fix, thanks.