ARM: qcom: add mdio bus on IPQ806x/AP148
PATCH 1/2 ARM: qcom: add mdio bus on IPQ806x/AP148
Ethernet switch on AP148 is connected through MDIO using GPIO 0 and 1. We'll add the new node using the bitbang driver on these two pins.
Signed-off-by Mathieu Olivari <[email protected]>
--- arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-)
arch/arm/boot/dts/qcom-ipq8064-ap148.dts +30 -1
@@ -19,8 +19,9 @@ }; }; - alias { + aliases { serial0 = &uart4; + mdio-gpio0 = &mdio0; }; chosen {
@@ -84,6 +85,15 @@ }; }; }; + + mdio0_pins: mdio0_pins { + mux { + pins = "gpio0", "gpio1"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + }; }; sata-phy at 1b400000 {
@@ -93,5 +103,24 @@ sata at 29000000 { status = "ok"; }; + + mdio0: mdio { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + phy0: ethernet-phy at 0 { + device_type = "ethernet-phy"; + reg = <0>; + }; + + phy4: ethernet-phy at 4 { + device_type = "ethernet-phy"; + reg = <4>; + }; + }; }; };
Signature · 1 line
2.1.4
PATCH 2/2 ARM: qcom: add GMAC nodes to IPQ806x platforms
This change adds GMAC nodes to IPQ806x platforms, both to the dtsi and to the AP148 dts. This will provide ethernet connectivity to the device.
Signed-off-by Mathieu Olivari <[email protected]>
--- arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 33 ++++++++++++ arch/arm/boot/dts/qcom-ipq8064.dtsi | 86 ++++++++++++++++++++++++++++++++ 2 files changed, 119 insertions(+)
arch/arm/boot/dts/qcom-ipq8064-ap148.dts +33 -0
@@ -94,6 +94,18 @@ bias-disable; }; }; + + rgmii2_pins: rgmii2_pins { + mux { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", + "gpio51", "gpio52", "gpio59", + "gpio60", "gpio61", "gpio62"; + function = "rgmii2"; + drive-strength = <8>; + bias-disable; + }; + }; }; sata-phy at 1b400000 {
@@ -122,5 +134,26 @@ reg = <4>; }; }; + + gmac1: ethernet at 37200000 { + status = "ok"; + phy-mode = "rgmii"; + phy-handle = <&phy4>; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + }; + + gmac2: ethernet at 37400000 { + status = "ok"; + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; }; };
arch/arm/boot/dts/qcom-ipq8064.dtsi +86 -0
92 lines not on this page · raw message
Signature · 1 line
2.1.4
arch/arm/boot/dts/qcom-ipq8064-ap148.dts line 22
Quoted 10 lines · Mathieu Olivari
arch/arm/boot/dts/qcom-ipq8064-ap148.dts +1
-1@@ -19,8 +19,9 @@ }; }; - alias { + aliases {
Good catch!
arch/arm/boot/dts/qcom-ipq8064-ap148.dts line 107
Quoted 11 lines
arch/arm/boot/dts/qcom-ipq8064-ap148.dts +3
-0serial0 = &uart4; + mdio-gpio0 = &mdio0; }; chosen {@@ -93,5 +103,24 @@ sata at 29000000 { status = "ok"; }; + + mdio0: mdio {
This node should be at the root level, not inside the soc node.
Quoted 19 lines
arch/arm/boot/dts/qcom-ipq8064-ap148.dts +17
-0+ compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + phy0: ethernet-phy at 0 { + device_type = "ethernet-phy"; + reg = <0>; + }; + + phy4: ethernet-phy at 4 { + device_type = "ethernet-phy"; + reg = <4>; + }; + }; }; };
Signature · 2 lines
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