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i.MX6 OCOTP NVMEM support

PATCH Superseded Philipp Zabel 1 participant 4 messages Aug 7, 2015 – Aug 24, 2015

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#0 lore raw

v2 cover i.MX6 OCOTP NVMEM support

Hi,

These patches add support for the i.MX On-Chip OTP (eFuse) Controller found in i.MX6Q/D, i.MX6S/DL, i.MX6SL, and i.MX6SX SoCs to the NVMEM framework. Greg, could you take them into the char-misc tree together with the NVMEM framework?

Changes since v1:
- Dropped unneeded clk.h include
- Fixed MODULE_LICENSE
- Droped third patch (adding the clock to the device tree node can be done separately)

Philipp Zabel (2):
nvmem: Add i.MX6 OCOTP device tree binding documentation
nvmem: imx-ocotp: Add i.MX6 OCOTP driver

 .../devicetree/bindings/nvmem/imx-ocotp.txt        |  20 +++
 drivers/nvmem/Kconfig                              |  11 ++
 drivers/nvmem/Makefile                             |   2 +
 drivers/nvmem/imx-ocotp.c                          | 154 +++++++++++++++++++++
 4 files changed, 187 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
 create mode 100644 drivers/nvmem/imx-ocotp.c
Signature · 4 lines
2.4.6

regards
Philipp
#1 lore raw

PATCH v2 1/2 nvmem: Add i.MX6 OCOTP device tree binding documentation

This patch documents the i.MX6 OCOTP device tree binding.

---
 .../devicetree/bindings/nvmem/imx-ocotp.txt          | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
Documentation/devicetree/bindings/nvmem/imx-ocotp.txt new file +20 -0
new file mode 100644
index 0000000..93e2ad3
@@ -0,0 +1,20 @@
+Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
+
+This binding represents the on-chip eFuse OTP controller found on
+i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs.
+
+Required properties:
+- compatible: should be one of
+	"fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
+	"fsl,imx6sl-ocotp" (i.MX6SL), or
+	"fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon".
+- reg: Should contain the register base and length.
+- clocks: Should contain a phandle pointing to the gated peripheral clock.
+
+Example:
+
+	ocotp: ocotp at 021bc000 {
+		compatible = "fsl,imx6q-ocotp", "syscon";
+		reg = <0x021bc000 0x4000>;
+		clocks = <&clks IMX6QDL_CLK_IIM>;
+	};
Signature · 1 line
2.4.6
#2 lore raw

PATCH v2 2/2 nvmem: imx-ocotp: Add i.MX6 OCOTP driver

In reply to Philipp Zabel

This driver handles the i.MX On-Chip OTP Controller found in i.MX6Q/D, i.MX6S/DL, i.MX6SL, and i.MX6SX SoCs. Currently it just returns the values stored in the shadow registers.

---
Changes since v1:
- Dropped unneeded clk.h include
- Fixed MODULE_LICENSE

---
 drivers/nvmem/Kconfig     |  11 ++++
 drivers/nvmem/Makefile    |   2 +
 drivers/nvmem/imx-ocotp.c | 154 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 167 insertions(+)
 create mode 100644 drivers/nvmem/imx-ocotp.c
drivers/nvmem/Kconfig +11 -0
index 8db2978..0b33014 100644
@@ -36,4 +36,15 @@ config NVMEM_SUNXI_SID
 	  This driver can also be built as a module. If so, the module
 	  will be called nvmem_sunxi_sid.
 
+config NVMEM_IMX_OCOTP
+	tristate "i.MX6 On-Chip OTP Controller support"
+	depends on SOC_IMX6
+	help
+	  This is a driver for the On-Chip OTP Controller (OCOTP) available on
+	  i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
+	  eFuses.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called nvmem-imx-ocotp.
+
 endif
drivers/nvmem/Makefile +2 -0
index 4328b93..b512d77 100644
@@ -10,3 +10,5 @@ obj-$(CONFIG_QCOM_QFPROM)	+= nvmem_qfprom.o
 nvmem_qfprom-y			:= qfprom.o
 obj-$(CONFIG_NVMEM_SUNXI_SID)	+= nvmem_sunxi_sid.o
 nvmem_sunxi_sid-y		:= sunxi_sid.o
+obj-$(CONFIG_NVMEM_IMX_OCOTP)	+= nvmem-imx-ocotp.o
+nvmem-imx-ocotp-y		:= imx-ocotp.o
drivers/nvmem/imx-ocotp.c new file +154 -0

154 lines not on this page · raw message

Signature · 1 line
2.4.6
#3 lore raw

v2 cover i.MX6 OCOTP NVMEM support

In reply to Philipp Zabel

Hi Greg,

Am Freitag, den 07.08.2015, 11:48 +0200 schrieb Philipp Zabel:

Quoted 6 lines

Hi,

These patches add support for the i.MX On-Chip OTP (eFuse) Controller found in i.MX6Q/D, i.MX6S/DL, i.MX6SL, and i.MX6SX SoCs to the NVMEM framework. Greg, could you take them into the char-misc tree together with the NVMEM framework?

is anything blocking this?

best regards
Philipp

Quoted 16 lines

Changes since v1:
- Dropped unneeded clk.h include
- Fixed MODULE_LICENSE
- Droped third patch (adding the clock to the device tree node can be done separately)

Philipp Zabel (2):
nvmem: Add i.MX6 OCOTP device tree binding documentation
nvmem: imx-ocotp: Add i.MX6 OCOTP driver

 .../devicetree/bindings/nvmem/imx-ocotp.txt        |  20 +++
 drivers/nvmem/Kconfig                              |  11 ++
 drivers/nvmem/Makefile                             |   2 +
 drivers/nvmem/imx-ocotp.c                          | 154 +++++++++++++++++++++
 4 files changed, 187 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
 create mode 100644 drivers/nvmem/imx-ocotp.c