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imx_watchdog: Add a header file for watchdog registers

PATCH Superseded Fabio Estevam 3 participants 4 messages Oct 2, 2015

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v2 of 3 Superseded Latest is v3 →

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Fabio Estevam

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#0 lore raw

PATCH v2 1/2 imx_watchdog: Add a header file for watchdog registers

From: Fabio Estevam <[email protected]>

Create fsl_wdog.h to store the watchdog registers and bit fields.

This can be useful when accesses to the watchdog block are made from other parts, such as arch/arm/ cpu code.

---
Changes since v1:
- Newly introduced

 drivers/watchdog/imx_watchdog.c | 14 +-------------
 include/fsl_wdog.h              | 18 ++++++++++++++++++
 2 files changed, 19 insertions(+), 13 deletions(-)
 create mode 100644 include/fsl_wdog.h
drivers/watchdog/imx_watchdog.c +1 -13
index 9a77a54..0d77595 100644
@@ -8,19 +8,7 @@
 #include <asm/io.h>
 #include <watchdog.h>
 #include <asm/arch/imx-regs.h>
-
-struct watchdog_regs {
-	u16	wcr;	/* Control */
-	u16	wsr;	/* Service */
-	u16	wrsr;	/* Reset Status */
-};
-
-#define WCR_WDZST	0x01
-#define WCR_WDBG	0x02
-#define WCR_WDE		0x04	/* WDOG enable */
-#define WCR_WDT		0x08
-#define WCR_SRS		0x10
-#define SET_WCR_WT(x)	(x << 8)
+#include <fsl_wdog.h>
 
 #ifdef CONFIG_IMX_WATCHDOG
 void hw_watchdog_reset(void)
include/fsl_wdog.h new file +18 -0
new file mode 100644
index 0000000..d15a70c
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+struct watchdog_regs {
+	u16	wcr;	/* Control */
+	u16	wsr;	/* Service */
+	u16	wrsr;	/* Reset Status */
+};
+
+#define WCR_WDZST	0x01
+#define WCR_WDBG	0x02
+#define WCR_WDE		0x04
+#define WCR_WDT		0x08
+#define WCR_SRS		0x10
+#define SET_WCR_WT(x)	(x << 8)
Signature · 1 line
1.9.1
author reviewer
#1 lore raw

PATCH v2 1/1 ls102xa: Fix reset hang

From: Fabio Estevam <[email protected]>

Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.

Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.

This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.

In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.

---
Changes since v1:
- Do not add duplicate wdog struct (Wolfgang)

 arch/arm/cpu/armv7/ls102xa/cpu.c | 15 +++++++++++++++
 drivers/watchdog/Makefile        |  2 +-
 2 files changed, 16 insertions(+), 1 deletion(-)
arch/arm/cpu/armv7/ls102xa/cpu.c +15 -0
index 8dd95d9..e2eb5f3 100644
@@ -13,6 +13,8 @@
 #include <tsec.h>
 #include <netdev.h>
 #include <fsl_esdhc.h>
+#include <config.h>
+#include <fsl_wdog.h>
 
 #include "fsl_epu.h"
 
@@ -354,3 +356,16 @@ void smp_kick_all_cpus(void)
 	asm volatile("sev");
 }
 #endif
+
+void reset_cpu(ulong addr)
+{
+	struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+
+	clrbits_be16(&wdog->wcr, WCR_SRS);
+
+	while (1) {
+		/*
+		 * Let the watchdog trigger
+		 */
+	}
+}
drivers/watchdog/Makefile +1 -1
index 9e9cb55..a007ae8 100644
@@ -7,7 +7,7 @@
 
 obj-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
 obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
-ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610 ls102xa))
+ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610))
 obj-y += imx_watchdog.o
 endif
 obj-$(CONFIG_S5P)               += s5p_wdt.o
Signature · 1 line
1.9.1
#2 lore raw

PATCH v2 1/1 ls102xa: Fix reset hang

Dear Fabio Estevam,

Quoted 15 lines · In message <[email protected]> you wrote:

Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.

Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.

This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.

In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.

Quoted 6 lines

---
Changes since v1:
- Do not add duplicate wdog struct (Wolfgang)

Thanks a lot!

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Work 8 hours, sleep 8 hours; but not the same 8 hours.
#3 lore raw

PATCH v2 1/1 ls102xa: Fix reset hang

In reply to Fabio Estevam
Quoted 16 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang.

Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.

This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x.

In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit.

Quoted 6 lines

---
Changes since v1:
- Do not add duplicate wdog struct (Wolfgang)

Thanks a lot for fixing this.

York