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Tegra: T210: Add QSPI driver

PATCH Superseded Tom Warren 2 participants 3 messages Oct 16, 2015 – Oct 19, 2015

Subsystems (2)
SPI Tegra architecture support

v2 of 5 Superseded Latest is v5 →

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Tom Warren

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PATCH v2 1/1 Tegra: T210: Add QSPI driver

This is the normal Tegra SPI driver modified to work with the QSPI controller in Tegra210. It does not do 2x/4x transfers or any other QSPI protocol.

Author: Yen Lin <[email protected]>

Signed-off-by Yen Lin <[email protected]>
Signed-off-by Tom Warren <[email protected]>

---
Changes in v2:
- Drop defconfig and pinmux files, this is a driver-only patch.
- When pinmux tables have been updated for P2371/P2571, another
- patch will be sent to enable the QSPI driver on those boards.

 drivers/spi/Kconfig         |   5 +
 drivers/spi/Makefile        |   1 +
 drivers/spi/tegra210_qspi.c | 411 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 417 insertions(+)
 create mode 100644 drivers/spi/tegra210_qspi.c
drivers/spi/Kconfig +5 -0
index 8e04fce..168f31d 100644
@@ -115,6 +115,11 @@ config TEGRA20_SLINK
 	  be used to access the SPI NOR flash on platforms embedding this
 	  nVidia Tegra20/Tegra30 IP cores.
 
+config TEGRA210_QSPI
+	bool "nVidia Tegra210 QSPI driver"
+	help
+	  Enable the Tegra Quad-SPI (QSPI) driver for T210.
+
 config XILINX_SPI
 	bool "Xilinx SPI driver"
 	help
drivers/spi/Makefile +1 -0
index de241be..209a41e 100644
@@ -46,6 +46,7 @@ obj-$(CONFIG_SH_QSPI) += sh_qspi.o
 obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
 obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
 obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
+obj-$(CONFIG_TEGRA210_QSPI) += tegra210_qspi.o
 obj-$(CONFIG_TI_QSPI) += ti_qspi.o
 obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o
 obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
drivers/spi/tegra210_qspi.c new file +411 -0

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Signature · 1 line
1.8.2.1.610.g562af5b
#1 lore raw

PATCH v2 1/1 Tegra: T210: Add QSPI driver

Quoted 3 lines · Tom Warren

This is the normal Tegra SPI driver modified to work with the QSPI controller in Tegra210. It does not do 2x/4x transfers or any other QSPI protocol.

I've just realized we don't have a binding document for QSPI. I believe we need to get one into the Linux kernel's DT binding docs repo as part of the work on this driver. Presumably this controller is very similar to the other Tegra SPI controllers, so this will be a simple process.

The code looks OK at a quick glance, except for the nit below.

Quoted 6 lines
drivers/spi/tegra210_qspi.c +3 -0
 
+static int tegra210_qspi_claim_bus(struct udevice *bus)
 
+	/* Clear stale status here */
+	setbits_le32(&regs->fifo_status,

drivers/spi/tegra210_qspi.c line 156

Quoted 10 lines
drivers/spi/tegra210_qspi.c +10 -0
+		     QSPI_FIFO_STS_ERR	|
+		     QSPI_FIFO_STS_TX_FIFO_OVF	|
+		     QSPI_FIFO_STS_TX_FIFO_UNR	|
+		     QSPI_FIFO_STS_RX_FIFO_OVF	|
+		     QSPI_FIFO_STS_RX_FIFO_UNR	|
+		     QSPI_FIFO_STS_TX_FIFO_FULL	|
+		     QSPI_FIFO_STS_TX_FIFO_EMPTY	|
+		     QSPI_FIFO_STS_RX_FIFO_FULL	|
+		     QSPI_FIFO_STS_RX_FIFO_EMPTY);
+	debug("%s: FIFO STATUS = %08x\n", __func__, readl(&regs->fifo_status));

Isn't this redundant with the status clear at the start of tegra210_qspi_xfer()?

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#2 lore raw

PATCH v2 1/1 Tegra: T210: Add QSPI driver

Stephen,

-----Original Message-----
From: Stephen Warren [mailto:swarren at wwwdotorg.org]
Sent: Monday, October 19, 2015 10:37 AM
To: Tom Warren <[email protected]>
Cc: u-boot at lists.denx.de; jteki at openedev.com; Stephen Warren <[email protected]>; tomcwarren3959 at gmail.com
Subject: Re: [U-Boot] [PATCH v2] Tegra: T210: Add QSPI driver

Quoted 3 lines · Tom Warren

This is the normal Tegra SPI driver modified to work with the QSPI controller in Tegra210. It does not do 2x/4x transfers or any other QSPI protocol.

I've just realized we don't have a binding document for QSPI. I believe we need to get one into the Linux kernel's DT binding docs repo as part of the work on this driver. Presumably this controller is very similar to the other Tegra SPI controllers, so this will be a simple process. [Tom] Will you be writing the binding doc?

The code looks OK at a quick glance, except for the nit below.

Quoted 7 lines
drivers/spi/tegra210_qspi.c +4 -0
 
+static int tegra210_qspi_claim_bus(struct udevice *bus)
 
+	/* Clear stale status here */
+	setbits_le32(&regs->fifo_status,
+		     QSPI_FIFO_STS_ERR	|

drivers/spi/tegra210_qspi.c

Quoted 10 lines
drivers/spi/tegra210_qspi.c +10 -0
+		     QSPI_FIFO_STS_TX_FIFO_OVF	|
+		     QSPI_FIFO_STS_TX_FIFO_UNR	|
+		     QSPI_FIFO_STS_RX_FIFO_OVF	|
+		     QSPI_FIFO_STS_RX_FIFO_UNR	|
+		     QSPI_FIFO_STS_TX_FIFO_FULL	|
+		     QSPI_FIFO_STS_TX_FIFO_EMPTY	|
+		     QSPI_FIFO_STS_RX_FIFO_FULL	|
+		     QSPI_FIFO_STS_RX_FIFO_EMPTY);
+	debug("%s: FIFO STATUS = %08x\n", __func__, 
+readl(&regs->fifo_status));

Isn't this redundant with the status clear at the start of tegra210_qspi_xfer()?
[Tom] Yen wrote this driver originally (adapted from the regular Tegra SPI driver), so I was hoping he would answer. I can remove it and test read/write/erase/update/etc., but I'd like Yen to weigh in. Somehow he appears to have been dropped from CC again - re-adding him.

Tom
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