gallium: add support for NIR as alternate IR

index 793bdaf..caa9ffc 100644
@@ -107,6 +107,10 @@ void
 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 {
    switch (var->data.mode) {
+   case nir_var_all:
+      assert(!"invalid mode");
+      break;
+
    case nir_var_local:
       assert(!"nir_shader_add_variable cannot be used for local variables");
       break;

index c867e6d..2a84cb0 100644
@@ -82,6 +82,7 @@ typedef struct {
 } nir_state_slot;
 
 typedef enum {
+   nir_var_all = -1,
    nir_var_shader_in,
    nir_var_shader_out,
    nir_var_global,

index 688b48f..b4ed857 100644
@@ -176,7 +176,7 @@ nir_lower_io_block(nir_block *block, void *void_state)
 
       nir_variable_mode mode = intrin->variables[0]->var->data.mode;
 
-      if (state->mode != -1 && state->mode != mode)
+      if (state->mode != nir_var_all && state->mode != mode)
          continue;
 
       switch (intrin->intrinsic) {

index af9d041..e22f5fa 100644
@@ -219,7 +219,8 @@ brw_create_nir(struct brw_context *brw,
    nir_assign_var_locations(&nir->uniforms,
                             &nir->num_uniforms,
                             is_scalar ? type_size_scalar : type_size_vec4);
-   nir_lower_io(nir, -1, is_scalar ? type_size_scalar : type_size_vec4);
+   nir_lower_io(nir, nir_var_all,
+                is_scalar ? type_size_scalar : type_size_vec4);
    nir_validate_shader(nir);
 
    nir_remove_dead_variables(nir);

index 95eed26..9f39abd 100644
@@ -1179,7 +1179,12 @@ hud_create(struct pipe_context *pipe, struct cso_context *cso)
       };
 
       struct tgsi_token tokens[1000];
-      struct pipe_shader_state state = {tokens};
+      struct pipe_shader_state state;
+
+      memset(&state, 0, sizeof(state));
+
+      state.ir = PIPE_SHADER_IR_TGSI;
+      state.tokens = tokens;
 
       if (!tgsi_text_translate(fragment_shader_text, tokens, Elements(tokens))) {
          assert(0);

@@ -1226,7 +1231,12 @@ hud_create(struct pipe_context *pipe, struct cso_context *cso)
       };
 
       struct tgsi_token tokens[1000];
-      struct pipe_shader_state state = {tokens};
+      struct pipe_shader_state state;
+
+      memset(&state, 0, sizeof(state));
+
+      state.ir = PIPE_SHADER_IR_TGSI;
+      state.tokens = tokens;
 
       if (!tgsi_text_translate(vertex_shader_text, tokens, Elements(tokens))) {
          assert(0);

index caa2062..6cd2b70 100644
@@ -272,8 +272,10 @@ pp_tgsi_to_state(struct pipe_context *pipe, const char *text, bool isvs,
       return NULL;
    }
 
+   memset(&state, 0, sizeof(state));
+
+   state.ir = PIPE_SHADER_IR_TGSI;
    state.tokens = tokens;
-   memset(&state.stream_output, 0, sizeof(state.stream_output));
 
    if (isvs) {
       ret_state = pipe->create_vs_state(pipe, &state);

index 3d21319..96a51c4 100644
@@ -1777,14 +1777,16 @@ void *ureg_create_shader( struct ureg_program *ureg,
 {
    struct pipe_shader_state state;
 
+   memset(&state, 0, sizeof(state));
+
+   state.ir = PIPE_SHADER_IR_TGSI;
+
    state.tokens = ureg_finalize(ureg);
    if(!state.tokens)
       return NULL;
 
    if (so)
       state.stream_output = *so;
-   else
-      memset(&state.stream_output, 0, sizeof(state.stream_output));
 
    switch (ureg->processor) {
    case TGSI_PROCESSOR_VERTEX:

78 lines not on this page · raw message

index a94e5cc..3790011 100644
@@ -422,7 +422,12 @@ null_constant_buffer(struct pipe_context *ctx)
             "MOV OUT[0], CONST[0]\n"
             "END\n";
       struct tgsi_token tokens[1000];
-      struct pipe_shader_state state = {tokens};
+      struct pipe_shader_state state;
+
+      memset(&state, 0, sizeof(state));
+
+      state.ir = PIPE_SHADER_IR_TGSI;
+      state.tokens = tokens;
 
       if (!tgsi_text_translate(text, tokens, Elements(tokens))) {
          puts("Can't compile a fragment shader.");

index a494715..29b0bfb 100644
@@ -701,12 +701,20 @@ enum pipe_shader_cap
 
 /**
  * Shader intermediate representation.
+ *
+ * Note that if the driver requests something other than TGSI, it must
+ * always be prepared to receive TGSI in addition to it's preferred IR.
+ * If the driver requests TGSI as it's preferred IR, it will *always*
+ * get TGSI.
+ *
+ * Note that PIPE_SHADER_IR_TGSI should be zero for backwards compat with
+ * state trackers that only understand TGSI.
  */
 enum pipe_shader_ir
 {
-   PIPE_SHADER_IR_TGSI,
+   PIPE_SHADER_IR_TGSI = 0,
    PIPE_SHADER_IR_LLVM,
-   PIPE_SHADER_IR_NATIVE
+   PIPE_SHADER_IR_NATIVE,
 };
 
 /**

index 4bf8d46..50bfc4a 100644
@@ -211,10 +211,26 @@ struct pipe_stream_output_info
    } output[PIPE_MAX_SO_OUTPUTS];
 };
 
-
+/**
+ * The 'ir' parameter identifies whether the shader state contains TGSI
+ * tokens, etc.  If the driver returns 'PIPE_SHADER_IR_TGSI' for the
+ * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
+ * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid.  If the driver
+ * requests a different 'pipe_shader_ir' type, then it must check the 'ir'
+ * enum to see if it is getting TGSI tokens or it's preferred IR.
+ *
+ * TODO pipe_compute_state should probably get similar treatment to handle
+ * multiple IR's in a cleaner way..
+ */
 struct pipe_shader_state
 {
-   const struct tgsi_token *tokens;
+   enum pipe_shader_ir ir;
+   /* TODO are anon unions allowed? */
+   union {
+      const struct tgsi_token *tokens;
+      void *llvm;
+      void *native;
+   };
    struct pipe_stream_output_info stream_output;
 };
 

index 29b0bfb..0dbc54c 100644
@@ -715,6 +715,7 @@ enum pipe_shader_ir
    PIPE_SHADER_IR_TGSI = 0,
    PIPE_SHADER_IR_LLVM,
    PIPE_SHADER_IR_NATIVE,
+   PIPE_SHADER_IR_NIR,
 };
 
 /**

index 50bfc4a..54ca31f 100644
@@ -230,6 +230,7 @@ struct pipe_shader_state
       const struct tgsi_token *tokens;
       void *llvm;
       void *native;
+      void *nir;
    };
    struct pipe_stream_output_info stream_output;
 };

70 lines not on this page · raw message

index 8c9234b..b4e5483 100644
@@ -126,8 +126,8 @@ struct ir3_compile {
 static struct ir3_instruction * create_immed(struct ir3_block *block, uint32_t val);
 static struct ir3_block * get_block(struct ir3_compile *ctx, nir_block *nblock);
 
-static struct nir_shader *to_nir(struct ir3_compile *ctx,
-		const struct tgsi_token *tokens, struct ir3_shader_variant *so)
+static struct nir_shader *
+to_nir(struct ir3_compile *ctx, struct ir3_shader_variant *so)
 {
 	static const nir_shader_compiler_options options = {
 			.lower_fpow = true,

@@ -164,7 +164,7 @@ static struct nir_shader *to_nir(struct ir3_compile *ctx,
 		tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
 	}
 
-	struct nir_shader *s = tgsi_to_nir(tokens, &options);
+	struct nir_shader *s = tgsi_to_nir(so->shader->tokens, &options);
 
 	if (fd_mesa_debug & FD_DBG_OPTMSGS) {
 		debug_printf("----------------------\n");

@@ -214,9 +214,7 @@ static struct nir_shader *to_nir(struct ir3_compile *ctx,
 }
 
 static struct ir3_compile *
-compile_init(struct ir3_compiler *compiler,
-		struct ir3_shader_variant *so,
-		const struct tgsi_token *tokens)
+compile_init(struct ir3_compiler *compiler, struct ir3_shader_variant *so)
 {
 	struct ir3_compile *ctx = rzalloc(NULL, struct ir3_compile);
 

@@ -245,7 +243,7 @@ compile_init(struct ir3_compiler *compiler,
 	ctx->block_ht = _mesa_hash_table_create(ctx,
 			_mesa_hash_pointer, _mesa_key_pointer_equal);
 
-	ctx->s = to_nir(ctx, tokens, so);
+	ctx->s = to_nir(ctx, so);
 
 	so->first_driver_param = so->first_immediate = ctx->s->num_uniforms;
 

@@ -2432,7 +2430,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
 
 	assert(!so->ir);
 
-	ctx = compile_init(compiler, so, so->shader->tokens);
+	ctx = compile_init(compiler, so);
 	if (!ctx) {
 		DBG("INIT failed!");
 		ret = -1;

index b64f78c..30def8e 100644
@@ -71,6 +71,7 @@ static const struct debug_named_value debug_options[] = {
 		{"glsl120",   FD_DBG_GLSL120,"Temporary flag to force GLSL 1.20 (rather than 1.30) on a3xx+"},
 		{"shaderdb",  FD_DBG_SHADERDB, "Enable shaderdb output"},
 		{"flush",     FD_DBG_FLUSH,  "Force flush after every draw"},
+		{"nir",       FD_DBG_NIR,    "Prefer NIR as native IR"},
 		DEBUG_NAMED_VALUE_END
 };
 

@@ -398,7 +399,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 	case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 	case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 	case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
-        case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
+	case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 		return 0;
 	case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 		return 1;

@@ -410,6 +411,8 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 	case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 		return 16;
 	case PIPE_SHADER_CAP_PREFERRED_IR:
+		if ((fd_mesa_debug & FD_DBG_NIR) && is_ir3(screen))
+			return PIPE_SHADER_IR_NIR;
 		return PIPE_SHADER_IR_TGSI;
 	}
 	debug_printf("unknown shader param %d\n", param);

index 0d2418e..56d3235 100644
@@ -73,6 +73,7 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
 #define FD_DBG_GLSL120  0x0400
 #define FD_DBG_SHADERDB 0x0800
 #define FD_DBG_FLUSH    0x1000
+#define FD_DBG_NIR      0x2000
 
 extern int fd_mesa_debug;
 extern bool fd_binning_enabled;

index b4e5483..5a53e32 100644
@@ -164,7 +164,14 @@ to_nir(struct ir3_compile *ctx, struct ir3_shader_variant *so)
 		tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
 	}
 
-	struct nir_shader *s = tgsi_to_nir(so->shader->tokens, &options);
+	struct nir_shader *s;
+
+	if (so->shader->nir) {
+		// XXX need nir_clone() here..
+		s = so->shader->nir;
+	} else {
+		s = tgsi_to_nir(so->shader->tokens, &options);
+	}
 
 	if (fd_mesa_debug & FD_DBG_OPTMSGS) {
 		debug_printf("----------------------\n");

@@ -292,6 +299,12 @@ compile_error(struct ir3_compile *ctx, const char *format, ...)
 static void
 compile_free(struct ir3_compile *ctx)
 {
+	/* TODO .. probably need a ralloc_free(ctx->s) here, at least
+	 * for the tgsi_to_nir case.. right now in the case we get
+	 * NIR directly, we want to skip this since the nir_shader isn't
+	 * getting cloned..  and/or if it was we might be wanting to
+	 * free it in ir3_shader_destroy()??
+	 */
 	ralloc_free(ctx);
 }
 

index 7b56533..0cbf8fe 100644
@@ -39,6 +39,7 @@
 
 #include "ir3_shader.h"
 #include "ir3_compiler.h"
+#include "ir3_nir.h"
 
 
 static void

@@ -188,9 +189,15 @@ create_variant(struct ir3_shader *shader, struct ir3_shader_key key)
 	v->type = shader->type;
 
 	if (fd_mesa_debug & FD_DBG_DISASM) {
-		DBG("dump tgsi: type=%d, k={bp=%u,cts=%u,hp=%u}", shader->type,
-			key.binning_pass, key.color_two_side, key.half_precision);
-		tgsi_dump(shader->tokens, 0);
+		if (shader->nir) {
+			DBG("dump nir: type=%d, k={bp=%u,cts=%u,hp=%u}", shader->type,
+					key.binning_pass, key.color_two_side, key.half_precision);
+			nir_print_shader(shader->nir, stderr);
+		} else {
+			DBG("dump tgsi: type=%d, k={bp=%u,cts=%u,hp=%u}", shader->type,
+					key.binning_pass, key.color_two_side, key.half_precision);
+			tgsi_dump(shader->tokens, 0);
+		}
 	}
 
 	ret = ir3_compile_shader_nir(shader->compiler, v);

@@ -267,7 +274,9 @@ ir3_shader_destroy(struct ir3_shader *shader)
 		v = v->next;
 		delete_variant(t);
 	}
+
 	free((void *)shader->tokens);
+	/* XXX ralloc_free(shader->nir); */
 	free(shader);
 }
 

@@ -281,7 +290,20 @@ ir3_shader_create(struct pipe_context *pctx,
 	shader->id = ++shader->compiler->shader_count;
 	shader->pctx = pctx;
 	shader->type = type;
-	shader->tokens = tgsi_dup_tokens(cso->tokens);
+	if (cso->ir == PIPE_SHADER_IR_NIR) {
+		/* TODO might need nir_clone() here.. Depends a bit on how we
+		 * define the lifecycle of cso->nir.  If we could assume that it
+		 * always sticks around until the cso is destroyed, then we'd
+		 * only need to clone in to_nir() (for the variant specific
+		 * lowering), rather than both here and to_nir().  This is a bit
+		 * different from the lifetime of cso->tokens which sometimes
+		 * but not always goes away after the pipe->pipe_create_xyz_state()
+		 * call (which is unfortunate, and maybe worth fixing).
+		 */
+		shader->nir = cso->nir;
+	} else {
+		shader->tokens = tgsi_dup_tokens(cso->tokens);
+	}
 	shader->stream_output = cso->stream_output;
 	if (fd_mesa_debug & FD_DBG_SHADERDB) {
 		/* if shader-db run, create a standard variant immediately

index 7e2c27d..9ef3277 100644
@@ -220,6 +220,8 @@ struct ir3_shader_variant {
 	struct ir3_shader *shader;
 };
 
+typedef struct nir_shader nir_shader;
+
 struct ir3_shader {
 	enum shader_t type;
 

@@ -230,6 +232,7 @@ struct ir3_shader {
 	struct ir3_compiler *compiler;
 
 	struct pipe_context *pctx;
+	nir_shader *nir;
 	const struct tgsi_token *tokens;
 	struct pipe_stream_output_info stream_output;
 

index 5a53e32..2b9a841 100644
@@ -1377,7 +1377,10 @@ emit_intrinisic(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
 	const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
 	struct ir3_instruction **dst, **src;
 	struct ir3_block *b = ctx->block;
-	unsigned idx = intr->const_index[0];
+	unsigned idx = 0;
+
+	for (unsigned i = 0; i < nir_intrinsic_infos[intr->intrinsic].num_indices; i++)
+		idx += intr->const_index[i];
 
 	if (info->has_dest) {
 		dst = get_dst(ctx, &intr->dest, intr->num_components);

index 2b9a841..317ed79 100644
@@ -2232,6 +2232,12 @@ setup_output(struct ir3_compile *ctx, nir_variable *out)
 	unsigned slot = out->data.location;
 	unsigned comp = 0;
 
+	// XXX temporary hack for NIR vs and TGSI fs.. since there is
+	// some disagreement about varying slots..
+	if (ctx->so->shader->nir)
+		if (slot >= VARYING_SLOT_VAR0)
+			slot += 9;
+
 	DBG("; out: slot=%u, len=%ux%u, drvloc=%u",
 			slot, array_len, ncomp, n);