Add support for Varisys Cyrus board
Subsystems (2)
cover Add support for Varisys Cyrus board
Much of this code is patterned off the P5020DS support. The Cyrus board uses an MCP79411 rtc chip, so we add support for that before adding the board.
Andy Fleming (2):
rtc: Add MCP79411 support to DS1307 rtc driver
mpc85xx: Add support for the Varisys Cyrus board
arch/powerpc/cpu/mpc85xx/Kconfig | 4 + board/varisys/common/Makefile | 23 ++ board/varisys/common/eeprom.h | 6 + board/varisys/common/sys_eeprom.c | 605 +++++++++++++++++++++++++++++++++++ board/varisys/cyrus/Kconfig | 13 + board/varisys/cyrus/Makefile | 8 + board/varisys/cyrus/README | 21 ++ board/varisys/cyrus/cyrus.c | 116 +++++++ board/varisys/cyrus/cyrus.h | 11 + board/varisys/cyrus/ddr.c | 188 +++++++++++ board/varisys/cyrus/eth.c | 100 ++++++ board/varisys/cyrus/law.c | 27 ++ board/varisys/cyrus/pbi.cfg | 35 ++ board/varisys/cyrus/pci.c | 23 ++ board/varisys/cyrus/rcw_p5020_v2.cfg | 11 + board/varisys/cyrus/rcw_p5040.cfg | 11 + board/varisys/cyrus/tlb.c | 106 ++++++ configs/Cyrus_P5020_defconfig | 9 + configs/Cyrus_P5040_defconfig | 9 + drivers/rtc/Makefile | 2 +- drivers/rtc/ds1307.c | 34 ++ include/configs/cyrus.h | 590 ++++++++++++++++++++++++++++++++++ 22 files changed, 1951 insertions(+), 1 deletion(-) create mode 100644 board/varisys/common/Makefile create mode 100644 board/varisys/common/eeprom.h create mode 100644 board/varisys/common/sys_eeprom.c create mode 100644 board/varisys/cyrus/Kconfig create mode 100644 board/varisys/cyrus/Makefile create mode 100644 board/varisys/cyrus/README create mode 100644 board/varisys/cyrus/cyrus.c create mode 100644 board/varisys/cyrus/cyrus.h create mode 100644 board/varisys/cyrus/ddr.c create mode 100644 board/varisys/cyrus/eth.c create mode 100644 board/varisys/cyrus/law.c create mode 100644 board/varisys/cyrus/pbi.cfg create mode 100644 board/varisys/cyrus/pci.c create mode 100644 board/varisys/cyrus/rcw_p5020_v2.cfg create mode 100644 board/varisys/cyrus/rcw_p5040.cfg create mode 100644 board/varisys/cyrus/tlb.c create mode 100644 configs/Cyrus_P5020_defconfig create mode 100644 configs/Cyrus_P5040_defconfig create mode 100644 include/configs/cyrus.h
Signature · 1 line
1.9.1
PATCH 1/2 rtc: Add MCP79411 support to DS1307 rtc driver
The code is from Adrian Cox, and is patterned after similar support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This chip is used on the Cyrus board from Varisys.
--- drivers/rtc/Makefile | 2 +- drivers/rtc/ds1307.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 1 deletion(-)
drivers/rtc/Makefile +1 -1
@@ -4,7 +4,6 @@ # # SPDX-License-Identifier: GPL-2.0+ # - #ccflags-y += -DDEBUG obj-$(CONFIG_DM_RTC) += rtc-uclass.o
@@ -37,6 +36,7 @@ obj-$(CONFIG_RTC_M48T35A) += m48t35ax.o obj-$(CONFIG_RTC_MAX6900) += max6900.o obj-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o obj-$(CONFIG_RTC_MC146818) += mc146818.o +obj-$(CONFIG_RTC_MCP79411) += ds1307.o obj-$(CONFIG_MCFRTC) += mcfrtc.o obj-$(CONFIG_RTC_MK48T59) += mk48t59.o obj-$(CONFIG_RTC_MPC5200) += mpc5xxx.o
drivers/rtc/ds1307.c +34 -0
@@ -58,6 +58,10 @@#define RTC_CTL_BIT_SQWE 0x10/* Square Wave Enable */ #define RTC_CTL_BIT_OUT 0x80/* Output Control */ +/* MCP7941X-specific bits */ +#define MCP7941X_BIT_ST 0x80 +#define MCP7941X_BIT_VBATEN 0x08 +static uchar rtc_read (uchar reg);static void rtc_write (uchar reg,uchar val);
@@ -69,6 +73,9 @@ int rtc_get (struct rtc_time *tmp)int rel =0 ;uchar sec, min, hour, mday, wday, mon, year; +#ifdef CONFIG_RTC_MCP79411 +read_rtc: +#endif sec =rtc_read (RTC_SEC_REG_ADDR ); min =rtc_read (RTC_MIN_REG_ADDR ); hour =rtc_read (RTC_HR_REG_ADDR );
@@ -81,6 +88,7 @@ int rtc_get (struct rtc_time *tmp)"hr: %02x min: %02x sec: %02x\n" , year, mon, mday, wday, hour, min, sec); +#ifdef CONFIG_RTC_DS1307 if (sec &RTC_SEC_BIT_CH ) {printf ("### Warning: RTC oscillator has stopped\n" );/* clear the CH flag */
@@ -88,6 +96,23 @@ int rtc_get (struct rtc_time *tmp) rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); rel = -1; } +#endif + +#ifdef CONFIG_RTC_MCP79411 +/* make sure that the backup battery is enabled */ +if (!(wday &MCP7941X_BIT_VBATEN )) { +rtc_write (RTC_DAY_REG_ADDR , + wday |MCP7941X_BIT_VBATEN ); + } + +/* clock halted? turn it on, so clock can tick. */ +if (!(sec &MCP7941X_BIT_ST )) { +rtc_write (RTC_SEC_REG_ADDR ,MCP7941X_BIT_ST ); +printf ("Started RTC\n" ); + goto read_rtc; + } +#endif + tmp->tm_sec =bcd2bin (sec &0x7F ); tmp->tm_min =bcd2bin (min &0x7F );
@@ -121,11 +146,20 @@ int rtc_set (struct rtc_time *tmp)rtc_write (RTC_YR_REG_ADDR ,bin2bcd (tmp->tm_year %100 ));rtc_write (RTC_MON_REG_ADDR ,bin2bcd (tmp->tm_mon)); +#ifdef CONFIG_RTC_MCP79411 +rtc_write (RTC_DAY_REG_ADDR , +bin2bcd (tmp->tm_wday +1 ) |MCP7941X_BIT_VBATEN ); +#else rtc_write (RTC_DAY_REG_ADDR ,bin2bcd (tmp->tm_wday +1 )); +#endif rtc_write (RTC_DATE_REG_ADDR ,bin2bcd (tmp->tm_mday));rtc_write (RTC_HR_REG_ADDR ,bin2bcd (tmp->tm_hour));rtc_write (RTC_MIN_REG_ADDR ,bin2bcd (tmp->tm_min)); +#ifdef CONFIG_RTC_MCP79411 +rtc_write (RTC_SEC_REG_ADDR ,bin2bcd (tmp->tm_sec) |MCP7941X_BIT_ST ); +#else rtc_write (RTC_SEC_REG_ADDR ,bin2bcd (tmp->tm_sec)); +#endif return 0 ; }
Signature · 1 line
1.9.1
PATCH 1/2 rtc: Add MCP79411 support to DS1307 rtc driver
Quoted 9 lines · Andy Fleming
The code is from Adrian Cox, and is patterned after similar support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This chip is used on the Cyrus board from Varisys.
Signed-off-by Andy Fleming <[email protected]>--- drivers/rtc/Makefile | 2 +- drivers/rtc/ds1307.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 1 deletion(-)
Tom,
We don't have a custodian for RTC, do we? Shall I take this in with Andy's other patch?
York
PATCH 1/2 rtc: Add MCP79411 support to DS1307 rtc driver
Quoted 13 lines · York Sun
Quoted 9 lines · Andy Fleming
The code is from Adrian Cox, and is patterned after similar support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This chip is used on the Cyrus board from Varisys.
Signed-off-by Andy Fleming <[email protected]>--- drivers/rtc/Makefile | 2 +- drivers/rtc/ds1307.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 1 deletion(-)
Quoted 4 lines
Tom,
We don't have a custodian for RTC, do we? Shall I take this in with Andy's other patch?
Works for me, thanks!
Signature · 8 lines
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PATCH 1/2 rtc: Add MCP79411 support to DS1307 rtc driver
In reply to Andy FlemingQuoted 9 lines · Andy Fleming
The code is from Adrian Cox, and is patterned after similar support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This chip is used on the Cyrus board from Varisys.
Signed-off-by Andy Fleming <[email protected]>--- drivers/rtc/Makefile | 2 +- drivers/rtc/ds1307.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 1 deletion(-)
Applied to u-boot-mpc85xx, awaiting upstream.
York
PATCH 2/2 mpc85xx: Add support for the Varisys Cyrus board
In reply to Andy FlemingThis board runs a P5020 or P5040 chip, and utilizes an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian@humboldt dot co dot uk>
--- arch/powerpc/cpu/mpc85xx/Kconfig | 4 + board/varisys/common/Makefile | 23 ++ board/varisys/common/eeprom.h | 6 + board/varisys/common/sys_eeprom.c | 605 +++++++++++++++++++++++++++++++++++ board/varisys/cyrus/Kconfig | 13 + board/varisys/cyrus/Makefile | 8 + board/varisys/cyrus/README | 21 ++ board/varisys/cyrus/cyrus.c | 116 +++++++ board/varisys/cyrus/cyrus.h | 11 + board/varisys/cyrus/ddr.c | 188 +++++++++++ board/varisys/cyrus/eth.c | 100 ++++++ board/varisys/cyrus/law.c | 27 ++ board/varisys/cyrus/pbi.cfg | 35 ++ board/varisys/cyrus/pci.c | 23 ++ board/varisys/cyrus/rcw_p5020_v2.cfg | 11 + board/varisys/cyrus/rcw_p5040.cfg | 11 + board/varisys/cyrus/tlb.c | 106 ++++++ configs/Cyrus_P5020_defconfig | 9 + configs/Cyrus_P5040_defconfig | 9 + include/configs/cyrus.h | 590 ++++++++++++++++++++++++++++++++++ 20 files changed, 1916 insertions(+) create mode 100644 board/varisys/common/Makefile create mode 100644 board/varisys/common/eeprom.h create mode 100644 board/varisys/common/sys_eeprom.c create mode 100644 board/varisys/cyrus/Kconfig create mode 100644 board/varisys/cyrus/Makefile create mode 100644 board/varisys/cyrus/README create mode 100644 board/varisys/cyrus/cyrus.c create mode 100644 board/varisys/cyrus/cyrus.h create mode 100644 board/varisys/cyrus/ddr.c create mode 100644 board/varisys/cyrus/eth.c create mode 100644 board/varisys/cyrus/law.c create mode 100644 board/varisys/cyrus/pbi.cfg create mode 100644 board/varisys/cyrus/pci.c create mode 100644 board/varisys/cyrus/rcw_p5020_v2.cfg create mode 100644 board/varisys/cyrus/rcw_p5040.cfg create mode 100644 board/varisys/cyrus/tlb.c create mode 100644 configs/Cyrus_P5020_defconfig create mode 100644 configs/Cyrus_P5040_defconfig create mode 100644 include/configs/cyrus.h
arch/powerpc/cpu/mpc85xx/Kconfig +4 -0
@@ -149,6 +149,9 @@ config TARGET_XPEDITE550X config TARGET_UCP1020 bool "Support uCP1020" +config TARGET_CYRUS + bool "Support Varisys Cyrus" + endchoice source "board/freescale/b4860qds/Kconfig"
@@ -185,6 +188,7 @@ source "board/gdsys/p1022/Kconfig" source "board/keymile/kmp204x/Kconfig" source "board/sbc8548/Kconfig" source "board/socrates/Kconfig" +source "board/varisys/cyrus/Kconfig" source "board/xes/xpedite520x/Kconfig" source "board/xes/xpedite537x/Kconfig" source "board/xes/xpedite550x/Kconfig"
board/varisys/common/Makefile new file +23 -0
@@ -0,0 +1,23 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +MINIMAL= + +ifdef CONFIG_SPL_BUILD +ifdef CONFIG_SPL_INIT_MINIMAL +MINIMAL=y +endif +endif + +ifdef MINIMAL +# necessary to create built-in.o +obj- := __dummy__.o +else +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_ID_EEPROM) += sys_eeprom.o +endif +endif
board/varisys/common/eeprom.h new file +6 -0
@@ -0,0 +1,6 @@ +/* EEPROM init functions for Cyrus */ + + +void init_eeprom (int bus_num,int addr,int addr_len); +void mac_read_from_fixed_id (void ); +int mac_read_from_eeprom_common (void );
board/varisys/common/sys_eeprom.c new file +605 -0
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board/varisys/cyrus/Kconfig new file +13 -0
@@ -0,0 +1,13 @@ +if TARGET_CYRUS + +config SYS_BOARD + default "cyrus" + +config SYS_VENDOR + default "varisys" + +config SYS_CONFIG_NAME + default "cyrus" + +endif +
board/varisys/cyrus/Makefile new file +8 -0
@@ -0,0 +1,8 @@ +# + +obj-y += $(BOARD).o +obj-y += ddr.o +obj-y += law.o +obj-y += tlb.o +obj-y += eth.o +obj-$(CONFIG_PCI) += pci.o
board/varisys/cyrus/README new file +21 -0
@@ -0,0 +1,21 @@ +Rebuilding u-boot for Cyrus + +The Cyrus defconfigs are Cyrus_P5020_defconfig and Cyrus_P5040_defconfig. + +They currently disable size optimization in order to avoid a relocation +bug in some versions of GCC. As the output size is a constant, the size +optimization is not currently important. + +Cyrus boots off a microSD card in a slot on the motherboard. This requires +that the u-boot is built for the Pre-Boot Loader on the P5020/P5040. +In order to reflash u-boot, you must download u-boot.pbl, then write it +onto the card. To do that from u-boot: + +> tftp 1000000 u-boot.pbl +> mmc write 1000000 8 672 + +If you want to do this via a card reader in linux: + +> dd if=u-boot.pbl of=/dev/sdX bs=512 oseek=8 + +
board/varisys/cyrus/cyrus.c new file +116 -0
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board/varisys/cyrus/cyrus.h new file +11 -0
@@ -0,0 +1,11 @@ +/* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __CYRUS_H +#define __CYRUS_H + +void fdt_fixup_board_enet (void *blob); +void pci_of_setup (void *blob,bd_t *bd); + +#endif
board/varisys/cyrus/ddr.c new file +188 -0
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board/varisys/cyrus/eth.c new file +100 -0
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board/varisys/cyrus/law.c new file +27 -0
@@ -0,0 +1,27 @@ +/* +* Author: Adrian Cox +* Based on corenet_ds law files. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +struct law_entry law_table[] = { +SET_LAW (CONFIG_SYS_LBC0_BASE_PHYS ,LAW_SIZE_64K ,LAW_TRGT_IF_LBC ), +SET_LAW (CONFIG_SYS_LBC1_BASE_PHYS ,LAW_SIZE_4K ,LAW_TRGT_IF_LBC ), +#ifdef CONFIG_SYS_BMAN_MEM_PHYS +SET_LAW (CONFIG_SYS_BMAN_MEM_PHYS ,LAW_SIZE_2M ,LAW_TRGT_IF_BMAN ), +#endif +#ifdef CONFIG_SYS_QMAN_MEM_PHYS +SET_LAW (CONFIG_SYS_QMAN_MEM_PHYS ,LAW_SIZE_2M ,LAW_TRGT_IF_QMAN ), +#endif +#ifdef CONFIG_SYS_DCSRBAR_PHYS +/* Limit DCSR to 32M to access NPC Trace Buffer */ +SET_LAW (CONFIG_SYS_DCSRBAR_PHYS ,LAW_SIZE_32M ,LAW_TRGT_IF_DCSR ), +#endif +}; + +int num_law_entries =ARRAY_SIZE (law_table);
board/varisys/cyrus/pbi.cfg new file +35 -0
@@ -0,0 +1,35 @@ +# +# Copyright 2012 Freescale Semiconductor, Inc. +# +# Refer docs/README.pblimage for more details about how-to configure +# and create PBL boot image +# +# SPDX-License-Identifier: GPL-2.0+ +# + +#PBI commands +#Initialize CPC1 as 1MB SRAM +09010000 00200400 +09138000 00000000 +091380c0 00000100 +09010100 00000000 +09010104 fff0000b +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff00000 +09000d08 81000013 +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Initialize eSPI controller, default configuration is slow for eSPI to +#load data, this configuration comes from u-boot eSPI driver. +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +09138000 00000000 +091380c0 00000000
board/varisys/cyrus/pci.c new file +23 -0
@@ -0,0 +1,23 @@ +/* +* Copyright 2007-2011 Freescale Semiconductor, Inc. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> +#include <command.h> +#include <pci.h> +#include <asm/fsl_pci.h> +#include <libfdt.h> +#include <fdt_support.h> +#include <asm/fsl_serdes.h> + +void pci_init_board (void ) +{ +fsl_pcie_init_board (0 ); +} + +void pci_of_setup (void *blob,bd_t *bd) +{ +FT_FSL_PCI_SETUP ; +}
board/varisys/cyrus/rcw_p5020_v2.cfg new file +11 -0
@@ -0,0 +1,11 @@ +# +# Default RCW for Cyrus P5020 +# + +#PBL preamble and RCW header +aa55aa55 010e0100 +#64 bytes RCW data +0c540000 00000000 1e1e0000 00000000 +44808c00 ff002000 68000000 45000000 +00000000 00000000 00000000 0003000f +a0000000 00000000 00000000 00000000
board/varisys/cyrus/rcw_p5040.cfg new file +11 -0
@@ -0,0 +1,11 @@ +# +# Default RCW for Cyrus P5040 +# + +#PBL preamble and RCW header +aa55aa55 010e0100 +#64 bytes RCW data +90e00000 00000000 acac9800 00440000 +44808c00 ff29a000 68000000 61000000 +00000000 00000000 00000000 0003000f +a0000000 00000000 00000000 00000000
board/varisys/cyrus/tlb.c new file +106 -0
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configs/Cyrus_P5020_defconfig new file +9 -0
@@ -0,0 +1,9 @@ +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_CYRUS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,PPC_P5020" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_NETDEVICES=y +CONFIG_E1000=y
configs/Cyrus_P5040_defconfig new file +9 -0
@@ -0,0 +1,9 @@ +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_CYRUS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,PPC_P5040" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_NETDEVICES=y +CONFIG_E1000=y
include/configs/cyrus.h new file +590 -0
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Signature · 1 line
1.9.1
PATCH 2/2 mpc85xx: Add support for the Varisys Cyrus board
Quoted 40 lines · Andy Fleming
This board runs a P5020 or P5040 chip, and utilizes an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian@humboldt dot co dot uk>Signed-off-by Andy Fleming <[email protected]>--- arch/powerpc/cpu/mpc85xx/Kconfig | 4 + board/varisys/common/Makefile | 23 ++ board/varisys/common/eeprom.h | 6 + board/varisys/common/sys_eeprom.c | 605 +++++++++++++++++++++++++++++++++++ board/varisys/cyrus/Kconfig | 13 + board/varisys/cyrus/Makefile | 8 + board/varisys/cyrus/README | 21 ++ board/varisys/cyrus/cyrus.c | 116 +++++++ board/varisys/cyrus/cyrus.h | 11 + board/varisys/cyrus/ddr.c | 188 +++++++++++ board/varisys/cyrus/eth.c | 100 ++++++ board/varisys/cyrus/law.c | 27 ++ board/varisys/cyrus/pbi.cfg | 35 ++ board/varisys/cyrus/pci.c | 23 ++ board/varisys/cyrus/rcw_p5020_v2.cfg | 11 + board/varisys/cyrus/rcw_p5040.cfg | 11 + board/varisys/cyrus/tlb.c | 106 ++++++ configs/Cyrus_P5020_defconfig | 9 + configs/Cyrus_P5040_defconfig | 9 + include/configs/cyrus.h | 590 ++++++++++++++++++++++++++++++++++ 20 files changed, 1916 insertions(+) create mode 100644 board/varisys/common/Makefile create mode 100644 board/varisys/common/eeprom.h create mode 100644 board/varisys/common/sys_eeprom.c create mode 100644 board/varisys/cyrus/Kconfig create mode 100644 board/varisys/cyrus/Makefile create mode 100644 board/varisys/cyrus/README create mode 100644 board/varisys/cyrus/cyrus.c create mode 100644 board/varisys/cyrus/cyrus.h create mode 100644 board/varisys/cyrus/ddr.c create mode 100644 board/varisys/cyrus/eth.c create mode 100644 board/varisys/cyrus/law.c
Quoted 9 lines
create mode 100644 board/varisys/cyrus/pbi.cfg create mode 100644 board/varisys/cyrus/pci.c create mode 100644 board/varisys/cyrus/rcw_p5020_v2.cfg create mode 100644 board/varisys/cyrus/rcw_p5040.cfg create mode 100644 board/varisys/cyrus/tlb.c create mode 100644 configs/Cyrus_P5020_defconfig create mode 100644 configs/Cyrus_P5040_defconfig create mode 100644 include/configs/cyrus.h
Andy,
I presume you have examined the difference between board/varisys/common/sys_eeprom.c and the original file board/freescale/common/sys_eeprom.c. Is it possible to reuse the existing file? This is a 600+ lines copy-n-paste.
York
PATCH 2/2 mpc85xx: Add support for the Varisys Cyrus board
Quoted 53 lines · York Sun
Quoted 40 lines · Andy Fleming
This board runs a P5020 or P5040 chip, and utilizes an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian@humboldt dot co dot uk>Signed-off-by Andy Fleming <[email protected]>--- arch/powerpc/cpu/mpc85xx/Kconfig | 4 + board/varisys/common/Makefile | 23 ++ board/varisys/common/eeprom.h | 6 + board/varisys/common/sys_eeprom.c | 605 +++++++++++++++++++++++++++++++++++ board/varisys/cyrus/Kconfig | 13 + board/varisys/cyrus/Makefile | 8 + board/varisys/cyrus/README | 21 ++ board/varisys/cyrus/cyrus.c | 116 +++++++ board/varisys/cyrus/cyrus.h | 11 + board/varisys/cyrus/ddr.c | 188 +++++++++++ board/varisys/cyrus/eth.c | 100 ++++++ board/varisys/cyrus/law.c | 27 ++ board/varisys/cyrus/pbi.cfg | 35 ++ board/varisys/cyrus/pci.c | 23 ++ board/varisys/cyrus/rcw_p5020_v2.cfg | 11 + board/varisys/cyrus/rcw_p5040.cfg | 11 + board/varisys/cyrus/tlb.c | 106 ++++++ configs/Cyrus_P5020_defconfig | 9 + configs/Cyrus_P5040_defconfig | 9 + include/configs/cyrus.h | 590 ++++++++++++++++++++++++++++++++++ 20 files changed, 1916 insertions(+) create mode 100644 board/varisys/common/Makefile create mode 100644 board/varisys/common/eeprom.h create mode 100644 board/varisys/common/sys_eeprom.c create mode 100644 board/varisys/cyrus/Kconfig create mode 100644 board/varisys/cyrus/Makefile create mode 100644 board/varisys/cyrus/README create mode 100644 board/varisys/cyrus/cyrus.c create mode 100644 board/varisys/cyrus/cyrus.h create mode 100644 board/varisys/cyrus/ddr.c create mode 100644 board/varisys/cyrus/eth.c create mode 100644 board/varisys/cyrus/law.cQuoted 9 lines
create mode 100644 board/varisys/cyrus/pbi.cfg create mode 100644 board/varisys/cyrus/pci.c create mode 100644 board/varisys/cyrus/rcw_p5020_v2.cfg create mode 100644 board/varisys/cyrus/rcw_p5040.cfg create mode 100644 board/varisys/cyrus/tlb.c create mode 100644 configs/Cyrus_P5020_defconfig create mode 100644 configs/Cyrus_P5040_defconfig create mode 100644 include/configs/cyrus.h
Quoted 6 lines
Andy,
I presume you have examined the difference between
board/varisys/common/sys_eeprom.cand the original fileboard/freescale/common/sys_eeprom.c. Is it possible to reuse the existing file? This is a 600+ lines copy-n-paste.
This code presents some challenges. The code is nearly identical to the Freescale code, and quite unnecessarily so. If I were working at Varisys, I would recommend that we pare down this code to only what we need. As I am not, and as I presume that some amount of eeprom programming may be done in manufacturing, I don't feel comfortable changing this code (other than to perhaps remove the MPC85xx-specific stuff I missed).
Sadly, while it is nearly identical to the Freescale code, there are a number of differences. This code uses NXID version 0, which has been removed from the FSL code. It also supports an alternate mechanism for reading the eeprom (mac_read_from_generic_eeprom).
I can imagine some ways I might refactor the code to ensure that it works for both FSL and Varisys systems, but this raises the issue that these files implement two completely separate APIs which are only nearly-identical in current implementation. Freescale could decide to change the format of their eeproms, and provide scripts to any affected customers to shift them to the new format (they have before). Freescale could discover that manufacturing made a mistake in the formatting, and submit code to accommodate this. Likewise, Varisys could decide that the current format is more than they need, or that it's redundant with some other board mechanism. In such cases, unifying this code would actually make code maintenance *more* difficult for the two companies.
I did initially intend to refactor the code, but changed my mind when I realized how difficult it would be to make sure I hadn't broken anyone else's board. If you think it's necessary, I would probably just try to strip down the varisys version of the file to the bare essentials. I'm just not sure which parts *are* essential at the moment.
Andy
PATCH 2/2 mpc85xx: Add support for the Varisys Cyrus board
Quoted 87 lines · Andy Fleming
Quoted 53 lines · York Sun
Quoted 40 lines · Andy Fleming
This board runs a P5020 or P5040 chip, and utilizes an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian@humboldt dot co dot uk>Signed-off-by Andy Fleming <[email protected]>--- arch/powerpc/cpu/mpc85xx/Kconfig | 4 + board/varisys/common/Makefile | 23 ++ board/varisys/common/eeprom.h | 6 + board/varisys/common/sys_eeprom.c | 605 +++++++++++++++++++++++++++++++++++ board/varisys/cyrus/Kconfig | 13 + board/varisys/cyrus/Makefile | 8 + board/varisys/cyrus/README | 21 ++ board/varisys/cyrus/cyrus.c | 116 +++++++ board/varisys/cyrus/cyrus.h | 11 + board/varisys/cyrus/ddr.c | 188 +++++++++++ board/varisys/cyrus/eth.c | 100 ++++++ board/varisys/cyrus/law.c | 27 ++ board/varisys/cyrus/pbi.cfg | 35 ++ board/varisys/cyrus/pci.c | 23 ++ board/varisys/cyrus/rcw_p5020_v2.cfg | 11 + board/varisys/cyrus/rcw_p5040.cfg | 11 + board/varisys/cyrus/tlb.c | 106 ++++++ configs/Cyrus_P5020_defconfig | 9 + configs/Cyrus_P5040_defconfig | 9 + include/configs/cyrus.h | 590 ++++++++++++++++++++++++++++++++++ 20 files changed, 1916 insertions(+) create mode 100644 board/varisys/common/Makefile create mode 100644 board/varisys/common/eeprom.h create mode 100644 board/varisys/common/sys_eeprom.c create mode 100644 board/varisys/cyrus/Kconfig create mode 100644 board/varisys/cyrus/Makefile create mode 100644 board/varisys/cyrus/README create mode 100644 board/varisys/cyrus/cyrus.c create mode 100644 board/varisys/cyrus/cyrus.h create mode 100644 board/varisys/cyrus/ddr.c create mode 100644 board/varisys/cyrus/eth.c create mode 100644 board/varisys/cyrus/law.cQuoted 9 lines
create mode 100644 board/varisys/cyrus/pbi.cfg create mode 100644 board/varisys/cyrus/pci.c create mode 100644 board/varisys/cyrus/rcw_p5020_v2.cfg create mode 100644 board/varisys/cyrus/rcw_p5040.cfg create mode 100644 board/varisys/cyrus/tlb.c create mode 100644 configs/Cyrus_P5020_defconfig create mode 100644 configs/Cyrus_P5040_defconfig create mode 100644 include/configs/cyrus.hQuoted 6 lines
Andy,
I presume you have examined the difference between
board/varisys/common/sys_eeprom.cand the original fileboard/freescale/common/sys_eeprom.c. Is it possible to reuse the existing file? This is a 600+ lines copy-n-paste.This code presents some challenges. The code is nearly identical to the Freescale code, and quite unnecessarily so. If I were working at Varisys, I would recommend that we pare down this code to only what we need. As I am not, and as I presume that some amount of eeprom programming may be done in manufacturing, I don't feel comfortable changing this code (other than to perhaps remove the MPC85xx-specific stuff I missed).
Sadly, while it is nearly identical to the Freescale code, there are a number of differences. This code uses NXID version 0, which has been removed from the FSL code. It also supports an alternate mechanism for reading the eeprom (
mac_read_from_generic_eeprom).I can imagine some ways I might refactor the code to ensure that it works for both FSL and Varisys systems, but this raises the issue that these files implement two completely separate APIs which are only nearly-identical in current implementation. Freescale could decide to change the format of their eeproms, and provide scripts to any affected customers to shift them to the new format (they have before). Freescale could discover that manufacturing made a mistake in the formatting, and submit code to accommodate this. Likewise, Varisys could decide that the current format is more than they need, or that it's redundant with some other board mechanism. In such cases, unifying this code would actually make code maintenance *more* difficult for the two companies.
Quoted 6 lines
I did initially intend to refactor the code, but changed my mind when I realized how difficult it would be to make sure I hadn't broken anyone else's board. If you think it's necessary, I would probably just try to strip down the varisys version of the file to the bare essentials. I'm just not sure which parts *are* essential at the moment.
Andy,
It makes sense to keep code separated for different manufactures. Some comments in the file header to explain what you just said will be beneficial for maintenance. And if you can strip down unneeded code, that will reduce the size and clearly make it different from the existing code used by Freescale boards.
York