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PCI: hv: New paravirtual PCI front-end for Hyper-V VMs

PATCH Superseded [email protected] 2 participants 10 messages Oct 30, 2015 – Oct 31, 2015

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#0 lore raw

v5 cover PCI: hv: New paravirtual PCI front-end for Hyper-V VMs

From: Jake Oshins <[email protected]>

This patch series incorporates feedback related to the version sent yesterday.

First, export functions that allow correlating Hyper-V virtual processors and Linux cpus, along with the means for invoking a hypercall that targets interrupts at chosen vectors on specfic cpus.

Second, mark various parts of IRQ domain related code as exported, so that this PCI front-end can implement an IRQ domain as part of a module. (The alternative would be to pull all this into the kernel, which would pull in a lot of other Hyper-V related code, as this IRQ domain depends on hv_vmbus.ko.)

Third, modify PCI so that new root PCI buses can be marked with an associated fwnode_handle, and so that root PCI buses can look up their associated IRQ domain by that handle.

Fourth, introduce a new driver, hv_pcifront, which eposes root PCI buses in a Hyper-V VM. These root PCI buses expose real PCIe devices, or PCI Virtual Functions.

Jake Oshins (7):
drivers:hv: Export a function that maps Linux CPU num onto Hyper-V
proc num
drivers:hv: Export hv_do_hypercall()
PCI: Make it possible to implement a PCI MSI IRQ Domain in a module.
PCI: Add fwnode_handle to pci_sysdata
PCI: irqdomain: Look up IRQ domain by fwnode_handle drivers:hv: Define the channel type for Hyper-V PCI Express
pass-through
PCI: hv: New paravirtual PCI front-end for Hyper-V VMs

 MAINTAINERS                    |    1 +
 arch/x86/include/asm/msi.h     |    4 +
 arch/x86/include/asm/pci.h     |   13 +
 arch/x86/kernel/apic/msi.c     |    5 +-
 arch/x86/kernel/apic/vector.c  |    2 +
 drivers/hv/hv.c                |   20 +-
 drivers/hv/hyperv_vmbus.h      |    2 +-
 drivers/hv/vmbus_drv.c         |   17 +
 drivers/pci/Kconfig            |    7 +
 drivers/pci/host/Makefile      |    1 +
 drivers/pci/host/hv_pcifront.c | 2267 ++++++++++++++++++++++++++++++++++++++++
 drivers/pci/msi.c              |    4 +
 drivers/pci/probe.c            |   11 +
 include/asm-generic/pci.h      |    4 +
 include/linux/hyperv.h         |   14 +
 kernel/irq/chip.c              |    1 +
 kernel/irq/irqdomain.c         |    2 +
 17 files changed, 2362 insertions(+), 13 deletions(-)
 create mode 100644 drivers/pci/host/hv_pcifront.c
Signature · 1 line
1.9.1
#1 lore raw

PATCH v5 1/7 drivers:hv: Export a function that maps Linux CPU num onto Hyper-V proc num

From: Jake Oshins <[email protected]>

This patch exposes the mapping between Linux CPU number and Hyper-V virtual processor number. This is necessary because the hypervisor needs to know which virtual processor to target when making a mapping in the Interrupt Redirection Table in the I/O MMU.

---
 drivers/hv/vmbus_drv.c | 17 +++++++++++++++++
 include/linux/hyperv.h |  2 ++
 2 files changed, 19 insertions(+)
drivers/hv/vmbus_drv.c +17 -0
index f19b6f7..c89d0e5 100644
@@ -1191,6 +1191,23 @@ int vmbus_allocate_mmio(struct resource **new, struct hv_device *device_obj,
 }
 EXPORT_SYMBOL_GPL(vmbus_allocate_mmio);
 
+/**
+ * vmbus_cpu_number_to_vp_number() - Map CPU to VP.
+ * @cpu_number: CPU number in Linux terms
+ *
+ * This function returns the mapping between the Linux processor
+ * number and the hypervisor's virtual processor number, useful
+ * in making hypercalls and such that talk about specific
+ * processors.
+ *
+ * Return: Virtual processor number in Hyper-V terms
+ */
+int vmbus_cpu_number_to_vp_number(int cpu_number)
+{
+	return hv_context.vp_index[cpu_number];
+}
+EXPORT_SYMBOL_GPL(vmbus_cpu_number_to_vp_number);
+
 static int vmbus_acpi_add(struct acpi_device *device)
 {
 	acpi_status result;
include/linux/hyperv.h +2 -0
index 54733d5..02393b6 100644
@@ -982,6 +982,8 @@ int vmbus_allocate_mmio(struct resource **new, struct hv_device *device_obj,
 			resource_size_t size, resource_size_t align,
 			bool fb_overlap_ok);
 
+int vmbus_cpu_number_to_vp_number(int cpu_number);
+
 /**
  * VMBUS_DEVICE - macro used to describe a specific hyperv vmbus device
  *
Signature · 1 line
1.9.1
#2 lore raw

PATCH v5 2/7 drivers:hv: Export hv_do_hypercall()

In reply to [email protected]

From: Jake Oshins <[email protected]>

This patch exposes the function that hv_vmbus.ko uses to make hypercalls. This is necessary for retargeting an interrupt when it is given a new affinity and vector.

---
 drivers/hv/hv.c           | 20 ++++++++++----------
 drivers/hv/hyperv_vmbus.h |  2 +-
 include/linux/hyperv.h    |  1 +
 3 files changed, 12 insertions(+), 11 deletions(-)
drivers/hv/hv.c +10 -10
index 6341be8..7a06933 100644
@@ -89,9 +89,9 @@ static int query_hypervisor_info(void)
 }
 
 /*
- * do_hypercall- Invoke the specified hypercall
+ * hv_do_hypercall- Invoke the specified hypercall
  */
-static u64 do_hypercall(u64 control, void *input, void *output)
+u64 hv_do_hypercall(u64 control, void *input, void *output)
 {
 	u64 input_address = (input) ? virt_to_phys(input) : 0;
 	u64 output_address = (output) ? virt_to_phys(output) : 0;
@@ -132,6 +132,7 @@ static u64 do_hypercall(u64 control, void *input, void *output)
 	return hv_status_lo | ((u64)hv_status_hi << 32);
 #endif /* !x86_64 */
 }
+EXPORT_SYMBOL_GPL(hv_do_hypercall);
 
 #ifdef CONFIG_X86_64
 static cycle_t read_hv_clock_tsc(struct clocksource *arg)
@@ -315,7 +316,7 @@ int hv_post_message(union hv_connection_id connection_id,
 {
 
 	struct hv_input_post_message *aligned_msg;
-	u16 status;
+	u64 status;
 
 	if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
 		return -EMSGSIZE;
@@ -329,11 +330,10 @@ int hv_post_message(union hv_connection_id connection_id,
 	aligned_msg->payload_size = payload_size;
 	memcpy((void *)aligned_msg->payload, payload, payload_size);
 
-	status = do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL)
-		& 0xFFFF;
+	status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL);
 
 	put_cpu();
-	return status;
+	return status & 0xFFFF;
 }
 
 
@@ -343,13 +343,13 @@ int hv_post_message(union hv_connection_id connection_id,
  *
  * This involves a hypercall.
  */
-u16 hv_signal_event(void *con_id)
+int hv_signal_event(void *con_id)
 {
-	u16 status;
+	u64 status;
 
-	status = (do_hypercall(HVCALL_SIGNAL_EVENT, con_id, NULL) & 0xFFFF);
+	status = hv_do_hypercall(HVCALL_SIGNAL_EVENT, con_id, NULL);
 
-	return status;
+	return status & 0xFFFF;
 }
 
 static int hv_ce_set_next_event(unsigned long delta,
drivers/hv/hyperv_vmbus.h +1 -1
index 3d70e36..18c66fc 100644
@@ -587,7 +587,7 @@ extern int hv_post_message(union hv_connection_id connection_id,
 			 enum hv_message_type message_type,
 			 void *payload, size_t payload_size);
 
-extern u16 hv_signal_event(void *con_id);
+extern int hv_signal_event(void *con_id);
 
 extern int hv_synic_alloc(void);
 
include/linux/hyperv.h +1 -0
index 02393b6..ea0a0e3 100644
@@ -983,6 +983,7 @@ int vmbus_allocate_mmio(struct resource **new, struct hv_device *device_obj,
 			bool fb_overlap_ok);
 
 int vmbus_cpu_number_to_vp_number(int cpu_number);
+u64 hv_do_hypercall(u64 control, void *input, void *output);
 
 /**
  * VMBUS_DEVICE - macro used to describe a specific hyperv vmbus device
Signature · 1 line
1.9.1
#3 lore raw

PATCH v5 3/7 PCI: Make it possible to implement a PCI MSI IRQ Domain in a module.

In reply to [email protected]

From: Jake Oshins <[email protected]>

The Linux kernel already has the concpet of IRQ domain, whereing a component can expose a set of IRQs which are managed by a particular interrupt controller chip or other subsystem. The PCI driver exposes the notion of an IRQ domain for Message-Signaled Interrupts (MSI) from PCI Express devices. This patch exposes the functions which are necessary for making an MSI IRQ domain within a module.

---
 arch/x86/include/asm/msi.h    | 4 ++++
 arch/x86/kernel/apic/msi.c    | 5 +++--
 arch/x86/kernel/apic/vector.c | 2 ++
 drivers/pci/msi.c             | 4 ++++
 kernel/irq/chip.c             | 1 +
 kernel/irq/irqdomain.c        | 2 ++
 6 files changed, 16 insertions(+), 2 deletions(-)
arch/x86/include/asm/msi.h +4 -0
index 93724cc..e8b7924 100644
@@ -1,7 +1,11 @@
 #ifndef _ASM_X86_MSI_H
 #define _ASM_X86_MSI_H
 #include <asm/hw_irq.h>
+#include <asm/irqdomain.h>
 
 typedef struct irq_alloc_info msi_alloc_info_t;
 
+int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
+		    msi_alloc_info_t *arg);
+
 #endif /* _ASM_X86_MSI_H */
arch/x86/kernel/apic/msi.c +3 -2
index 5f1feb6..bdb28fc 100644
@@ -96,8 +96,8 @@ static irq_hw_number_t pci_msi_get_hwirq(struct msi_domain_info *info,
 	return arg->msi_hwirq;
 }
 
-static int pci_msi_prepare(struct irq_domain *domain, struct device *dev,
-			   int nvec, msi_alloc_info_t *arg)
+int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
+		    msi_alloc_info_t *arg)
 {
 	struct pci_dev *pdev = to_pci_dev(dev);
 	struct msi_desc *desc = first_pci_msi_entry(pdev);
@@ -113,6 +113,7 @@ static int pci_msi_prepare(struct irq_domain *domain, struct device *dev,
 
 	return 0;
 }
+EXPORT_SYMBOL_GPL(pci_msi_prepare);
 
 static void pci_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
 {
arch/x86/kernel/apic/vector.c +2 -0
index 836d11b..f3ac5e1 100644
@@ -29,6 +29,7 @@ struct apic_chip_data {
 };
 
 struct irq_domain *x86_vector_domain;
+EXPORT_SYMBOL_GPL(x86_vector_domain);
 static DEFINE_RAW_SPINLOCK(vector_lock);
 static cpumask_var_t vector_cpumask;
 static struct irq_chip lapic_controller;
@@ -66,6 +67,7 @@ struct irq_cfg *irqd_cfg(struct irq_data *irq_data)
 
 	return data ? &data->cfg : NULL;
 }
+EXPORT_SYMBOL_GPL(irqd_cfg);
 
 struct irq_cfg *irq_cfg(unsigned int irq)
 {
drivers/pci/msi.c +4 -0
index 53e4632..3915a99 100644
@@ -257,6 +257,7 @@ void pci_msi_mask_irq(struct irq_data *data)
 {
 	msi_set_mask_bit(data, 1);
 }
+EXPORT_SYMBOL_GPL(pci_msi_mask_irq);
 
 /**
  * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
@@ -266,6 +267,7 @@ void pci_msi_unmask_irq(struct irq_data *data)
 {
 	msi_set_mask_bit(data, 0);
 }
+EXPORT_SYMBOL_GPL(pci_msi_unmask_irq);
 
 void default_restore_msi_irqs(struct pci_dev *dev)
 {
@@ -1126,6 +1128,7 @@ struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
 {
 	return to_pci_dev(desc->dev);
 }
+EXPORT_SYMBOL(msi_desc_to_pci_dev);
 
 void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
 {
@@ -1285,6 +1288,7 @@ struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
 	domain->bus_token = DOMAIN_BUS_PCI_MSI;
 	return domain;
 }
+EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
 
 /**
  * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
kernel/irq/chip.c +1 -0
index 1520645..2414775 100644
@@ -950,6 +950,7 @@ void irq_chip_ack_parent(struct irq_data *data)
 	data = data->parent_data;
 	data->chip->irq_ack(data);
 }
+EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
 
 /**
  * irq_chip_mask_parent - Mask the parent interrupt
kernel/irq/irqdomain.c +2 -0
index 22aa961..174d7e0 100644
@@ -60,6 +60,7 @@ struct fwnode_handle *irq_domain_alloc_fwnode(void *data)
 	fwid->fwnode.type = FWNODE_IRQCHIP;
 	return &fwid->fwnode;
 }
+EXPORT_SYMBOL_GPL(irq_domain_alloc_fwnode);
 
 /**
  * irq_domain_free_fwnode - Free a non-OF-backed fwnode_handle
@@ -77,6 +78,7 @@ void irq_domain_free_fwnode(struct fwnode_handle *fwnode)
 	kfree(fwid->name);
 	kfree(fwid);
 }
+EXPORT_SYMBOL_GPL(irq_domain_free_fwnode);
 
 /**
  * __irq_domain_add() - Allocate a new irq_domain data structure
Signature · 1 line
1.9.1
#4 lore raw

PATCH v5 4/7 PCI: Add fwnode_handle to pci_sysdata

In reply to [email protected]

From: Jake Oshins <[email protected]>

This patch adds an fwnode_handle to struct pci_sysdata, which is used by the next patch in the series when trying to locate an IRQ domain associated with a root PCI bus.

---
 arch/x86/include/asm/pci.h | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/x86/include/asm/pci.h +11 -0
index 4625943..10213a1 100644
@@ -20,6 +20,9 @@ struct pci_sysdata {
 #ifdef CONFIG_X86_64
 	void		*iommu;		/* IOMMU private data */
 #endif
+#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
+	void		*fwnode;	/* IRQ domain for MSI assignment */
+#endif
 };
 
 extern int pci_routeirq;
@@ -41,6 +44,14 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 }
 #endif
 
+#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
+static inline void *pci_fwnode(struct pci_bus *bus)
+{
+	struct pci_sysdata *sd = bus->sysdata;
+	return sd->fwnode;
+}
+#endif
+
 /* Can be used to override the logic in pci_scan_bus for skipping
    already-configured bus numbers - to be used for buggy BIOSes
    or architectures with incomplete PCI setup by the loader */
Signature · 1 line
1.9.1
#5 lore raw

PATCH v5 5/7 PCI: irqdomain: Look up IRQ domain by fwnode_handle

In reply to [email protected]

From: Jake Oshins <[email protected]>

This patch adds a second way of finding an IRQ domain associated with a root PCI bus. After looking to see if one can be found through the OF tree, it attempts to look up the IRQ domain through an fwnode_handle stored in the pci_sysdata struct.

---
 arch/x86/include/asm/pci.h |  4 +++-
 drivers/pci/probe.c        | 11 +++++++++++
 include/asm-generic/pci.h  |  4 ++++
 3 files changed, 18 insertions(+), 1 deletion(-)
arch/x86/include/asm/pci.h +3 -1
index 10213a1..fb74453 100644
@@ -45,11 +45,13 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 #endif
 
 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
-static inline void *pci_fwnode(struct pci_bus *bus)
+static inline void *_pci_root_bus_fwnode(struct pci_bus *bus)
 {
 	struct pci_sysdata *sd = bus->sysdata;
 	return sd->fwnode;
 }
+
+#define pci_root_bus_fwnode	_pci_root_bus_fwnode
 #endif
 
 /* Can be used to override the logic in pci_scan_bus for skipping
drivers/pci/probe.c +11 -0
index f441d1b..60e50a8 100644
@@ -671,6 +671,17 @@ static struct irq_domain *pci_host_bridge_msi_domain(struct pci_bus *bus)
 	 */
 	d = pci_host_bridge_of_msi_domain(bus);
 
+#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
+	/*
+	 * If no IRQ domain was found via the OF tree, try looking it up
+	 * directly through the fwnode_handle.
+	 */
+	if (!d && pci_root_bus_fwnode(bus)) {
+		d = irq_find_matching_fwnode(pci_root_bus_fwnode(bus),
+					     DOMAIN_BUS_PCI_MSI);
+	}
+#endif
+
 	return d;
 }
 
include/asm-generic/pci.h +4 -0
index f24bc51..3fde985 100644
@@ -21,4 +21,8 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 #define PCI_DMA_BUS_IS_PHYS	(1)
 #endif
 
+#ifndef pci_root_bus_fwnode
+#define pci_root_bus_fwnode(bus)	((void)(bus),NULL)
+#endif
+
 #endif /* _ASM_GENERIC_PCI_H */
Signature · 1 line
1.9.1
#6 lore raw

Re: [PATCH v5 5/7] PCI: irqdomain: Look up IRQ domain by fwnode_handle

Quoted 19 lines · On Fri, Oct 30, 2015 at 11:11 PM, <[email protected]> wrote:

From: Jake Oshins <[email protected]>

This patch adds a second way of finding an IRQ domain associated with a root PCI bus. After looking to see if one can be found through the OF tree, it attempts to look up the IRQ domain through an fwnode_handle stored in the pci_sysdata struct.

---
 arch/x86/include/asm/pci.h |  4 +++-
 drivers/pci/probe.c        | 11 +++++++++++
 include/asm-generic/pci.h  |  4 ++++
 3 files changed, 18 insertions(+), 1 deletion(-)
arch/x86/include/asm/pci.h +0 -0
index 10213a1..fb74453 100644

arch/x86/include/asm/pci.h static inline int pci_proc_domain(struct pci_bus *bus) · line 48

Quoted 5 lines
arch/x86/include/asm/pci.h +1 -1
@@ -45,11 +45,13 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 #endif
 
 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
-static inline void *pci_fwnode(struct pci_bus *bus)
+static inline void *_pci_root_bus_fwnode(struct pci_bus *bus)

I'm sorry what is the point to rename?

Quoted 15 lines
arch/x86/include/asm/pci.h +2 -0
 {
        struct pci_sysdata *sd = bus->sysdata;
        return sd->fwnode;
 }
+
+#define pci_root_bus_fwnode    _pci_root_bus_fwnode
 #endif
 
 /* Can be used to override the logic in pci_scan_bus for skipping
drivers/pci/probe.c +0 -0
index f441d1b..60e50a8 100644
@@ -671,6 +671,17 @@ static struct irq_domain *pci_host_bridge_msi_domain(struct pci_bus *bus)
         */

drivers/pci/probe.c static struct irq_domain *pci_host_bridge_msi_domain(struct pci_bus *bus) · line 681

Quoted 10 lines
drivers/pci/probe.c +8 -0
        d = pci_host_bridge_of_msi_domain(bus);
 
+#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
+       /*
+        * If no IRQ domain was found via the OF tree, try looking it up
+        * directly through the fwnode_handle.
+        */
+       if (!d && pci_root_bus_fwnode(bus)) {
+               d = irq_find_matching_fwnode(pci_root_bus_fwnode(bus),
+                                            DOMAIN_BUS_PCI_MSI);

Gave a second glance and now noticed that you call pci_root_bus_fwnode() twice. So, it actually might be more readable like your first but modified variant:

if (!d) {
void *fwnode = pci_fwnode(bus);

if (fwnode)

    d = irq_find_matching_fwnode(fwnode, DOMAIN_BUS_PCI_MSI);
}

drivers/pci/probe.c static struct irq_domain *pci_host_bridge_msi_domain(struct pci_bus *bus) · line 686

Quoted 5 lines
drivers/pci/probe.c +3 -0
+       }
+#endif
+
        return d;
 }

With Best Regards,
Andy Shevchenko

#7 lore raw

RE: [PATCH v5 5/7] PCI: irqdomain: Look up IRQ domain by fwnode_handle

PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBBbmR5IFNoZXZjaGVua28gW21h aWx0bzphbmR5LnNoZXZjaGVua29AZ21haWwuY29tXQ0KPiBTZW50OiBGcmlkYXksIE9jdG9iZXIg MzAsIDIwMTUgMjo0NCBQTQ0KPiBUbzogSmFrZSBPc2hpbnMgPGpha2VvQG1pY3Jvc29mdC5jb20+ DQo+IENjOiBHcmVnIEtyb2FoLUhhcnRtYW4gPGdyZWdraEBsaW51eGZvdW5kYXRpb24ub3JnPjsg S1kgU3Jpbml2YXNhbg0KPiA8a3lzQG1pY3Jvc29mdC5jb20+OyBsaW51eC1rZXJuZWxAdmdlci5r ZXJuZWwub3JnOw0KPiBkZXZlbEBsaW51eGRyaXZlcnByb2plY3Qub3JnOyBvbGFmQGFlcGZsZS5k ZTsgUm9ibyBCb3QNCj4gPGFwd0BjYW5vbmljYWwuY29tPjsgVml0YWx5IEt1em5ldHNvdiA8dmt1 em5ldHNAcmVkaGF0LmNvbT47DQo+IHRnbHhAcmVkaGF0LmNvbTsgSGFpeWFuZyBaaGFuZyA8aGFp eWFuZ3pAbWljcm9zb2Z0LmNvbT47DQo+IG1hcmMuenluZ2llckBhcm0uY29tOyBCam9ybiBIZWxn YWFzIDxiaGVsZ2Fhc0Bnb29nbGUuY29tPjsgbGludXgtDQo+IHBjaUB2Z2VyLmtlcm5lbC5vcmcN Cj4gU3ViamVjdDogUmU6IFtQQVRDSCB2NSA1LzddIFBDSTogaXJxZG9tYWluOiBMb29rIHVwIElS USBkb21haW4gYnkNCj4gZndub2RlX2hhbmRsZQ0KPiANCj4gT24gRnJpLCBPY3QgMzAsIDIwMTUg YXQgMTE6MTEgUE0sICA8amFrZW9AbWljcm9zb2Z0LmNvbT4gd3JvdGU6DQo+ID4gRnJvbTogSmFr ZSBPc2hpbnMgPGpha2VvQG1pY3Jvc29mdC5jb20+DQo+ID4NCj4gPiBUaGlzIHBhdGNoIGFkZHMg YSBzZWNvbmQgd2F5IG9mIGZpbmRpbmcgYW4gSVJRIGRvbWFpbiBhc3NvY2lhdGVkIHdpdGgNCj4g PiBhIHJvb3QgUENJIGJ1cy4gIEFmdGVyIGxvb2tpbmcgdG8gc2VlIGlmIG9uZSBjYW4gYmUgZm91 bmQgdGhyb3VnaA0KPiA+IHRoZSBPRiB0cmVlLCBpdCBhdHRlbXB0cyB0byBsb29rIHVwIHRoZSBJ UlEgZG9tYWluIHRocm91Z2ggYW4NCj4gPiBmd25vZGVfaGFuZGxlIHN0b3JlZCBpbiB0aGUgcGNp X3N5c2RhdGEgc3RydWN0Lg0KPiA+DQo+ID4gU2lnbmVkLW9mZi1ieTogSmFrZSBPc2hpbnMgPGph a2VvQG1pY3Jvc29mdC5jb20+DQo+ID4gLS0tDQo+ID4gIGFyY2gveDg2L2luY2x1ZGUvYXNtL3Bj aS5oIHwgIDQgKysrLQ0KPiA+ICBkcml2ZXJzL3BjaS9wcm9iZS5jICAgICAgICB8IDExICsrKysr KysrKysrDQo+ID4gIGluY2x1ZGUvYXNtLWdlbmVyaWMvcGNpLmggIHwgIDQgKysrKw0KPiA+ICAz IGZpbGVzIGNoYW5nZWQsIDE4IGluc2VydGlvbnMoKyksIDEgZGVsZXRpb24oLSkNCj4gPg0KPiA+ IGRpZmYgLS1naXQgYS9hcmNoL3g4Ni9pbmNsdWRlL2FzbS9wY2kuaCBiL2FyY2gveDg2L2luY2x1 ZGUvYXNtL3BjaS5oDQo+ID4gaW5kZXggMTAyMTNhMS4uZmI3NDQ1MyAxMDA2NDQNCj4gPiAtLS0g YS9hcmNoL3g4Ni9pbmNsdWRlL2FzbS9wY2kuaA0KPiA+ICsrKyBiL2FyY2gveDg2L2luY2x1ZGUv YXNtL3BjaS5oDQo+ID4gQEAgLTQ1LDExICs0NSwxMyBAQCBzdGF0aWMgaW5saW5lIGludCBwY2lf cHJvY19kb21haW4oc3RydWN0IHBjaV9idXMNCj4gKmJ1cykNCj4gPiAgI2VuZGlmDQo+ID4NCj4g PiAgI2lmZGVmIENPTkZJR19QQ0lfTVNJX0lSUV9ET01BSU4NCj4gPiAtc3RhdGljIGlubGluZSB2 b2lkICpwY2lfZndub2RlKHN0cnVjdCBwY2lfYnVzICpidXMpDQo+ID4gK3N0YXRpYyBpbmxpbmUg dm9pZCAqX3BjaV9yb290X2J1c19md25vZGUoc3RydWN0IHBjaV9idXMgKmJ1cykNCj4gDQo+IEkn bSBzb3JyeSB3aGF0IGlzIHRoZSBwb2ludCB0byByZW5hbWU/DQo+IA0KDQpJIHJlbmFtZWQgaXQg b25seSBiZWNhdXNlIEdlcnJ5IGFza2VkIG1lIHRvIHJlbmFtZSBpdC4gIEFuZCB0aGVuIEkgcmVn ZW5lcmF0ZWQgdGhlIHBhdGNoIHNlcmllcyB3aXRoIHRoYXQgcmVuYW1lIHN0aWxsIGluIHRoZSBx dWV1ZSwgd2hpY2ggd2FzIGEgbWlzdGFrZS4gIFRoZSB3aG9sZSB0aGluZyBpcyBpbnRyb2R1Y2Vk IGluIHRoZSBwcmV2aW91cyBwYXRjaC4gIHBjaV9md25vZGUoKSBkb2Vzbid0IGV4aXN0IHdpdGhv dXQgdGhpcyBwYXRjaCBzZXJpZXMuICBJJ2xsIHN0cmFpZ2h0ZW4gdGhhdCBvdXQuDQoNCg0KPiA+ ICB7DQo+ID4gICAgICAgICBzdHJ1Y3QgcGNpX3N5c2RhdGEgKnNkID0gYnVzLT5zeXNkYXRhOw0K PiA+ICAgICAgICAgcmV0dXJuIHNkLT5md25vZGU7DQo+ID4gIH0NCj4gPiArDQo+ID4gKyNkZWZp bmUgcGNpX3Jvb3RfYnVzX2Z3bm9kZSAgICBfcGNpX3Jvb3RfYnVzX2Z3bm9kZQ0KPiA+ICAjZW5k aWYNCj4gPg0KPiA+ICAvKiBDYW4gYmUgdXNlZCB0byBvdmVycmlkZSB0aGUgbG9naWMgaW4gcGNp X3NjYW5fYnVzIGZvciBza2lwcGluZw0KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BjaS9wcm9i ZS5jIGIvZHJpdmVycy9wY2kvcHJvYmUuYw0KPiA+IGluZGV4IGY0NDFkMWIuLjYwZTUwYTggMTAw NjQ0DQo+ID4gLS0tIGEvZHJpdmVycy9wY2kvcHJvYmUuYw0KPiA+ICsrKyBiL2RyaXZlcnMvcGNp L3Byb2JlLmMNCj4gPiBAQCAtNjcxLDYgKzY3MSwxNyBAQCBzdGF0aWMgc3RydWN0IGlycV9kb21h aW4NCj4gKnBjaV9ob3N0X2JyaWRnZV9tc2lfZG9tYWluKHN0cnVjdCBwY2lfYnVzICpidXMpDQo+ ID4gICAgICAgICAgKi8NCj4gPiAgICAgICAgIGQgPSBwY2lfaG9zdF9icmlkZ2Vfb2ZfbXNpX2Rv bWFpbihidXMpOw0KPiA+DQo+ID4gKyNpZmRlZiBDT05GSUdfUENJX01TSV9JUlFfRE9NQUlODQo+ ID4gKyAgICAgICAvKg0KPiA+ICsgICAgICAgICogSWYgbm8gSVJRIGRvbWFpbiB3YXMgZm91bmQg dmlhIHRoZSBPRiB0cmVlLCB0cnkgbG9va2luZyBpdCB1cA0KPiA+ICsgICAgICAgICogZGlyZWN0 bHkgdGhyb3VnaCB0aGUgZndub2RlX2hhbmRsZS4NCj4gPiArICAgICAgICAqLw0KPiA+ICsgICAg ICAgaWYgKCFkICYmIHBjaV9yb290X2J1c19md25vZGUoYnVzKSkgew0KPiA+ICsgICAgICAgICAg ICAgICBkID0gaXJxX2ZpbmRfbWF0Y2hpbmdfZndub2RlKHBjaV9yb290X2J1c19md25vZGUoYnVz KSwNCj4gPiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBET01B SU5fQlVTX1BDSV9NU0kpOw0KPiANCj4gR2F2ZSBhIHNlY29uZCBnbGFuY2UgYW5kIG5vdyBub3Rp Y2VkIHRoYXQgeW91IGNhbGwNCj4gcGNpX3Jvb3RfYnVzX2Z3bm9kZSgpIHR3aWNlLiBTbywgaXQg YWN0dWFsbHkgbWlnaHQgYmUgbW9yZSByZWFkYWJsZQ0KPiBsaWtlIHlvdXIgZmlyc3QgYnV0IG1v ZGlmaWVkIHZhcmlhbnQ6DQo+IA0KPiBpZiAoIWQpIHsNCj4gICB2b2lkICpmd25vZGUgPSBwY2lf Zndub2RlKGJ1cyk7DQo+IA0KPiAgIGlmIChmd25vZGUpDQo+ICAgICBkID0gaXJxX2ZpbmRfbWF0 Y2hpbmdfZndub2RlKGZ3bm9kZSwgRE9NQUlOX0JVU19QQ0lfTVNJKTsNCj4gfQ0KPiANCj4gPiAr ICAgICAgIH0NCj4gPiArI2VuZGlmDQo+ID4gKw0KPiA+ICAgICAgICAgcmV0dXJuIGQ7DQo+ID4g IH0NCj4gDQo+IA0KPiBXaXRoIEJlc3QgUmVnYXJkcywNCj4gQW5keSBTaGV2Y2hlbmtvDQoNClN1 cmUuICBObyBwcm9ibGVtLiAgSSdsbCByZXNlbmQuDQoNCi0tIEpha2UNCg==

#8 lore raw

PATCH v5 6/7 drivers:hv: Define the channel type for Hyper-V PCI Express pass-through

In reply to [email protected]

From: Jake Oshins <[email protected]>

This defines the channel type for PCI front-ends in Hyper-V VMs.

---
 include/linux/hyperv.h | 11 +++++++++++
 1 file changed, 11 insertions(+)
include/linux/hyperv.h +11 -0
index ea0a0e3..5587899 100644
@@ -1140,6 +1140,17 @@ u64 hv_do_hypercall(u64 control, void *input, void *output);
 		}
 
 /*
+ * PCI Express Pass Through
+ * {44C4F61D-4444-4400-9D52-802E27EDE19F}
+ */
+
+#define HV_PCIE_GUID \
+	.guid = { \
+			0x1D, 0xF6, 0xC4, 0x44, 0x44, 0x44, 0x00, 0x44, \
+			0x9D, 0x52, 0x80, 0x2E, 0x27, 0xED, 0xE1, 0x9F \
+		}
+
+/*
  * Common header for Hyper-V ICs
  */
 
Signature · 1 line
1.9.1
#9 lore raw

PATCH v5 7/7 PCI: hv: New paravirtual PCI front-end for Hyper-V VMs

In reply to [email protected]

From: Jake Oshins <[email protected]>

This patch introduces a new driver which exposes a root PCI bus whenever a PCI Express device is passed through to a guest VM under Hyper-V. The device can be single- or multi-function. The interrupts for the devices are managed by an IRQ domain, implemented within the driver.

---
 MAINTAINERS                    |    1 +
 drivers/pci/Kconfig            |    7 +
 drivers/pci/host/Makefile      |    1 +
 drivers/pci/host/hv_pcifront.c | 2267 ++++++++++++++++++++++++++++++++++++++++
 4 files changed, 2276 insertions(+)
 create mode 100644 drivers/pci/host/hv_pcifront.c
MAINTAINERS +1 -0
index a2d50fe..a1205b4 100644
@@ -5073,6 +5073,7 @@ F:	arch/x86/kernel/cpu/mshyperv.c
 F:	drivers/hid/hid-hyperv.c
 F:	drivers/hv/
 F:	drivers/input/serio/hyperv-keyboard.c
+F:	drivers/pci/host/hv_pcifront.c
 F:	drivers/net/hyperv/
 F:	drivers/scsi/storvsc_drv.c
 F:	drivers/video/fbdev/hyperv_fb.c
drivers/pci/Kconfig +7 -0
index 73de4ef..9b82d93 100644
@@ -118,4 +118,11 @@ config PCI_LABEL
 	def_bool y if (DMI || ACPI)
 	select NLS
 
+config HYPERV_VPCI
+        tristate "Hyper-V PCI Frontend"
+        depends on PCI && X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN
+        help
+          The PCI device frontend driver allows the kernel to import arbitrary
+          PCI devices from a PCI backend to support PCI driver domains.
+
 source "drivers/pci/host/Kconfig"
drivers/pci/host/Makefile +1 -0
index 140d66f..39581fb 100644
@@ -2,6 +2,7 @@ obj-$(CONFIG_PCIE_DW) += pcie-designware.o
 obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o
 obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
 obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
+obj-$(CONFIG_HYPERV_VPCI) += hv_pcifront.o
 obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
 obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
 obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
drivers/pci/host/hv_pcifront.c new file +2267 -0

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Signature · 1 line
1.9.1