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include: Add log2 header from the kernel

PATCH Superseded Fabio Estevam 4 participants 25 messages Nov 2, 2015 – Nov 3, 2015

Subsystems (16)

v5 of 7 Superseded Latest is v7 →

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PATCH v5 1/18 include: Add log2 header from the kernel

From: Fabio Estevam <[email protected]>

Use the log2 header files from the kernel.

Imported from kernel 4.2.3.

---
Changes since v4:
- None

 include/linux/log2.h | 205 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 205 insertions(+)
 create mode 100644 include/linux/log2.h
include/linux/log2.h new file +205 -0
new file mode 100644
index 0000000..aa1de63
@@ -0,0 +1,205 @@
+/* Integer base 2 logarithm calculation
+ *
+ * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells at redhat.com)
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _LINUX_LOG2_H
+#define _LINUX_LOG2_H
+
+#include <linux/types.h>
+#include <linux/bitops.h>
+
+/*
+ * deal with unrepresentable constant logarithms
+ */
+extern __attribute__((const, noreturn))
+int ____ilog2_NaN(void);
+
+/*
+ * non-constant log of base 2 calculators
+ * - the arch may override these in asm/bitops.h if they can be implemented
+ *   more efficiently than using fls() and fls64()
+ * - the arch is not required to handle n==0 if implementing the fallback
+ */
+#ifndef CONFIG_ARCH_HAS_ILOG2_U32
+static inline __attribute__((const))
+int __ilog2_u32(u32 n)
+{
+	return fls(n) - 1;
+}
+#endif
+
+#ifndef CONFIG_ARCH_HAS_ILOG2_U64
+static inline __attribute__((const))
+int __ilog2_u64(u64 n)
+{
+	return fls64(n) - 1;
+}
+#endif
+
+/*
+ *  Determine whether some value is a power of two, where zero is
+ * *not* considered a power of two.
+ */
+
+static inline __attribute__((const))
+bool is_power_of_2(unsigned long n)
+{
+	return (n != 0 && ((n & (n - 1)) == 0));
+}
+
+/*
+ * round up to nearest power of two
+ */
+static inline __attribute__((const))
+unsigned long __roundup_pow_of_two(unsigned long n)
+{
+	return 1UL << fls_long(n - 1);
+}
+
+/*
+ * round down to nearest power of two
+ */
+static inline __attribute__((const))
+unsigned long __rounddown_pow_of_two(unsigned long n)
+{
+	return 1UL << (fls_long(n) - 1);
+}
+
+/**
+ * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value
+ * @n - parameter
+ *
+ * constant-capable log of base 2 calculation
+ * - this can be used to initialise global variables from constant data, hence
+ *   the massive ternary operator construction
+ *
+ * selects the appropriately-sized optimised version depending on sizeof(n)
+ */
+#define ilog2(n)				\
+(						\
+	__builtin_constant_p(n) ? (		\
+		(n) < 1 ? ____ilog2_NaN() :	\
+		(n) & (1ULL << 63) ? 63 :	\
+		(n) & (1ULL << 62) ? 62 :	\
+		(n) & (1ULL << 61) ? 61 :	\
+		(n) & (1ULL << 60) ? 60 :	\
+		(n) & (1ULL << 59) ? 59 :	\
+		(n) & (1ULL << 58) ? 58 :	\
+		(n) & (1ULL << 57) ? 57 :	\
+		(n) & (1ULL << 56) ? 56 :	\
+		(n) & (1ULL << 55) ? 55 :	\
+		(n) & (1ULL << 54) ? 54 :	\
+		(n) & (1ULL << 53) ? 53 :	\
+		(n) & (1ULL << 52) ? 52 :	\
+		(n) & (1ULL << 51) ? 51 :	\
+		(n) & (1ULL << 50) ? 50 :	\
+		(n) & (1ULL << 49) ? 49 :	\
+		(n) & (1ULL << 48) ? 48 :	\
+		(n) & (1ULL << 47) ? 47 :	\
+		(n) & (1ULL << 46) ? 46 :	\
+		(n) & (1ULL << 45) ? 45 :	\
+		(n) & (1ULL << 44) ? 44 :	\
+		(n) & (1ULL << 43) ? 43 :	\
+		(n) & (1ULL << 42) ? 42 :	\
+		(n) & (1ULL << 41) ? 41 :	\
+		(n) & (1ULL << 40) ? 40 :	\
+		(n) & (1ULL << 39) ? 39 :	\
+		(n) & (1ULL << 38) ? 38 :	\
+		(n) & (1ULL << 37) ? 37 :	\
+		(n) & (1ULL << 36) ? 36 :	\
+		(n) & (1ULL << 35) ? 35 :	\
+		(n) & (1ULL << 34) ? 34 :	\
+		(n) & (1ULL << 33) ? 33 :	\
+		(n) & (1ULL << 32) ? 32 :	\
+		(n) & (1ULL << 31) ? 31 :	\
+		(n) & (1ULL << 30) ? 30 :	\
+		(n) & (1ULL << 29) ? 29 :	\
+		(n) & (1ULL << 28) ? 28 :	\
+		(n) & (1ULL << 27) ? 27 :	\
+		(n) & (1ULL << 26) ? 26 :	\
+		(n) & (1ULL << 25) ? 25 :	\
+		(n) & (1ULL << 24) ? 24 :	\
+		(n) & (1ULL << 23) ? 23 :	\
+		(n) & (1ULL << 22) ? 22 :	\
+		(n) & (1ULL << 21) ? 21 :	\
+		(n) & (1ULL << 20) ? 20 :	\
+		(n) & (1ULL << 19) ? 19 :	\
+		(n) & (1ULL << 18) ? 18 :	\
+		(n) & (1ULL << 17) ? 17 :	\
+		(n) & (1ULL << 16) ? 16 :	\
+		(n) & (1ULL << 15) ? 15 :	\
+		(n) & (1ULL << 14) ? 14 :	\
+		(n) & (1ULL << 13) ? 13 :	\
+		(n) & (1ULL << 12) ? 12 :	\
+		(n) & (1ULL << 11) ? 11 :	\
+		(n) & (1ULL << 10) ? 10 :	\
+		(n) & (1ULL <<  9) ?  9 :	\
+		(n) & (1ULL <<  8) ?  8 :	\
+		(n) & (1ULL <<  7) ?  7 :	\
+		(n) & (1ULL <<  6) ?  6 :	\
+		(n) & (1ULL <<  5) ?  5 :	\
+		(n) & (1ULL <<  4) ?  4 :	\
+		(n) & (1ULL <<  3) ?  3 :	\
+		(n) & (1ULL <<  2) ?  2 :	\
+		(n) & (1ULL <<  1) ?  1 :	\
+		(n) & (1ULL <<  0) ?  0 :	\
+		____ilog2_NaN()			\
+				   ) :		\
+	(sizeof(n) <= 4) ?			\
+	__ilog2_u32(n) :			\
+	__ilog2_u64(n)				\
+ )
+
+/**
+ * roundup_pow_of_two - round the given value up to nearest power of two
+ * @n - parameter
+ *
+ * round the given value up to the nearest power of two
+ * - the result is undefined when n == 0
+ * - this can be used to initialise global variables from constant data
+ */
+#define roundup_pow_of_two(n)			\
+(						\
+	__builtin_constant_p(n) ? (		\
+		(n == 1) ? 1 :			\
+		(1UL << (ilog2((n) - 1) + 1))	\
+				   ) :		\
+	__roundup_pow_of_two(n)			\
+ )
+
+/**
+ * rounddown_pow_of_two - round the given value down to nearest power of two
+ * @n - parameter
+ *
+ * round the given value down to the nearest power of two
+ * - the result is undefined when n == 0
+ * - this can be used to initialise global variables from constant data
+ */
+#define rounddown_pow_of_two(n)			\
+(						\
+	__builtin_constant_p(n) ? (		\
+		(1UL << ilog2(n))) :		\
+	__rounddown_pow_of_two(n)		\
+ )
+
+/**
+ * order_base_2 - calculate the (rounded up) base 2 order of the argument
+ * @n: parameter
+ *
+ * The first few values calculated by this routine:
+ *  ob2(0) = 0
+ *  ob2(1) = 0
+ *  ob2(2) = 1
+ *  ob2(3) = 2
+ *  ob2(4) = 2
+ *  ob2(5) = 3
+ *  ... and so on.
+ */
+
+#define order_base_2(n) ilog2(roundup_pow_of_two(n))
+
+#endif /* _LINUX_LOG2_H */
Signature · 1 line
1.9.1
#1 lore raw

PATCH v5 2/18 include: Add generic bitops headers

From: Fabio Estevam <[email protected]>

Use the generic bitops header files from the kernel.

Imported from kernel 4.2.3.

---
Changes since v4:
- None

 include/asm-generic/bitops/__ffs.h | 43 ++++++++++++++++++++++++++++++++++++++
 include/asm-generic/bitops/__fls.h | 43 ++++++++++++++++++++++++++++++++++++++
 include/asm-generic/bitops/fls.h   | 41 ++++++++++++++++++++++++++++++++++++
 include/asm-generic/bitops/fls64.h | 36 +++++++++++++++++++++++++++++++
 include/linux/bitops.h             | 27 ++++++++++++++++++++++++
 5 files changed, 190 insertions(+)
 create mode 100644 include/asm-generic/bitops/__ffs.h
 create mode 100644 include/asm-generic/bitops/__fls.h
 create mode 100644 include/asm-generic/bitops/fls.h
 create mode 100644 include/asm-generic/bitops/fls64.h
include/asm-generic/bitops/__ffs.h new file +43 -0
new file mode 100644
index 0000000..937d7c4
@@ -0,0 +1,43 @@
+#ifndef _ASM_GENERIC_BITOPS___FFS_H_
+#define _ASM_GENERIC_BITOPS___FFS_H_
+
+#include <asm/types.h>
+
+/**
+ * __ffs - find first bit in word.
+ * @word: The word to search
+ *
+ * Undefined if no bit exists, so code should check against 0 first.
+ */
+static __always_inline unsigned long __ffs(unsigned long word)
+{
+	int num = 0;
+
+#if BITS_PER_LONG == 64
+	if ((word & 0xffffffff) == 0) {
+		num += 32;
+		word >>= 32;
+	}
+#endif
+	if ((word & 0xffff) == 0) {
+		num += 16;
+		word >>= 16;
+	}
+	if ((word & 0xff) == 0) {
+		num += 8;
+		word >>= 8;
+	}
+	if ((word & 0xf) == 0) {
+		num += 4;
+		word >>= 4;
+	}
+	if ((word & 0x3) == 0) {
+		num += 2;
+		word >>= 2;
+	}
+	if ((word & 0x1) == 0)
+		num += 1;
+	return num;
+}
+
+#endif /* _ASM_GENERIC_BITOPS___FFS_H_ */
include/asm-generic/bitops/__fls.h new file +43 -0

43 lines not on this page · raw message

include/asm-generic/bitops/fls.h new file +41 -0

41 lines not on this page · raw message

include/asm-generic/bitops/fls64.h new file +36 -0
new file mode 100644
index 0000000..b097cf8
@@ -0,0 +1,36 @@
+#ifndef _ASM_GENERIC_BITOPS_FLS64_H_
+#define _ASM_GENERIC_BITOPS_FLS64_H_
+
+#include <asm/types.h>
+
+/**
+ * fls64 - find last set bit in a 64-bit word
+ * @x: the word to search
+ *
+ * This is defined in a similar way as the libc and compiler builtin
+ * ffsll, but returns the position of the most significant set bit.
+ *
+ * fls64(value) returns 0 if value is 0 or the position of the last
+ * set bit if value is nonzero. The last (most significant) bit is
+ * at position 64.
+ */
+#if BITS_PER_LONG == 32
+static __always_inline int fls64(__u64 x)
+{
+	__u32 h = x >> 32;
+	if (h)
+		return fls(h) + 32;
+	return fls(x);
+}
+#elif BITS_PER_LONG == 64
+static __always_inline int fls64(__u64 x)
+{
+	if (x == 0)
+		return 0;
+	return __fls(x) + 1;
+}
+#else
+#error BITS_PER_LONG not 32 or 64
+#endif
+
+#endif /* _ASM_GENERIC_BITOPS_FLS64_H_ */
include/linux/bitops.h +27 -0
index 7b4011f..1b2e491 100644
@@ -2,6 +2,7 @@
 #define _LINUX_BITOPS_H
 
 #include <asm/types.h>
+#include <linux/compiler.h>
 
 #define BIT(nr)			(1UL << (nr))
 #define BIT_MASK(nr)		(1UL << ((nr) % BITS_PER_LONG))
@@ -139,6 +140,32 @@ static inline unsigned int generic_hweight8(unsigned int w)
 # define fls generic_fls
 #endif
 
+static inline unsigned fls_long(unsigned long l)
+{
+	if (sizeof(l) == 4)
+		return fls(l);
+	return fls64(l);
+}
+
+/**
+ * __ffs64 - find first set bit in a 64 bit word
+ * @word: The 64 bit word
+ *
+ * On 64 bit arches this is a synomyn for __ffs
+ * The result is not defined if no bits are set, so check that @word
+ * is non-zero before calling this.
+ */
+static inline unsigned long __ffs64(u64 word)
+{
+#if BITS_PER_LONG == 32
+	if (((u32)word) == 0UL)
+		return __ffs((u32)(word >> 32)) + 32;
+#elif BITS_PER_LONG != 64
+#error BITS_PER_LONG not 32 or 64
+#endif
+	return __ffs((unsigned long)word);
+}
+
 /**
  * __set_bit - Set a bit in memory
  * @nr: the bit to set
Signature · 1 line
1.9.1
#2 lore raw

PATCH v5 3/18 ARM: bitops: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/arm/include/asm/bitops.h | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/include/asm/bitops.h +5 -0
index 9b78043..d479a38 100644
@@ -190,4 +190,9 @@ found_middle:
 
 #endif /* __KERNEL__ */
 
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/fls64.h>
+
 #endif /* _ARM_BITOPS_H */
Signature · 1 line
1.9.1
#3 lore raw

PATCH v5 4/18 x86: bitops: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Use the generic bitops and also add custom __ffs() implementation as per the kernel.

Also align the ffs() implementation with the kernel.

---
Changes since v4:
- None

 arch/x86/include/asm/bitops.h | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)
arch/x86/include/asm/bitops.h +20 -1
index 5a7e4cb..f97dc66 100644
@@ -14,6 +14,10 @@
  * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
  */
 
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+
 #ifdef CONFIG_SMP
 #define LOCK_PREFIX "lock ; "
 #else
@@ -332,6 +336,20 @@ static __inline__ unsigned long ffz(unsigned long word)
 #ifdef __KERNEL__
 
 /**
+ * __ffs - find first set bit in word
+ * @word: The word to search
+ *
+ * Undefined if no bit exists, so code should check against 0 first.
+ */
+static inline unsigned long __ffs(unsigned long word)
+{
+	__asm__("rep; bsf %1,%0"
+		: "=r" (word)
+		: "rm" (word));
+	return word;
+}
+
+/**
  * ffs - find first bit set
  * @x: the word to search
  *
@@ -346,7 +364,8 @@ static __inline__ int ffs(int x)
 	__asm__("bsfl %1,%0\n\t"
 		"jnz 1f\n\t"
 		"movl $-1,%0\n"
-		"1:" : "=r" (r) : "g" (x));
+		"1:" : "=r" (r) : "rm" (x));
+
 	return r+1;
 }
 #define PLATFORM_FFS
Signature · 1 line
1.9.1
#4 lore raw

PATCH v5 5/18 m68k: bitops: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/m68k/include/asm/bitops.h | 4 ++++
 1 file changed, 4 insertions(+)
arch/m68k/include/asm/bitops.h +4 -0
index f9c434b..69ea26a 100644
@@ -6,6 +6,10 @@
 #define _M68K_BITOPS_H
 
 #include <asm/byteorder.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
 
 extern void set_bit(int nr, volatile void *addr);
 extern void clear_bit(int nr, volatile void *addr);
Signature · 1 line
1.9.1
#5 lore raw

PATCH v5 6/18 blackfin: bitops: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/blackfin/include/asm/bitops.h | 4 ++++
 1 file changed, 4 insertions(+)
arch/blackfin/include/asm/bitops.h +4 -0
index cd7e356..6cde6db 100644
@@ -15,6 +15,10 @@
 
 #include <asm/byteorder.h>
 #include <asm/system.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
 
 #ifdef __KERNEL__
 /*
Signature · 1 line
1.9.1
#6 lore raw

PATCH v5 7/18 sh: bitops: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/sh/include/asm/bitops.h | 5 +++++
 1 file changed, 5 insertions(+)
arch/sh/include/asm/bitops.h +5 -0
index c57d628..8cb8385 100644
@@ -1,6 +1,11 @@
 #ifndef __ASM_SH_BITOPS_H
 #define __ASM_SH_BITOPS_H
 
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
+
 #ifdef __KERNEL__
 #include <asm/irqflags.h>
 /* For __swab32 */
Signature · 1 line
1.9.1
#7 lore raw

PATCH v5 8/18 microblaze: bitops: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- Split the sh and microblaze changes in two patches (Jagan)

 arch/microblaze/include/asm/bitops.h | 4 ++++
 1 file changed, 4 insertions(+)
arch/microblaze/include/asm/bitops.h +4 -0
index 0ac78d7..d24f2cf 100644
@@ -7,6 +7,10 @@
 
 #include <asm/byteorder.h>	/* swab32 */
 #include <asm/system.h>		/* save_flags */
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
 
 #ifdef __KERNEL__
 /*
Signature · 1 line
1.9.1
#8 lore raw

PATCH v5 9/18 sandbox: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/sandbox/include/asm/bitops.h | 4 ++++
 1 file changed, 4 insertions(+)
arch/sandbox/include/asm/bitops.h +4 -0
index f1a7aee..f27d5e9 100644
@@ -21,6 +21,10 @@
 
 #include <linux/compiler.h>
 #include <asm/system.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
 
 #ifdef __KERNEL__
 
Signature · 1 line
1.9.1
#9 lore raw

PATCH v5 10/18 sparc: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/sparc/include/asm/bitops.h | 5 +++++
 1 file changed, 5 insertions(+)
arch/sparc/include/asm/bitops.h +5 -0
index fa39fa3..c66f730 100644
@@ -9,4 +9,9 @@
 #ifndef _SPARC_BITOPS_H
 #define _SPARC_BITOPS_H
 
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
+
 #endif				/* _SPARC_BITOPS_H */
Signature · 1 line
1.9.1
#10 lore raw

PATCH v5 11/18 openrisc: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/openrisc/include/asm/bitops.h | 4 ++++
 1 file changed, 4 insertions(+)
arch/openrisc/include/asm/bitops.h +4 -0
index 6d0b57c..28c4658 100644
@@ -12,6 +12,10 @@
 #define PLATFORM_FFS
 #include <asm/bitops/ffs.h>
 
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
+
 #define hweight32(x) generic_hweight32(x)
 #define hweight16(x) generic_hweight16(x)
 #define hweight8(x) generic_hweight8(x)
Signature · 1 line
1.9.1
#11 lore raw

PATCH v5 12/18 nds32: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/nds32/include/asm/bitops.h | 4 ++++
 1 file changed, 4 insertions(+)
arch/nds32/include/asm/bitops.h +4 -0
index f1aa9a3..7ee37c3 100644
@@ -21,6 +21,10 @@
 #ifdef __KERNEL__
 
 #include <asm/system.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
 
 #define smp_mb__before_clear_bit()	do { } while (0)
 #define smp_mb__after_clear_bit()	do { } while (0)
Signature · 1 line
1.9.1
#12 lore raw

PATCH v5 13/18 nios2: Use the generic bitops headers

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

The generic bitops headers are required when calling logarithimic functions, such as ilog2().

---
Changes since v4:
- None

 arch/nios2/include/asm/bitops.h | 5 +++++
 1 file changed, 5 insertions(+)
arch/nios2/include/asm/bitops.h +5 -0
index 3e17964..ee46f37 100644
@@ -13,4 +13,9 @@
 #include <asm/bitops/non-atomic.h>
 #include <asm/bitops/ffs.h>
 
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
+
 #endif /* __ASM_NIOS2_BITOPS_H */
Signature · 1 line
1.9.1
#13 lore raw

PATCH v5 14/18 compat: Remove is_power_of_2() definition

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Use the is_power_of_2() definition from log2.h to align with the kernel implementation.

---
Changes since v4:
- None

 arch/arm/mach-mvebu/mbus.c | 2 +-
 drivers/mtd/mtdcore.c      | 2 +-
 drivers/mtd/ubi/build.c    | 2 +-
 fs/ubifs/super.c           | 2 +-
 include/linux/compat.h     | 6 ------
 5 files changed, 4 insertions(+), 10 deletions(-)
arch/arm/mach-mvebu/mbus.c +1 -1
index 771cce6..346278e 100644
@@ -52,7 +52,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
-#include <linux/compat.h>
+#include <linux/log2.h>
 #include <linux/mbus.h>
 
 /* DDR target is the same on all platforms */
drivers/mtd/mtdcore.c +1 -1
index 2f2172b..81be0f7 100644
@@ -27,8 +27,8 @@
 #include <linux/gfp.h>
 #include <linux/slab.h>
 #else
-#include <linux/compat.h>
 #include <linux/err.h>
+#include <linux/log2.h>
 #include <ubi_uboot.h>
 #endif
 
drivers/mtd/ubi/build.c +1 -1
index f0a3b67..f484e62 100644
@@ -30,7 +30,7 @@
 #include <linux/slab.h>
 #include <linux/major.h>
 #else
-#include <linux/compat.h>
+#include <linux/log2.h>
 #endif
 #include <linux/err.h>
 #include <ubi_uboot.h>
fs/ubifs/super.c +1 -1
index c474313..abe861a 100644
@@ -31,7 +31,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <memalign.h>
-#include <linux/compat.h>
+#include <linux/log2.h>
 #include <linux/stat.h>
 #include <linux/err.h>
 #include "ubifs.h"
include/linux/compat.h +0 -6
index 59937de..e561ee3 100644
@@ -130,12 +130,6 @@ static inline void led_trigger_unregister_simple(struct led_trigger *trigger) {}
 static inline void led_trigger_event(struct led_trigger *trigger,
 					enum led_brightness event) {}
 
-/* include/linux/log2.h */
-static inline int is_power_of_2(unsigned long n)
-{
-	return (n != 0 && ((n & (n - 1)) == 0));
-}
-
 /* uapi/linux/limits.h */
 #define XATTR_LIST_MAX 65536	/* size of extended attribute namelist (64k) */
 
Signature · 1 line
1.9.1
#14 lore raw

PATCH v5 15/18 powerpc: Remove __ilog2_u64 and ffs4 from bitops

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the kernel implementation.

Use the generic __ffs64 instead of a custom powerpc implementation.

---
Changes since v4:
- None

 arch/powerpc/cpu/mpc83xx/law.c      |  5 +++--
 arch/powerpc/cpu/mpc85xx/tlb.c      |  2 ++
 arch/powerpc/cpu/mpc8xxx/law.c      |  5 +++--
 arch/powerpc/include/asm/bitops.h   | 11 +----------
 arch/powerpc/include/asm/fsl_law.h  |  1 +
 arch/powerpc/include/asm/fsl_srio.h |  2 ++
 6 files changed, 12 insertions(+), 14 deletions(-)
arch/powerpc/cpu/mpc83xx/law.c +3 -2
index 66c88b6..262ae7f 100644
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <asm/fsl_law.h>
 #include <asm/mmu.h>
+#include <linux/log2.h>
 
 int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 {
@@ -20,7 +21,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (start == 0)
 		start_align = 1ull << (LAW_SIZE_2G + 1);
 	else
-		start_align = 1ull << (ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start) - 1);
 	law_sz = min(start_align, sz);
 	law_sz_enc = __ilog2_u64(law_sz) - 1;
 
@@ -40,7 +41,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (sz) {
 		start += law_sz;
 
-		start_align = 1ull << (ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start) - 1);
 		law_sz = min(start_align, sz);
 		law_sz_enc = __ilog2_u64(law_sz) - 1;
 		ecm = &immap->sysconf.ddrlaw[1];
arch/powerpc/cpu/mpc85xx/tlb.c +2 -0
index 8e0508f..cf31eb2 100644
@@ -14,6 +14,8 @@
 #include <addr_map.h>
 #endif
 
+#include <linux/log2.h>
+
 DECLARE_GLOBAL_DATA_PTR;
 
 void invalidate_tlb(u8 tlb)
arch/powerpc/cpu/mpc8xxx/law.c +3 -2
index 33d53a8..24baad4 100644
@@ -11,6 +11,7 @@
 #include <linux/compiler.h>
 #include <asm/fsl_law.h>
 #include <asm/io.h>
+#include <linux/log2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -187,7 +188,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (start == 0)
 		start_align = 1ull << (LAW_SIZE_32G + 1);
 	else
-		start_align = 1ull << (ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start) - 1);
 	law_sz = min(start_align, sz);
 	law_sz_enc = __ilog2_u64(law_sz) - 1;
 
@@ -202,7 +203,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (sz) {
 		start += law_sz;
 
-		start_align = 1ull << (ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start) - 1);
 		law_sz = min(start_align, sz);
 		law_sz_enc = __ilog2_u64(law_sz) - 1;
 
arch/powerpc/include/asm/bitops.h +1 -10
index a6bcf3c..14217ef 100644
@@ -6,6 +6,7 @@
 #define _PPC_BITOPS_H
 
 #include <asm/byteorder.h>
+#include <asm-generic/bitops/__ffs.h>
 
 extern void set_bit(int nr, volatile void *addr);
 extern void clear_bit(int nr, volatile void *addr);
@@ -209,16 +210,6 @@ static inline int fls64(__u64 x)
 #error BITS_PER_LONG not 32 or 64
 #endif
 
-static inline int __ilog2_u64(u64 n)
-{
-	return fls64(n) - 1;
-}
-
-static inline int ffs64(u64 x)
-{
-	return __ilog2_u64(x & -x) + 1ull;
-}
-
 #ifdef __KERNEL__
 
 /*
arch/powerpc/include/asm/fsl_law.h +1 -0
index 3b50487..8e1d22a 100644
@@ -10,6 +10,7 @@
 #define _FSL_LAW_H_
 
 #include <asm/io.h>
+#include <linux/log2.h>
 
 #define LAW_EN	0x80000000
 
arch/powerpc/include/asm/fsl_srio.h +2 -0
index e5aab2a..ec25e16 100644
@@ -7,6 +7,8 @@
 #ifndef _FSL_SRIO_H_
 #define _FSL_SRIO_H_
 
+#include <linux/log2.h>
+
 enum atmu_size {
 	ATMU_SIZE_4K = 0xb,
 	ATMU_SIZE_8K,
Signature · 1 line
1.9.1
#15 lore raw

PATCH v5 15/18 powerpc: Remove __ilog2_u64 and ffs4 from bitops

________________________________________
From: Fabio Estevam <[email protected]>
Sent: Monday, November 2, 2015 3:38 PM
To: jteki at openedev.com
Cc: trini at konsulko.com; otavio at ossystems.com.br; u-boot at lists.denx.de; Estevam Fabio-R49496; Sun York-R58495
Subject: [PATCH v5 15/18] powerpc: Remove __ilog2_u64 and ffs4 from bitops

From: Fabio Estevam <[email protected]>

Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the kernel implementation.

Use the generic __ffs64 instead of a custom powerpc implementation.

---
Changes since v4:
- None

#16 lore raw

PATCH v5 16/18 spi: sf_ops: Add SPI protection mechanism from the kernel

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Add the SPI NOR protection mechanism from the kernel.

This code is based on the work from Brian Norris <[email protected]>

https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/drivers/mtd/spi-nor/spi-nor.c?id=62593cf40b23b523b9fc9334ca61ba6c595ebb09

---
Changes since v4:
- Place SR_BP bits into "sf_internal.h" (Jagan)

 drivers/mtd/spi/sf_internal.h |   4 +
 drivers/mtd/spi/sf_ops.c      | 170 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 174 insertions(+)
drivers/mtd/spi/sf_internal.h +4 -0
index 8a3e5ec..adfcd89 100644
@@ -106,6 +106,10 @@ enum spi_nor_option_flags {
 #define STATUS_QEB_MXIC		(1 << 6)
 #define STATUS_PEC			(1 << 7)
 
+#define SR_BP0			BIT(2)	/* Block protect 0 */
+#define SR_BP1			BIT(3)	/* Block protect 1 */
+#define SR_BP2			BIT(4)	/* Block protect 2 */
+
 /* Flash timeout values */
 #define SPI_FLASH_PROG_TIMEOUT		(2 * CONFIG_SYS_HZ)
 #define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
drivers/mtd/spi/sf_ops.c +170 -0

179 lines not on this page · raw message

Signature · 1 line
1.9.1
#17 lore raw

PATCH v5 17/18 spi: Add SPI NOR protection mechanism

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.

Take these bits into account when performing erase operations, making sure that the protected areas are skipped.

Tested on a mx6qsabresd:

=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
offset 0x3f0000 is protected and cannot be erased
SF: 65536 bytes @ 0x3f0000 Erased: ERROR
=> sf protect unlock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
SF: 65536 bytes @ 0x3f0000 Erased: OK

---
Changes since v4:
- Only apply lock operations if the SPI NOR flash ID matches STMicro (Jagan)

 common/cmd_sf.c               | 35 +++++++++++++++++++++++++
 drivers/mtd/spi/sf-uclass.c   |  8 ++++++
 drivers/mtd/spi/sf_internal.h |  8 ++++++
 drivers/mtd/spi/sf_ops.c      | 25 ++++++++++++++++++
 drivers/mtd/spi/sf_probe.c    | 61 +++++++++++++++++++++++++++++++++++++++++++
 include/spi_flash.h           | 41 +++++++++++++++++++++++++++++
 6 files changed, 178 insertions(+)
common/cmd_sf.c +35 -0
index ac7f5df..42862d9 100644
@@ -348,6 +348,37 @@ static int do_spi_flash_erase(int argc, char * const argv[])
 	return ret == 0 ? 0 : 1;
 }
 
+static int do_spi_protect(int argc, char * const argv[])
+{
+	int ret = 0;
+	loff_t start, len;
+	bool prot = false;
+
+	if (argc != 4)
+		return -1;
+
+	if (!str2off(argv[2], &start)) {
+		puts("start sector is not a valid number\n");
+		return 1;
+	}
+
+	if (!str2off(argv[3], &len)) {
+		puts("len is not a valid number\n");
+		return 1;
+	}
+
+	if (strcmp(argv[1], "lock") == 0)
+		prot = true;
+	else if (strcmp(argv[1], "unlock") == 0)
+		prot = false;
+	else
+		return -1;  /* Unknown parameter */
+
+	ret = spi_flash_protect(flash, start, len, prot);
+
+	return ret == 0 ? 0 : 1;
+}
+
 #ifdef CONFIG_CMD_SF_TEST
 enum {
 	STAGE_ERASE,
@@ -540,6 +571,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc,
 		ret = do_spi_flash_read_write(argc, argv);
 	else if (strcmp(cmd, "erase") == 0)
 		ret = do_spi_flash_erase(argc, argv);
+	else if (strcmp(cmd, "protect") == 0)
+		ret = do_spi_protect(argc, argv);
 #ifdef CONFIG_CMD_SF_TEST
 	else if (!strcmp(cmd, "test"))
 		ret = do_spi_flash_test(argc, argv);
@@ -579,5 +612,7 @@ U_BOOT_CMD(
 	"sf update addr offset|partition len	- erase and write `len' bytes from memory\n"
 	"					  at `addr' to flash at `offset'\n"
 	"					  or to start of mtd `partition'\n"
+	"sf protect lock/unlock sector len	- protect/unprotect 'len' bytes starting\n"
+	"					  at address 'sector'\n"
 	SF_TEST_HELP
 );
drivers/mtd/spi/sf-uclass.c +8 -0
index 350e21a..7663885 100644
@@ -27,6 +27,14 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len)
 	return sf_get_ops(dev)->erase(dev, offset, len);
 }
 
+int spi_flash_protect_dm(struct udevice *dev, u32 offset, size_t len, bool prot)
+{
+	if (prot)
+		return sf_get_ops(dev)->lock(dev, offset, len);
+	else
+		return sf_get_ops(dev)->unlock(dev, offset, len);
+}
+
 /*
  * TODO(sjg at chromium.org): This is an old-style function. We should remove
  * it when all SPI flash drivers use dm
drivers/mtd/spi/sf_internal.h +8 -0
index adfcd89..db46aa8 100644
@@ -177,6 +177,10 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
 /* Program the status register */
 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
 
+int stm_is_locked(struct spi_flash *nor, loff_t ofs, u32 len);
+int stm_lock(struct spi_flash *nor, u32 ofs, u32 len);
+int stm_unlock(struct spi_flash *nor, u32 ofs, u32 len);
+
 /* Read the config register */
 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
 
@@ -231,6 +235,10 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 		size_t len, void *data);
 
+int spi_flash_cmd_lock_ops(struct spi_flash *flash, u32 offset, size_t len);
+int spi_flash_cmd_unlock_ops(struct spi_flash *flash, u32 offset, size_t len);
+int spi_flash_cmd_is_locked_ops(struct spi_flash *flash, u32 offset, size_t len);
+
 #ifdef CONFIG_SPI_FLASH_MTD
 int spi_flash_mtd_register(struct spi_flash *flash);
 void spi_flash_mtd_unregister(void);
drivers/mtd/spi/sf_ops.c +25 -0
index 4ada13f..99fc7f9 100644
@@ -268,6 +268,11 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 		return -1;
 	}
 
+	if (flash->is_locked(flash, offset, len) > 0) {
+		printf("offset 0x%x is protected and cannot be erased\n", offset);
+		return -EINVAL;
+	}
+
 	cmd[0] = flash->erase_cmd;
 	while (len) {
 		erase_addr = offset;
@@ -310,6 +315,11 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 
 	page_size = flash->page_size;
 
+	if (flash->is_locked(flash, offset, len) > 0) {
+		printf("offset 0x%x is protected and cannot be written\n", offset);
+		return -EINVAL;
+	}
+
 	cmd[0] = flash->write_cmd;
 	for (actual = 0; actual < len; actual += chunk_len) {
 		write_addr = offset;
@@ -348,6 +358,21 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 	return ret;
 }
 
+int spi_flash_cmd_lock_ops(struct spi_flash *flash, u32 offset, size_t len)
+{
+	return stm_lock(flash, offset, len);
+}
+
+int spi_flash_cmd_unlock_ops(struct spi_flash *flash, u32 offset, size_t len)
+{
+	return stm_unlock(flash, offset, len);
+}
+
+int spi_flash_cmd_is_locked_ops(struct spi_flash *flash, u32 offset, size_t len)
+{
+	return stm_is_locked(flash, offset, len);
+}
+
 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 		size_t cmd_len, void *data, size_t data_len)
 {
drivers/mtd/spi/sf_probe.c +61 -0

85 lines not on this page · raw message

include/spi_flash.h +41 -0

71 lines not on this page · raw message

Signature · 1 line
1.9.1
#18 lore raw

PATCH v5 17/18 spi: Add SPI NOR protection mechanism

Hi Fabio,

Quoted 154 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.

Take these bits into account when performing erase operations, making sure that the protected areas are skipped.

Tested on a mx6qsabresd:

=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
offset 0x3f0000 is protected and cannot be erased
SF: 65536 bytes @ 0x3f0000 Erased: ERROR
=> sf protect unlock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
SF: 65536 bytes @ 0x3f0000 Erased: OK

---
Changes since v4:
- Only apply lock operations if the SPI NOR flash ID matches STMicro (Jagan)

 common/cmd_sf.c               | 35 +++++++++++++++++++++++++
 drivers/mtd/spi/sf-uclass.c   |  8 ++++++
 drivers/mtd/spi/sf_internal.h |  8 ++++++
 drivers/mtd/spi/sf_ops.c      | 25 ++++++++++++++++++
 drivers/mtd/spi/sf_probe.c    | 61 +++++++++++++++++++++++++++++++++++++++++++
 include/spi_flash.h           | 41 +++++++++++++++++++++++++++++
 6 files changed, 178 insertions(+)
common/cmd_sf.c +35 -0
index ac7f5df..42862d9 100644
@@ -348,6 +348,37 @@ static int do_spi_flash_erase(int argc, char * const argv[])
        return ret == 0 ? 0 : 1;
 }
 
+static int do_spi_protect(int argc, char * const argv[])
+{
+       int ret = 0;
+       loff_t start, len;
+       bool prot = false;
+
+       if (argc != 4)
+               return -1;
+
+       if (!str2off(argv[2], &start)) {
+               puts("start sector is not a valid number\n");
+               return 1;
+       }
+
+       if (!str2off(argv[3], &len)) {
+               puts("len is not a valid number\n");
+               return 1;
+       }
+
+       if (strcmp(argv[1], "lock") == 0)
+               prot = true;
+       else if (strcmp(argv[1], "unlock") == 0)
+               prot = false;
+       else
+               return -1;  /* Unknown parameter */
+
+       ret = spi_flash_protect(flash, start, len, prot);
+
+       return ret == 0 ? 0 : 1;
+}
+
 #ifdef CONFIG_CMD_SF_TEST
 enum {
        STAGE_ERASE,
@@ -540,6 +571,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc,
                ret = do_spi_flash_read_write(argc, argv);
        else if (strcmp(cmd, "erase") == 0)
                ret = do_spi_flash_erase(argc, argv);
+       else if (strcmp(cmd, "protect") == 0)
+               ret = do_spi_protect(argc, argv);
 #ifdef CONFIG_CMD_SF_TEST
        else if (!strcmp(cmd, "test"))
                ret = do_spi_flash_test(argc, argv);
@@ -579,5 +612,7 @@ U_BOOT_CMD(
        "sf update addr offset|partition len    - erase and write `len' bytes from memory\n"
        "                                         at `addr' to flash at `offset'\n"
        "                                         or to start of mtd `partition'\n"
+       "sf protect lock/unlock sector len      - protect/unprotect 'len' bytes starting\n"
+       "                                         at address 'sector'\n"
        SF_TEST_HELP
 );
drivers/mtd/spi/sf-uclass.c +8 -0
index 350e21a..7663885 100644
@@ -27,6 +27,14 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len)
        return sf_get_ops(dev)->erase(dev, offset, len);
 }
 
+int spi_flash_protect_dm(struct udevice *dev, u32 offset, size_t len, bool prot)
+{
+       if (prot)
+               return sf_get_ops(dev)->lock(dev, offset, len);
+       else
+               return sf_get_ops(dev)->unlock(dev, offset, len);
+}
+
 /*
  * TODO(sjg at chromium.org): This is an old-style function. We should remove
  * it when all SPI flash drivers use dm
drivers/mtd/spi/sf_internal.h +8 -0
index adfcd89..db46aa8 100644
@@ -177,6 +177,10 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
 /* Program the status register */
 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
 
+int stm_is_locked(struct spi_flash *nor, loff_t ofs, u32 len);
+int stm_lock(struct spi_flash *nor, u32 ofs, u32 len);
+int stm_unlock(struct spi_flash *nor, u32 ofs, u32 len);
+
 /* Read the config register */
 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
 
@@ -231,6 +235,10 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
                size_t len, void *data);
 
+int spi_flash_cmd_lock_ops(struct spi_flash *flash, u32 offset, size_t len);
+int spi_flash_cmd_unlock_ops(struct spi_flash *flash, u32 offset, size_t len);
+int spi_flash_cmd_is_locked_ops(struct spi_flash *flash, u32 offset, size_t len);
+
 #ifdef CONFIG_SPI_FLASH_MTD
 int spi_flash_mtd_register(struct spi_flash *flash);
 void spi_flash_mtd_unregister(void);
drivers/mtd/spi/sf_ops.c +5 -0
index 4ada13f..99fc7f9 100644
@@ -268,6 +268,11 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
                return -1;
        }
 
+       if (flash->is_locked(flash, offset, len) > 0) {
+               printf("offset 0x%x is protected and cannot be erased\n", offset);
+               return -EINVAL;
+       }
+
        cmd[0] = flash->erase_cmd;
        while (len) {
                erase_addr = offset;

drivers/mtd/spi/sf_ops.c int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, · line 321

Quoted 7 lines
drivers/mtd/spi/sf_ops.c +4 -0
@@ -310,6 +315,11 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 
        page_size = flash->page_size;
 
+       if (flash->is_locked(flash, offset, len) > 0) {
+               printf("offset 0x%x is protected and cannot be written\n", offset);
+               return -EINVAL;
+       }

This flash lock check related to non-dm lock ops so it's look not good to me as we assigned lock ops for both dm and non-dm cases.

Quoted 33 lines
drivers/mtd/spi/sf_ops.c +16 -0
+
        cmd[0] = flash->write_cmd;
        for (actual = 0; actual < len; actual += chunk_len) {
                write_addr = offset;
@@ -348,6 +358,21 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
        return ret;
 }
 
+int spi_flash_cmd_lock_ops(struct spi_flash *flash, u32 offset, size_t len)
+{
+       return stm_lock(flash, offset, len);
+}
+
+int spi_flash_cmd_unlock_ops(struct spi_flash *flash, u32 offset, size_t len)
+{
+       return stm_unlock(flash, offset, len);
+}
+
+int spi_flash_cmd_is_locked_ops(struct spi_flash *flash, u32 offset, size_t len)
+{
+       return stm_is_locked(flash, offset, len);
+}
+
 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
                size_t cmd_len, void *data, size_t data_len)
 {
drivers/mtd/spi/sf_probe.c +0 -0
index c000c53..3626433 100644
@@ -130,6 +130,22 @@ bank_end:
 }
 #endif

drivers/mtd/spi/sf_probe.c bank_end: · line 141

Quoted 10 lines
drivers/mtd/spi/sf_probe.c +9 -0
 
+int static is_stm(struct spi_slave *spi, struct spi_flash *flash)
+{
+       u8 idcode[5];
+       int ret;
+
+       /* Read the ID codes */
+       ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+       if (ret < 0)
+               return ret;

This is duplicate we have already got the idcode.

Quoted 157 lines
drivers/mtd/spi/sf_probe.c +52 -0
+
+       if (idcode[0] == SPI_FLASH_CFI_MFR_STMICRO)
+               return 1;
+       else
+               return 0;
+}
+
 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
                                     struct spi_flash *flash)
 {
@@ -180,6 +196,13 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
 #endif
        flash->erase = spi_flash_cmd_erase_ops;
        flash->read = spi_flash_cmd_read_ops;
+#if defined(CONFIG_SPI_FLASH_STMICRO)
+       if (is_stm(spi, flash) > 0) {
+               flash->lock = spi_flash_cmd_lock_ops;
+               flash->unlock = spi_flash_cmd_unlock_ops;
+               flash->is_locked = spi_flash_cmd_is_locked_ops;
+       }
+#endif
 #endif
 
        /* Compute the flash size */
@@ -482,6 +505,39 @@ int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
        return spi_flash_cmd_erase_ops(flash, offset, len);
 }
 
+int spi_flash_std_lock(struct udevice *dev, u32 offset, size_t len)
+{
+       struct spi_flash *flash = dev_get_uclass_priv(dev);
+       struct spi_slave *spi = dev_get_parent_priv(dev);
+
+       if (is_stm(spi, flash) <= 0)
+               return -EOPNOTSUPP;
+
+       return spi_flash_cmd_lock_ops(flash, offset, len);
+}
+
+int spi_flash_std_unlock(struct udevice *dev, u32 offset, size_t len)
+{
+       struct spi_flash *flash = dev_get_uclass_priv(dev);
+       struct spi_slave *spi = dev_get_parent_priv(dev);
+
+       if (is_stm(spi, flash) <= 0)
+               return -EOPNOTSUPP;
+
+       return spi_flash_cmd_unlock_ops(flash, offset, len);
+}
+
+int spi_flash_std_is_locked(struct udevice *dev, u32 offset, size_t len)
+{
+       struct spi_flash *flash = dev_get_uclass_priv(dev);
+       struct spi_slave *spi = dev_get_parent_priv(dev);
+
+       if (is_stm(spi, flash) <= 0)
+               return -EOPNOTSUPP;
+
+       return spi_flash_cmd_is_locked_ops(flash, offset, len);
+}
+
 int spi_flash_std_probe(struct udevice *dev)
 {
        struct spi_slave *slave = dev_get_parent_priv(dev);
@@ -498,6 +554,11 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = {
        .read = spi_flash_std_read,
        .write = spi_flash_std_write,
        .erase = spi_flash_std_erase,
+#if defined(CONFIG_SPI_FLASH_STMICRO)
+       .lock = spi_flash_std_lock,
+       .unlock = spi_flash_std_unlock,
+       .is_locked = spi_flash_std_is_locked,
+#endif
 };
 
 static const struct udevice_id spi_flash_std_ids[] = {
include/spi_flash.h +41 -1
index 4312d3d..23f30a5 100644
@@ -104,6 +104,9 @@ struct spi_flash {
                        const void *buf);
        int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
 #endif
+       int (*lock)(struct spi_flash *flash, u32 offset, size_t len);
+       int (*unlock)(struct spi_flash *flash, u32 offset, size_t len);
+       int (*is_locked)(struct spi_flash *flash, u32 offset, size_t len);
 };
 
 struct dm_spi_flash_ops {
@@ -111,6 +114,9 @@ struct dm_spi_flash_ops {
        int (*write)(struct udevice *dev, u32 offset, size_t len,
                     const void *buf);
        int (*erase)(struct udevice *dev, u32 offset, size_t len);
+       int (*lock)(struct udevice *dev, u32 offset, size_t len);
+       int (*unlock)(struct udevice *dev, u32 offset, size_t len);
+       int (*is_locked)(struct udevice *dev, u32 offset, size_t len);
 };
 
 /* Access the serial operations for a device */
@@ -152,6 +158,20 @@ int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
  */
 int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len);
 
+/**
+ * spi_flash_protect_dm() - Protect/unprotect blocks of the SPI flash
+ *
+ * Note that @len must be a muiltiple of the flash sector size.
+ *
+ * @dev:       SPI flash device
+ * @offset:    Offset into device in bytes to start erasing
+ * @len:       Number of bytes to erase
+ * @prot:      True: lock the block or False: unlock the block
+ * @return 0 if OK, -ve on error
+ */
+int spi_flash_protect_dm(struct udevice *dev, u32 offset, size_t len,
+                        bool prot);
+
 int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
                           unsigned int max_hz, unsigned int spi_mode,
                           struct udevice **devp);
@@ -183,6 +203,15 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
        return spi_flash_erase_dm(flash->dev, offset, len);
 }
 
+static inline int spi_flash_protect(struct spi_flash *flash, loff_t ofs,
+                                   u32 len, bool prot)
+{
+       if (!flash->lock)
+               return -EOPNOTSUPP;
+
+       return spi_flash_protect_dm(flash->dev, ofs, len, prot);
+}
+
 struct sandbox_state;
 
 int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
@@ -225,6 +254,18 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
 {
        return flash->erase(flash, offset, len);
 }
+
+static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,
+                                   bool prot)
+{
+       if (!flash->lock)
+               return -EOPNOTSUPP;
+
+       if (prot)
+               return flash->lock(flash, ofs, len);
+       else
+               return flash->unlock(flash, ofs, len);
+}
 #endif
 
 void spi_boot(void) __noreturn;
--
Quoted 2 lines

1.9.1

I will come back for this patch changes what I thought, probably lock ops shouldn't be separate for dm and non-dm as we have different ops based on the flash itself.

Signature · 1 line
Jagan | openedev.
#19 lore raw

PATCH v5 17/18 spi: Add SPI NOR protection mechanism

Jagan,

Quoted 7 lines · Jagan Teki

drivers/mtd/spi/sf_ops.c int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, · line 321

Quoted 4 lines
drivers/mtd/spi/sf_ops.c +4 -0
+       if (flash->is_locked(flash, offset, len) > 0) {
+               printf("offset 0x%x is protected and cannot be written\n", offset);
+               return -EINVAL;
+       }

This flash lock check related to non-dm lock ops so it's look not good to me as we assigned lock ops for both dm and non-dm cases.

This is getting totally ridiculous: you have been seeing this patch series so many times and now you say this is not OK and you don't give me any clue as to what you would like me to change.

That's why I proposed earlier that you take the non-SPI patches first and then we can rework the SPI flash pieces.

Quoted 3 lines

I will come back for this patch changes what I thought, probably lock ops shouldn't be separate for dm and non-dm as we have different ops based on the flash itself.

I wish we can make progress on this. Not sure how to proceed though.

#20 lore raw

PATCH v5 17/18 spi: Add SPI NOR protection mechanism

Fabio,

Quoted 9 lines · Fabio Estevam

Jagan,

Quoted 5 lines · Jagan Teki
Quoted 4 lines
drivers/mtd/spi/sf_ops.c +4 -0
+       if (flash->is_locked(flash, offset, len) > 0) {
+               printf("offset 0x%x is protected and cannot be written\n", offset);
+               return -EINVAL;
+       }
Quoted 6 lines
Quoted 2 lines

This flash lock check related to non-dm lock ops so it's look not good to me as we assigned lock ops for both dm and non-dm cases.

This is getting totally ridiculous: you have been seeing this patch series so many times and now you say this is not OK and you don't give me any clue as to what you would like me to change.

Nothing is worse than before or now - as spi-flash code is configured both the dm and non-dm cases and it's been thinking job as I have planning for proper design[1] to go ahead. I understand you sent multiple versions but I already told that "please don't send the next version" until the current version discussion finishes.

[1] http://git.denx.de/?p=u-boot/u-boot-spi.git;a=shortlog;h=refs/heads/next-spi-nor

Quoted 9 lines

That's why I proposed earlier that you take the non-SPI patches first and then we can rework the SPI flash pieces.

Quoted 3 lines

I will come back for this patch changes what I thought, probably lock ops shouldn't be separate for dm and non-dm as we have different ops based on the flash itself.

I wish we can make progress on this. Not sure how to proceed though.

thanks!

Signature · 1 line
Jagan | openedev.
#21 lore raw

PATCH v5 17/18 spi: Add SPI NOR protection mechanism

Jagan,

Quoted 5 lines · Jagan Teki

Nothing is worse than before or now - as spi-flash code is configured both the dm and non-dm cases and it's been thinking job as I have planning for proper design[1] to go ahead. I understand you sent multiple versions but I already told that "please don't send the next version" until the current version discussion finishes.

How do I know that you finished reviewing a specific version and I am ready to send another one?

Anyway, let's focus on the remaining technical issues.

What exactly do you want me to change?

You say: "This flash lock check related to non-dm lock ops so it's look not good to me as we assigned lock ops for both dm and non-dm cases."

How can I make it look good then?

#22 lore raw

PATCH v5 17/18 spi: Add SPI NOR protection mechanism

In reply to Jagan Teki

On Tue, Nov 03, 2015 at 08:21:32PM +0530, Jagan Teki wrote:

[snip]

Quoted 3 lines

I will come back for this patch changes what I thought, probably lock ops shouldn't be separate for dm and non-dm as we have different ops based on the flash itself.

As we work on consolidation and moving everything over to DM we'll have funny cases like this. But we shouldn't let that stop us from making forward progress either. The code itself looks reasonable enough today as a starting point, so lets pick it up and move from there, thanks!

Signature · 8 lines
Tom
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#23 lore raw

PATCH v5 17/18 spi: Add SPI NOR protection mechanism

Quoted 11 lines · Tom Rini

On Tue, Nov 03, 2015 at 08:21:32PM +0530, Jagan Teki wrote:

[snip]

Quoted 3 lines

I will come back for this patch changes what I thought, probably lock ops shouldn't be separate for dm and non-dm as we have different ops based on the flash itself.

As we work on consolidation and moving everything over to DM we'll have funny cases like this. But we shouldn't let that stop us from making forward progress either. The code itself looks reasonable enough today as a starting point, so lets pick it up and move from there, thanks!

Yes, we can always make incremental patches to improve things.

Thanks, Tom!

#24 lore raw

PATCH v5 18/18 sf_probe: Extend the SPI NOR protection for SST flashes

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

SST flashes have a similar SPI NOR protection scheme as STMICRO, so add support for it.

---
Changes since v4:
- None. Newly introduced in this version

 drivers/mtd/spi/sf_internal.h | 1 +
 drivers/mtd/spi/sf_probe.c    | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)
drivers/mtd/spi/sf_internal.h +1 -0
index db46aa8..214ceaa 100644
@@ -63,6 +63,7 @@ enum spi_nor_option_flags {
 /* CFI Manufacture ID's */
 #define SPI_FLASH_CFI_MFR_SPANSION	0x01
 #define SPI_FLASH_CFI_MFR_STMICRO	0x20
+#define SPI_FLASH_CFI_MFR_SST		0xbf
 #define SPI_FLASH_CFI_MFR_MACRONIX	0xc2
 #define SPI_FLASH_CFI_MFR_WINBOND	0xef
 
drivers/mtd/spi/sf_probe.c +2 -1
index 3626433..8a736c4 100644
@@ -140,7 +140,8 @@ int static is_stm(struct spi_slave *spi, struct spi_flash *flash)
 	if (ret < 0)
 		return ret;
 
-	if (idcode[0] == SPI_FLASH_CFI_MFR_STMICRO)
+	if (idcode[0] == SPI_FLASH_CFI_MFR_STMICRO ||
+	    idcode[0] == SPI_FLASH_CFI_MFR_SST)
 		return 1;
 	else
 		return 0;
Signature · 1 line
1.9.1